1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2018 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
14 #include "sfc_kvargs.h"
16 /** Default MAC statistics update period is 1 second */
17 #define SFC_MAC_STATS_UPDATE_PERIOD_MS_DEF MS_PER_S
19 /** The number of microseconds to sleep on attempt to get statistics update */
20 #define SFC_MAC_STATS_UPDATE_RETRY_INTERVAL_US 10
22 /** The number of attempts to await arrival of freshly generated statistics */
23 #define SFC_MAC_STATS_UPDATE_NB_ATTEMPTS 50
26 * Update MAC statistics in the buffer.
32 * @retval EAGAIN Try again
33 * @retval ENOMEM Memory allocation failure
36 sfc_port_update_mac_stats(struct sfc_adapter *sa)
38 struct sfc_port *port = &sa->port;
39 efsys_mem_t *esmp = &port->mac_stats_dma_mem;
40 uint32_t *genp = NULL;
42 unsigned int nb_attempts = 0;
45 SFC_ASSERT(rte_spinlock_is_locked(&port->mac_stats_lock));
47 if (sa->state != SFC_ADAPTER_STARTED)
51 * If periodic statistics DMA'ing is off or if not supported,
52 * make a manual request and keep an eye on timer if need be
54 if (!port->mac_stats_periodic_dma_supported ||
55 (port->mac_stats_update_period_ms == 0)) {
56 if (port->mac_stats_update_period_ms != 0) {
57 uint64_t timestamp = sfc_get_system_msecs();
60 port->mac_stats_last_request_timestamp) <
61 port->mac_stats_update_period_ms)
64 port->mac_stats_last_request_timestamp = timestamp;
67 rc = efx_mac_stats_upload(sa->nic, esmp);
71 genp = &port->mac_stats_update_generation;
77 rte_delay_us(SFC_MAC_STATS_UPDATE_RETRY_INTERVAL_US);
79 rc = efx_mac_stats_update(sa->nic, esmp,
80 port->mac_stats_buf, genp);
84 } while ((genp != NULL) && (*genp == gen_old) &&
85 (++nb_attempts < SFC_MAC_STATS_UPDATE_NB_ATTEMPTS));
91 sfc_port_reset_mac_stats(struct sfc_adapter *sa)
93 struct sfc_port *port = &sa->port;
96 rte_spinlock_lock(&port->mac_stats_lock);
97 rc = efx_mac_stats_clear(sa->nic);
98 rte_spinlock_unlock(&port->mac_stats_lock);
104 sfc_port_init_dev_link(struct sfc_adapter *sa)
106 struct rte_eth_link *dev_link = &sa->eth_dev->data->dev_link;
108 efx_link_mode_t link_mode;
109 struct rte_eth_link current_link;
111 rc = efx_port_poll(sa->nic, &link_mode);
115 sfc_port_link_mode_to_info(link_mode, ¤t_link);
117 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
118 rte_atomic64_set((rte_atomic64_t *)dev_link,
119 *(uint64_t *)¤t_link);
125 sfc_port_start(struct sfc_adapter *sa)
127 struct sfc_port *port = &sa->port;
129 uint32_t phy_adv_cap;
130 const uint32_t phy_pause_caps =
131 ((1u << EFX_PHY_CAP_PAUSE) | (1u << EFX_PHY_CAP_ASYM));
134 sfc_log_init(sa, "entry");
136 sfc_log_init(sa, "init filters");
137 rc = efx_filter_init(sa->nic);
139 goto fail_filter_init;
141 sfc_log_init(sa, "init port");
142 rc = efx_port_init(sa->nic);
146 sfc_log_init(sa, "set flow control to %#x autoneg=%u",
147 port->flow_ctrl, port->flow_ctrl_autoneg);
148 rc = efx_mac_fcntl_set(sa->nic, port->flow_ctrl,
149 port->flow_ctrl_autoneg);
151 goto fail_mac_fcntl_set;
153 /* Preserve pause capabilities set by above efx_mac_fcntl_set() */
154 efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_CURRENT, &phy_adv_cap);
155 SFC_ASSERT((port->phy_adv_cap & phy_pause_caps) == 0);
156 phy_adv_cap = port->phy_adv_cap | (phy_adv_cap & phy_pause_caps);
158 sfc_log_init(sa, "set phy adv caps to %#x", phy_adv_cap);
159 rc = efx_phy_adv_cap_set(sa->nic, phy_adv_cap);
161 goto fail_phy_adv_cap_set;
163 sfc_log_init(sa, "set MAC PDU %u", (unsigned int)port->pdu);
164 rc = efx_mac_pdu_set(sa->nic, port->pdu);
166 goto fail_mac_pdu_set;
168 if (!port->isolated) {
169 struct ether_addr *addr = &port->default_mac_addr;
171 sfc_log_init(sa, "set MAC address");
172 rc = efx_mac_addr_set(sa->nic, addr->addr_bytes);
174 goto fail_mac_addr_set;
176 sfc_log_init(sa, "set MAC filters");
177 port->promisc = (sa->eth_dev->data->promiscuous != 0) ?
179 port->allmulti = (sa->eth_dev->data->all_multicast != 0) ?
181 rc = sfc_set_rx_mode(sa);
183 goto fail_mac_filter_set;
185 sfc_log_init(sa, "set multicast address list");
186 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
187 port->nb_mcast_addrs);
189 goto fail_mcast_address_list_set;
192 if (port->mac_stats_reset_pending) {
193 rc = sfc_port_reset_mac_stats(sa);
195 sfc_err(sa, "statistics reset failed (requested "
196 "before the port was started)");
198 port->mac_stats_reset_pending = B_FALSE;
201 efx_mac_stats_get_mask(sa->nic, port->mac_stats_mask,
202 sizeof(port->mac_stats_mask));
204 for (i = 0, port->mac_stats_nb_supported = 0; i < EFX_MAC_NSTATS; ++i)
205 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i))
206 port->mac_stats_nb_supported++;
208 port->mac_stats_update_generation = 0;
210 if (port->mac_stats_update_period_ms != 0) {
212 * Update MAC stats using periodic DMA;
213 * any positive update interval different from
214 * 1000 ms can be set only on SFN8xxx provided
215 * that FW version is 6.2.1.1033 or higher
217 sfc_log_init(sa, "request MAC stats DMA'ing");
218 rc = efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
219 port->mac_stats_update_period_ms,
222 port->mac_stats_periodic_dma_supported = B_TRUE;
223 } else if (rc == EOPNOTSUPP) {
224 port->mac_stats_periodic_dma_supported = B_FALSE;
225 port->mac_stats_last_request_timestamp = 0;
227 goto fail_mac_stats_periodic;
231 if ((port->mac_stats_update_period_ms != 0) &&
232 port->mac_stats_periodic_dma_supported) {
234 * Request an explicit MAC stats upload immediately to
235 * preclude bogus figures readback if the user decides
236 * to read stats before periodic DMA is really started
238 rc = efx_mac_stats_upload(sa->nic, &port->mac_stats_dma_mem);
240 goto fail_mac_stats_upload;
243 sfc_log_init(sa, "disable MAC drain");
244 rc = efx_mac_drain(sa->nic, B_FALSE);
248 /* Synchronize link status knowledge */
249 rc = sfc_port_init_dev_link(sa);
251 goto fail_port_init_dev_link;
253 sfc_log_init(sa, "done");
256 fail_port_init_dev_link:
257 (void)efx_mac_drain(sa->nic, B_TRUE);
260 fail_mac_stats_upload:
261 (void)efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
264 fail_mac_stats_periodic:
265 fail_mcast_address_list_set:
269 fail_phy_adv_cap_set:
271 efx_port_fini(sa->nic);
274 efx_filter_fini(sa->nic);
277 sfc_log_init(sa, "failed %d", rc);
282 sfc_port_stop(struct sfc_adapter *sa)
284 sfc_log_init(sa, "entry");
286 efx_mac_drain(sa->nic, B_TRUE);
288 (void)efx_mac_stats_periodic(sa->nic, &sa->port.mac_stats_dma_mem,
291 efx_port_fini(sa->nic);
292 efx_filter_fini(sa->nic);
294 sfc_log_init(sa, "done");
298 sfc_port_configure(struct sfc_adapter *sa)
300 const struct rte_eth_dev_data *dev_data = sa->eth_dev->data;
301 struct sfc_port *port = &sa->port;
303 sfc_log_init(sa, "entry");
305 if (dev_data->dev_conf.rxmode.jumbo_frame)
306 port->pdu = dev_data->dev_conf.rxmode.max_rx_pkt_len;
308 port->pdu = EFX_MAC_PDU(dev_data->mtu);
314 sfc_port_close(struct sfc_adapter *sa)
316 sfc_log_init(sa, "entry");
320 sfc_port_attach(struct sfc_adapter *sa)
322 struct sfc_port *port = &sa->port;
323 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
324 const struct ether_addr *from;
325 long kvarg_stats_update_period_ms;
328 sfc_log_init(sa, "entry");
330 efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_PERM, &port->phy_adv_cap_mask);
332 /* Enable flow control by default */
333 port->flow_ctrl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
334 port->flow_ctrl_autoneg = B_TRUE;
336 RTE_BUILD_BUG_ON(sizeof(encp->enc_mac_addr) != sizeof(*from));
337 from = (const struct ether_addr *)(encp->enc_mac_addr);
338 ether_addr_copy(from, &port->default_mac_addr);
340 port->max_mcast_addrs = EFX_MAC_MULTICAST_LIST_MAX;
341 port->nb_mcast_addrs = 0;
342 port->mcast_addrs = rte_calloc_socket("mcast_addr_list_buf",
343 port->max_mcast_addrs,
346 if (port->mcast_addrs == NULL) {
348 goto fail_mcast_addr_list_buf_alloc;
351 rte_spinlock_init(&port->mac_stats_lock);
354 port->mac_stats_buf = rte_calloc_socket("mac_stats_buf", EFX_MAC_NSTATS,
357 if (port->mac_stats_buf == NULL)
358 goto fail_mac_stats_buf_alloc;
360 rc = sfc_dma_alloc(sa, "mac_stats", 0, EFX_MAC_STATS_SIZE,
361 sa->socket_id, &port->mac_stats_dma_mem);
363 goto fail_mac_stats_dma_alloc;
365 port->mac_stats_reset_pending = B_FALSE;
367 kvarg_stats_update_period_ms = SFC_MAC_STATS_UPDATE_PERIOD_MS_DEF;
369 rc = sfc_kvargs_process(sa, SFC_KVARG_STATS_UPDATE_PERIOD_MS,
370 sfc_kvarg_long_handler,
371 &kvarg_stats_update_period_ms);
373 ((kvarg_stats_update_period_ms < 0) ||
374 (kvarg_stats_update_period_ms > UINT16_MAX))) {
375 sfc_err(sa, "wrong '" SFC_KVARG_STATS_UPDATE_PERIOD_MS "' "
376 "was set (%ld);", kvarg_stats_update_period_ms);
377 sfc_err(sa, "it must not be less than 0 "
378 "or greater than %" PRIu16, UINT16_MAX);
380 goto fail_kvarg_stats_update_period_ms;
381 } else if (rc != 0) {
382 goto fail_kvarg_stats_update_period_ms;
385 port->mac_stats_update_period_ms = kvarg_stats_update_period_ms;
387 sfc_log_init(sa, "done");
390 fail_kvarg_stats_update_period_ms:
391 sfc_dma_free(sa, &port->mac_stats_dma_mem);
393 fail_mac_stats_dma_alloc:
394 rte_free(port->mac_stats_buf);
396 fail_mac_stats_buf_alloc:
397 rte_free(port->mcast_addrs);
399 fail_mcast_addr_list_buf_alloc:
400 sfc_log_init(sa, "failed %d", rc);
405 sfc_port_detach(struct sfc_adapter *sa)
407 struct sfc_port *port = &sa->port;
409 sfc_log_init(sa, "entry");
411 sfc_dma_free(sa, &port->mac_stats_dma_mem);
412 rte_free(port->mac_stats_buf);
414 rte_free(port->mcast_addrs);
416 sfc_log_init(sa, "done");
420 sfc_set_rx_mode(struct sfc_adapter *sa)
422 struct sfc_port *port = &sa->port;
425 rc = efx_mac_filter_set(sa->nic, port->promisc, B_TRUE,
426 port->promisc || port->allmulti, B_TRUE);
432 sfc_port_link_mode_to_info(efx_link_mode_t link_mode,
433 struct rte_eth_link *link_info)
435 SFC_ASSERT(link_mode < EFX_LINK_NMODES);
437 memset(link_info, 0, sizeof(*link_info));
438 if ((link_mode == EFX_LINK_DOWN) || (link_mode == EFX_LINK_UNKNOWN))
439 link_info->link_status = ETH_LINK_DOWN;
441 link_info->link_status = ETH_LINK_UP;
445 link_info->link_speed = ETH_SPEED_NUM_10M;
446 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
449 link_info->link_speed = ETH_SPEED_NUM_10M;
450 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
452 case EFX_LINK_100HDX:
453 link_info->link_speed = ETH_SPEED_NUM_100M;
454 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
456 case EFX_LINK_100FDX:
457 link_info->link_speed = ETH_SPEED_NUM_100M;
458 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
460 case EFX_LINK_1000HDX:
461 link_info->link_speed = ETH_SPEED_NUM_1G;
462 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
464 case EFX_LINK_1000FDX:
465 link_info->link_speed = ETH_SPEED_NUM_1G;
466 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
468 case EFX_LINK_10000FDX:
469 link_info->link_speed = ETH_SPEED_NUM_10G;
470 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
472 case EFX_LINK_40000FDX:
473 link_info->link_speed = ETH_SPEED_NUM_40G;
474 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
479 case EFX_LINK_UNKNOWN:
481 link_info->link_speed = ETH_SPEED_NUM_NONE;
482 link_info->link_duplex = 0;
486 link_info->link_autoneg = ETH_LINK_AUTONEG;