1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2018 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
10 #include <rte_mempool.h>
15 #include "sfc_debug.h"
19 #include "sfc_kvargs.h"
20 #include "sfc_tweak.h"
23 * Maximum number of Rx queue flush attempt in the case of failure or
26 #define SFC_RX_QFLUSH_ATTEMPTS (3)
29 * Time to wait between event queue polling attempts when waiting for Rx
30 * queue flush done or failed events.
32 #define SFC_RX_QFLUSH_POLL_WAIT_MS (1)
35 * Maximum number of event queue polling attempts when waiting for Rx queue
36 * flush done or failed events. It defines Rx queue flush attempt timeout
37 * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
39 #define SFC_RX_QFLUSH_POLL_ATTEMPTS (2000)
42 sfc_rx_qflush_done(struct sfc_rxq_info *rxq_info)
44 rxq_info->state |= SFC_RXQ_FLUSHED;
45 rxq_info->state &= ~SFC_RXQ_FLUSHING;
49 sfc_rx_qflush_failed(struct sfc_rxq_info *rxq_info)
51 rxq_info->state |= SFC_RXQ_FLUSH_FAILED;
52 rxq_info->state &= ~SFC_RXQ_FLUSHING;
56 sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq)
58 unsigned int free_space;
60 void *objs[SFC_RX_REFILL_BULK];
61 efsys_dma_addr_t addr[RTE_DIM(objs)];
62 unsigned int added = rxq->added;
65 struct sfc_efx_rx_sw_desc *rxd;
67 uint16_t port_id = rxq->dp.dpq.port_id;
69 free_space = rxq->max_fill_level - (added - rxq->completed);
71 if (free_space < rxq->refill_threshold)
74 bulks = free_space / RTE_DIM(objs);
75 /* refill_threshold guarantees that bulks is positive */
76 SFC_ASSERT(bulks > 0);
78 id = added & rxq->ptr_mask;
80 if (unlikely(rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
81 RTE_DIM(objs)) < 0)) {
83 * It is hardly a safe way to increment counter
84 * from different contexts, but all PMDs do it.
86 rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
88 /* Return if we have posted nothing yet */
89 if (added == rxq->added)
95 for (i = 0; i < RTE_DIM(objs);
96 ++i, id = (id + 1) & rxq->ptr_mask) {
99 MBUF_RAW_ALLOC_CHECK(m);
101 rxd = &rxq->sw_desc[id];
104 m->data_off = RTE_PKTMBUF_HEADROOM;
107 addr[i] = rte_pktmbuf_iova(m);
110 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
111 RTE_DIM(objs), rxq->completed, added);
112 added += RTE_DIM(objs);
113 } while (--bulks > 0);
115 SFC_ASSERT(added != rxq->added);
117 efx_rx_qpush(rxq->common, added, &rxq->pushed);
121 sfc_efx_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
123 uint64_t mbuf_flags = 0;
125 switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
126 case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
127 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
130 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
133 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
134 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
135 PKT_RX_IP_CKSUM_UNKNOWN);
139 switch ((desc_flags &
140 (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
141 case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
142 case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
143 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
147 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
150 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
151 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
152 PKT_RX_L4_CKSUM_UNKNOWN);
160 sfc_efx_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
162 return RTE_PTYPE_L2_ETHER |
163 ((desc_flags & EFX_PKT_IPV4) ?
164 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
165 ((desc_flags & EFX_PKT_IPV6) ?
166 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
167 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
168 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
171 static const uint32_t *
172 sfc_efx_supported_ptypes_get(__rte_unused uint32_t tunnel_encaps)
174 static const uint32_t ptypes[] = {
176 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
177 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
187 sfc_efx_rx_set_rss_hash(struct sfc_efx_rxq *rxq, unsigned int flags,
193 if ((rxq->flags & SFC_EFX_RXQ_FLAG_RSS_HASH) == 0)
196 mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
198 if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
199 m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
200 EFX_RX_HASHALG_TOEPLITZ,
203 m->ol_flags |= PKT_RX_RSS_HASH;
208 sfc_efx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
210 struct sfc_dp_rxq *dp_rxq = rx_queue;
211 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
212 unsigned int completed;
213 unsigned int prefix_size = rxq->prefix_size;
214 unsigned int done_pkts = 0;
215 boolean_t discard_next = B_FALSE;
216 struct rte_mbuf *scatter_pkt = NULL;
218 if (unlikely((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0))
221 sfc_ev_qpoll(rxq->evq);
223 completed = rxq->completed;
224 while (completed != rxq->pending && done_pkts < nb_pkts) {
226 struct sfc_efx_rx_sw_desc *rxd;
228 unsigned int seg_len;
229 unsigned int desc_flags;
231 id = completed++ & rxq->ptr_mask;
232 rxd = &rxq->sw_desc[id];
234 desc_flags = rxd->flags;
239 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
242 if (desc_flags & EFX_PKT_PREFIX_LEN) {
246 rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
247 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
251 seg_len = rxd->size - prefix_size;
254 rte_pktmbuf_data_len(m) = seg_len;
255 rte_pktmbuf_pkt_len(m) = seg_len;
257 if (scatter_pkt != NULL) {
258 if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
259 rte_pktmbuf_free(scatter_pkt);
262 /* The packet to deliver */
266 if (desc_flags & EFX_PKT_CONT) {
267 /* The packet is scattered, more fragments to come */
269 /* Further fragments have no prefix */
274 /* Scattered packet is done */
276 /* The first fragment of the packet has prefix */
277 prefix_size = rxq->prefix_size;
280 sfc_efx_rx_desc_flags_to_offload_flags(desc_flags);
282 sfc_efx_rx_desc_flags_to_packet_type(desc_flags);
285 * Extract RSS hash from the packet prefix and
286 * set the corresponding field (if needed and possible)
288 sfc_efx_rx_set_rss_hash(rxq, desc_flags, m);
290 m->data_off += prefix_size;
297 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
298 rte_mbuf_raw_free(m);
302 /* pending is only moved when entire packet is received */
303 SFC_ASSERT(scatter_pkt == NULL);
305 rxq->completed = completed;
307 sfc_efx_rx_qrefill(rxq);
312 static sfc_dp_rx_qdesc_npending_t sfc_efx_rx_qdesc_npending;
314 sfc_efx_rx_qdesc_npending(struct sfc_dp_rxq *dp_rxq)
316 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
318 if ((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0)
321 sfc_ev_qpoll(rxq->evq);
323 return rxq->pending - rxq->completed;
326 static sfc_dp_rx_qdesc_status_t sfc_efx_rx_qdesc_status;
328 sfc_efx_rx_qdesc_status(struct sfc_dp_rxq *dp_rxq, uint16_t offset)
330 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
332 if (unlikely(offset > rxq->ptr_mask))
336 * Poll EvQ to derive up-to-date 'rxq->pending' figure;
337 * it is required for the queue to be running, but the
338 * check is omitted because API design assumes that it
339 * is the duty of the caller to satisfy all conditions
341 SFC_ASSERT((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) ==
342 SFC_EFX_RXQ_FLAG_RUNNING);
343 sfc_ev_qpoll(rxq->evq);
346 * There is a handful of reserved entries in the ring,
347 * but an explicit check whether the offset points to
348 * a reserved entry is neglected since the two checks
349 * below rely on the figures which take the HW limits
350 * into account and thus if an entry is reserved, the
351 * checks will fail and UNAVAIL code will be returned
354 if (offset < (rxq->pending - rxq->completed))
355 return RTE_ETH_RX_DESC_DONE;
357 if (offset < (rxq->added - rxq->completed))
358 return RTE_ETH_RX_DESC_AVAIL;
360 return RTE_ETH_RX_DESC_UNAVAIL;
363 /** Get Rx datapath ops by the datapath RxQ handle */
364 const struct sfc_dp_rx *
365 sfc_dp_rx_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
367 const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
368 struct rte_eth_dev *eth_dev;
369 struct sfc_adapter_priv *sap;
371 SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
372 eth_dev = &rte_eth_devices[dpq->port_id];
374 sap = sfc_adapter_priv_by_eth_dev(eth_dev);
379 struct sfc_rxq_info *
380 sfc_rxq_info_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
382 const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
383 struct rte_eth_dev *eth_dev;
384 struct sfc_adapter_shared *sas;
386 SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
387 eth_dev = &rte_eth_devices[dpq->port_id];
389 sas = sfc_adapter_shared_by_eth_dev(eth_dev);
391 SFC_ASSERT(dpq->queue_id < sas->rxq_count);
392 return &sas->rxq_info[dpq->queue_id];
396 sfc_rxq_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
398 const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
399 struct rte_eth_dev *eth_dev;
400 struct sfc_adapter *sa;
402 SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
403 eth_dev = &rte_eth_devices[dpq->port_id];
405 sa = sfc_adapter_by_eth_dev(eth_dev);
407 SFC_ASSERT(dpq->queue_id < sfc_sa2shared(sa)->rxq_count);
408 return &sa->rxq_ctrl[dpq->queue_id];
411 static sfc_dp_rx_qsize_up_rings_t sfc_efx_rx_qsize_up_rings;
413 sfc_efx_rx_qsize_up_rings(uint16_t nb_rx_desc,
414 __rte_unused struct sfc_dp_rx_hw_limits *limits,
415 __rte_unused struct rte_mempool *mb_pool,
416 unsigned int *rxq_entries,
417 unsigned int *evq_entries,
418 unsigned int *rxq_max_fill_level)
420 *rxq_entries = nb_rx_desc;
421 *evq_entries = nb_rx_desc;
422 *rxq_max_fill_level = EFX_RXQ_LIMIT(*rxq_entries);
426 static sfc_dp_rx_qcreate_t sfc_efx_rx_qcreate;
428 sfc_efx_rx_qcreate(uint16_t port_id, uint16_t queue_id,
429 const struct rte_pci_addr *pci_addr, int socket_id,
430 const struct sfc_dp_rx_qcreate_info *info,
431 struct sfc_dp_rxq **dp_rxqp)
433 struct sfc_efx_rxq *rxq;
437 rxq = rte_zmalloc_socket("sfc-efx-rxq", sizeof(*rxq),
438 RTE_CACHE_LINE_SIZE, socket_id);
442 sfc_dp_queue_init(&rxq->dp.dpq, port_id, queue_id, pci_addr);
445 rxq->sw_desc = rte_calloc_socket("sfc-efx-rxq-sw_desc",
447 sizeof(*rxq->sw_desc),
448 RTE_CACHE_LINE_SIZE, socket_id);
449 if (rxq->sw_desc == NULL)
450 goto fail_desc_alloc;
452 /* efx datapath is bound to efx control path */
453 rxq->evq = sfc_rxq_by_dp_rxq(&rxq->dp)->evq;
454 if (info->flags & SFC_RXQ_FLAG_RSS_HASH)
455 rxq->flags |= SFC_EFX_RXQ_FLAG_RSS_HASH;
456 rxq->ptr_mask = info->rxq_entries - 1;
457 rxq->batch_max = info->batch_max;
458 rxq->prefix_size = info->prefix_size;
459 rxq->max_fill_level = info->max_fill_level;
460 rxq->refill_threshold = info->refill_threshold;
461 rxq->buf_size = info->buf_size;
462 rxq->refill_mb_pool = info->refill_mb_pool;
474 static sfc_dp_rx_qdestroy_t sfc_efx_rx_qdestroy;
476 sfc_efx_rx_qdestroy(struct sfc_dp_rxq *dp_rxq)
478 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
480 rte_free(rxq->sw_desc);
484 static sfc_dp_rx_qstart_t sfc_efx_rx_qstart;
486 sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq,
487 __rte_unused unsigned int evq_read_ptr)
489 /* libefx-based datapath is specific to libefx-based PMD */
490 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
491 struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq);
493 rxq->common = crxq->common;
495 rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
497 sfc_efx_rx_qrefill(rxq);
499 rxq->flags |= (SFC_EFX_RXQ_FLAG_STARTED | SFC_EFX_RXQ_FLAG_RUNNING);
504 static sfc_dp_rx_qstop_t sfc_efx_rx_qstop;
506 sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq,
507 __rte_unused unsigned int *evq_read_ptr)
509 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
511 rxq->flags &= ~SFC_EFX_RXQ_FLAG_RUNNING;
513 /* libefx-based datapath is bound to libefx-based PMD and uses
514 * event queue structure directly. So, there is no necessity to
515 * return EvQ read pointer.
519 static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge;
521 sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq)
523 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
525 struct sfc_efx_rx_sw_desc *rxd;
527 for (i = rxq->completed; i != rxq->added; ++i) {
528 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
529 rte_mbuf_raw_free(rxd->mbuf);
531 /* Packed stream relies on 0 in inactive SW desc.
532 * Rx queue stop is not performance critical, so
533 * there is no harm to do it always.
539 rxq->flags &= ~SFC_EFX_RXQ_FLAG_STARTED;
542 struct sfc_dp_rx sfc_efx_rx = {
544 .name = SFC_KVARG_DATAPATH_EFX,
548 .features = SFC_DP_RX_FEAT_SCATTER |
549 SFC_DP_RX_FEAT_CHECKSUM,
550 .qsize_up_rings = sfc_efx_rx_qsize_up_rings,
551 .qcreate = sfc_efx_rx_qcreate,
552 .qdestroy = sfc_efx_rx_qdestroy,
553 .qstart = sfc_efx_rx_qstart,
554 .qstop = sfc_efx_rx_qstop,
555 .qpurge = sfc_efx_rx_qpurge,
556 .supported_ptypes_get = sfc_efx_supported_ptypes_get,
557 .qdesc_npending = sfc_efx_rx_qdesc_npending,
558 .qdesc_status = sfc_efx_rx_qdesc_status,
559 .pkt_burst = sfc_efx_recv_pkts,
563 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
565 struct sfc_rxq_info *rxq_info;
567 unsigned int retry_count;
568 unsigned int wait_count;
571 rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
572 SFC_ASSERT(rxq_info->state & SFC_RXQ_STARTED);
574 rxq = &sa->rxq_ctrl[sw_index];
577 * Retry Rx queue flushing in the case of flush failed or
578 * timeout. In the worst case it can delay for 6 seconds.
580 for (retry_count = 0;
581 ((rxq_info->state & SFC_RXQ_FLUSHED) == 0) &&
582 (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
584 rc = efx_rx_qflush(rxq->common);
586 rxq_info->state |= (rc == EALREADY) ?
587 SFC_RXQ_FLUSHED : SFC_RXQ_FLUSH_FAILED;
590 rxq_info->state &= ~SFC_RXQ_FLUSH_FAILED;
591 rxq_info->state |= SFC_RXQ_FLUSHING;
594 * Wait for Rx queue flush done or failed event at least
595 * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
596 * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
597 * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
601 rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
602 sfc_ev_qpoll(rxq->evq);
603 } while ((rxq_info->state & SFC_RXQ_FLUSHING) &&
604 (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
606 if (rxq_info->state & SFC_RXQ_FLUSHING)
607 sfc_err(sa, "RxQ %u flush timed out", sw_index);
609 if (rxq_info->state & SFC_RXQ_FLUSH_FAILED)
610 sfc_err(sa, "RxQ %u flush failed", sw_index);
612 if (rxq_info->state & SFC_RXQ_FLUSHED)
613 sfc_notice(sa, "RxQ %u flushed", sw_index);
616 sa->priv.dp_rx->qpurge(rxq_info->dp);
620 sfc_rx_default_rxq_set_filter(struct sfc_adapter *sa, struct sfc_rxq *rxq)
622 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
623 boolean_t need_rss = (rss->channels > 0) ? B_TRUE : B_FALSE;
624 struct sfc_port *port = &sa->port;
628 * If promiscuous or all-multicast mode has been requested, setting
629 * filter for the default Rx queue might fail, in particular, while
630 * running over PCI function which is not a member of corresponding
631 * privilege groups; if this occurs, few iterations will be made to
632 * repeat this step without promiscuous and all-multicast flags set
635 rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common, need_rss);
638 else if (rc != EOPNOTSUPP)
642 sfc_warn(sa, "promiscuous mode has been requested, "
643 "but the HW rejects it");
644 sfc_warn(sa, "promiscuous mode will be disabled");
646 port->promisc = B_FALSE;
647 rc = sfc_set_rx_mode(sa);
654 if (port->allmulti) {
655 sfc_warn(sa, "all-multicast mode has been requested, "
656 "but the HW rejects it");
657 sfc_warn(sa, "all-multicast mode will be disabled");
659 port->allmulti = B_FALSE;
660 rc = sfc_set_rx_mode(sa);
671 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
673 struct sfc_rxq_info *rxq_info;
678 sfc_log_init(sa, "sw_index=%u", sw_index);
680 SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
682 rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
683 SFC_ASSERT(rxq_info->state == SFC_RXQ_INITIALIZED);
685 rxq = &sa->rxq_ctrl[sw_index];
688 rc = sfc_ev_qstart(evq, sfc_evq_index_by_rxq_sw_index(sa, sw_index));
692 switch (rxq_info->type) {
693 case EFX_RXQ_TYPE_DEFAULT:
694 rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
695 &rxq->mem, rxq_info->entries, 0 /* not used on EF10 */,
696 rxq_info->type_flags, evq->common, &rxq->common);
698 case EFX_RXQ_TYPE_ES_SUPER_BUFFER: {
699 struct rte_mempool *mp = rxq_info->refill_mb_pool;
700 struct rte_mempool_info mp_info;
702 rc = rte_mempool_ops_get_info(mp, &mp_info);
704 /* Positive errno is used in the driver */
706 goto fail_mp_get_info;
708 if (mp_info.contig_block_size <= 0) {
710 goto fail_bad_contig_block_size;
712 rc = efx_rx_qcreate_es_super_buffer(sa->nic, rxq->hw_index, 0,
713 mp_info.contig_block_size, rxq->buf_size,
714 mp->header_size + mp->elt_size + mp->trailer_size,
715 sa->rxd_wait_timeout_ns,
716 &rxq->mem, rxq_info->entries, rxq_info->type_flags,
717 evq->common, &rxq->common);
724 goto fail_rx_qcreate;
726 efx_rx_qenable(rxq->common);
728 rc = sa->priv.dp_rx->qstart(rxq_info->dp, evq->read_ptr);
732 rxq_info->state |= SFC_RXQ_STARTED;
734 if (sw_index == 0 && !sfc_sa2shared(sa)->isolated) {
735 rc = sfc_rx_default_rxq_set_filter(sa, rxq);
737 goto fail_mac_filter_default_rxq_set;
740 /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
741 sa->eth_dev->data->rx_queue_state[sw_index] =
742 RTE_ETH_QUEUE_STATE_STARTED;
746 fail_mac_filter_default_rxq_set:
747 sa->priv.dp_rx->qstop(rxq_info->dp, &rxq->evq->read_ptr);
750 sfc_rx_qflush(sa, sw_index);
753 fail_bad_contig_block_size:
762 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
764 struct sfc_rxq_info *rxq_info;
767 sfc_log_init(sa, "sw_index=%u", sw_index);
769 SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
771 rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
773 if (rxq_info->state == SFC_RXQ_INITIALIZED)
775 SFC_ASSERT(rxq_info->state & SFC_RXQ_STARTED);
777 /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
778 sa->eth_dev->data->rx_queue_state[sw_index] =
779 RTE_ETH_QUEUE_STATE_STOPPED;
781 rxq = &sa->rxq_ctrl[sw_index];
782 sa->priv.dp_rx->qstop(rxq_info->dp, &rxq->evq->read_ptr);
785 efx_mac_filter_default_rxq_clear(sa->nic);
787 sfc_rx_qflush(sa, sw_index);
789 rxq_info->state = SFC_RXQ_INITIALIZED;
791 efx_rx_qdestroy(rxq->common);
793 sfc_ev_qstop(rxq->evq);
797 sfc_rx_get_dev_offload_caps(struct sfc_adapter *sa)
799 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
802 caps |= DEV_RX_OFFLOAD_JUMBO_FRAME;
804 if (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_CHECKSUM) {
805 caps |= DEV_RX_OFFLOAD_IPV4_CKSUM;
806 caps |= DEV_RX_OFFLOAD_UDP_CKSUM;
807 caps |= DEV_RX_OFFLOAD_TCP_CKSUM;
810 if (encp->enc_tunnel_encapsulations_supported &&
811 (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
812 caps |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
818 sfc_rx_get_queue_offload_caps(struct sfc_adapter *sa)
822 if (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_SCATTER)
823 caps |= DEV_RX_OFFLOAD_SCATTER;
829 sfc_rx_qcheck_conf(struct sfc_adapter *sa, unsigned int rxq_max_fill_level,
830 const struct rte_eth_rxconf *rx_conf,
831 __rte_unused uint64_t offloads)
835 if (rx_conf->rx_thresh.pthresh != 0 ||
836 rx_conf->rx_thresh.hthresh != 0 ||
837 rx_conf->rx_thresh.wthresh != 0) {
839 "RxQ prefetch/host/writeback thresholds are not supported");
842 if (rx_conf->rx_free_thresh > rxq_max_fill_level) {
844 "RxQ free threshold too large: %u vs maximum %u",
845 rx_conf->rx_free_thresh, rxq_max_fill_level);
849 if (rx_conf->rx_drop_en == 0) {
850 sfc_err(sa, "RxQ drop disable is not supported");
858 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
863 /* The mbuf object itself is always cache line aligned */
864 order = rte_bsf32(RTE_CACHE_LINE_SIZE);
866 /* Data offset from mbuf object start */
867 data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
868 RTE_PKTMBUF_HEADROOM;
870 order = MIN(order, rte_bsf32(data_off));
876 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
878 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
879 const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
880 const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
882 unsigned int buf_aligned;
883 unsigned int start_alignment;
884 unsigned int end_padding_alignment;
886 /* Below it is assumed that both alignments are power of 2 */
887 SFC_ASSERT(rte_is_power_of_2(nic_align_start));
888 SFC_ASSERT(rte_is_power_of_2(nic_align_end));
891 * mbuf is always cache line aligned, double-check
892 * that it meets rx buffer start alignment requirements.
895 /* Start from mbuf pool data room size */
896 buf_size = rte_pktmbuf_data_room_size(mb_pool);
898 /* Remove headroom */
899 if (buf_size <= RTE_PKTMBUF_HEADROOM) {
901 "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
902 mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
905 buf_size -= RTE_PKTMBUF_HEADROOM;
907 /* Calculate guaranteed data start alignment */
908 buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
910 /* Reserve space for start alignment */
911 if (buf_aligned < nic_align_start) {
912 start_alignment = nic_align_start - buf_aligned;
913 if (buf_size <= start_alignment) {
915 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
917 rte_pktmbuf_data_room_size(mb_pool),
918 RTE_PKTMBUF_HEADROOM, start_alignment);
921 buf_aligned = nic_align_start;
922 buf_size -= start_alignment;
927 /* Make sure that end padding does not write beyond the buffer */
928 if (buf_aligned < nic_align_end) {
930 * Estimate space which can be lost. If guarnteed buffer
931 * size is odd, lost space is (nic_align_end - 1). More
932 * accurate formula is below.
934 end_padding_alignment = nic_align_end -
935 MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
936 if (buf_size <= end_padding_alignment) {
938 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
940 rte_pktmbuf_data_room_size(mb_pool),
941 RTE_PKTMBUF_HEADROOM, start_alignment,
942 end_padding_alignment);
945 buf_size -= end_padding_alignment;
948 * Start is aligned the same or better than end,
951 buf_size = P2ALIGN(buf_size, nic_align_end);
958 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
959 uint16_t nb_rx_desc, unsigned int socket_id,
960 const struct rte_eth_rxconf *rx_conf,
961 struct rte_mempool *mb_pool)
963 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
964 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
966 unsigned int rxq_entries;
967 unsigned int evq_entries;
968 unsigned int rxq_max_fill_level;
971 struct sfc_rxq_info *rxq_info;
974 struct sfc_dp_rx_qcreate_info info;
975 struct sfc_dp_rx_hw_limits hw_limits;
977 memset(&hw_limits, 0, sizeof(hw_limits));
978 hw_limits.rxq_max_entries = sa->rxq_max_entries;
979 hw_limits.rxq_min_entries = sa->rxq_min_entries;
980 hw_limits.evq_max_entries = sa->evq_max_entries;
981 hw_limits.evq_min_entries = sa->evq_min_entries;
983 rc = sa->priv.dp_rx->qsize_up_rings(nb_rx_desc, &hw_limits, mb_pool,
984 &rxq_entries, &evq_entries,
985 &rxq_max_fill_level);
987 goto fail_size_up_rings;
988 SFC_ASSERT(rxq_entries >= sa->rxq_min_entries);
989 SFC_ASSERT(rxq_entries <= sa->rxq_max_entries);
990 SFC_ASSERT(rxq_max_fill_level <= nb_rx_desc);
992 offloads = rx_conf->offloads |
993 sa->eth_dev->data->dev_conf.rxmode.offloads;
994 rc = sfc_rx_qcheck_conf(sa, rxq_max_fill_level, rx_conf, offloads);
998 buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
1000 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
1006 if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
1007 (~offloads & DEV_RX_OFFLOAD_SCATTER)) {
1008 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
1009 "object size is too small", sw_index);
1010 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
1011 "PDU size %u plus Rx prefix %u bytes",
1012 sw_index, buf_size, (unsigned int)sa->port.pdu,
1013 encp->enc_rx_prefix_size);
1018 SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
1019 rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
1021 SFC_ASSERT(rxq_entries <= rxq_info->max_entries);
1022 rxq_info->entries = rxq_entries;
1024 if (sa->priv.dp_rx->dp.hw_fw_caps & SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER)
1025 rxq_info->type = EFX_RXQ_TYPE_ES_SUPER_BUFFER;
1027 rxq_info->type = EFX_RXQ_TYPE_DEFAULT;
1029 rxq_info->type_flags =
1030 (offloads & DEV_RX_OFFLOAD_SCATTER) ?
1031 EFX_RXQ_FLAG_SCATTER : EFX_RXQ_FLAG_NONE;
1033 if ((encp->enc_tunnel_encapsulations_supported != 0) &&
1034 (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
1035 rxq_info->type_flags |= EFX_RXQ_FLAG_INNER_CLASSES;
1037 rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_RX, sw_index,
1038 evq_entries, socket_id, &evq);
1042 rxq = &sa->rxq_ctrl[sw_index];
1044 rxq->hw_index = sw_index;
1045 rxq_info->refill_threshold =
1046 RTE_MAX(rx_conf->rx_free_thresh, SFC_RX_REFILL_BULK);
1047 rxq_info->refill_mb_pool = mb_pool;
1048 rxq->buf_size = buf_size;
1050 rc = sfc_dma_alloc(sa, "rxq", sw_index,
1051 efx_rxq_size(sa->nic, rxq_info->entries),
1052 socket_id, &rxq->mem);
1054 goto fail_dma_alloc;
1056 memset(&info, 0, sizeof(info));
1057 info.refill_mb_pool = rxq_info->refill_mb_pool;
1058 info.max_fill_level = rxq_max_fill_level;
1059 info.refill_threshold = rxq_info->refill_threshold;
1060 info.buf_size = buf_size;
1061 info.batch_max = encp->enc_rx_batch_max;
1062 info.prefix_size = encp->enc_rx_prefix_size;
1064 if (rss->hash_support == EFX_RX_HASH_AVAILABLE && rss->channels > 0)
1065 info.flags |= SFC_RXQ_FLAG_RSS_HASH;
1067 info.rxq_entries = rxq_info->entries;
1068 info.rxq_hw_ring = rxq->mem.esm_base;
1069 info.evq_entries = evq_entries;
1070 info.evq_hw_ring = evq->mem.esm_base;
1071 info.hw_index = rxq->hw_index;
1072 info.mem_bar = sa->mem_bar.esb_base;
1073 info.vi_window_shift = encp->enc_vi_window_shift;
1075 rc = sa->priv.dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index,
1076 &RTE_ETH_DEV_TO_PCI(sa->eth_dev)->addr,
1077 socket_id, &info, &rxq_info->dp);
1079 goto fail_dp_rx_qcreate;
1081 evq->dp_rxq = rxq_info->dp;
1083 rxq_info->state = SFC_RXQ_INITIALIZED;
1085 rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
1090 sfc_dma_free(sa, &rxq->mem);
1096 rxq_info->entries = 0;
1100 sfc_log_init(sa, "failed %d", rc);
1105 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
1107 struct sfc_rxq_info *rxq_info;
1108 struct sfc_rxq *rxq;
1110 SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
1111 sa->eth_dev->data->rx_queues[sw_index] = NULL;
1113 rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
1115 SFC_ASSERT(rxq_info->state == SFC_RXQ_INITIALIZED);
1117 sa->priv.dp_rx->qdestroy(rxq_info->dp);
1118 rxq_info->dp = NULL;
1120 rxq_info->state &= ~SFC_RXQ_INITIALIZED;
1121 rxq_info->entries = 0;
1123 rxq = &sa->rxq_ctrl[sw_index];
1125 sfc_dma_free(sa, &rxq->mem);
1127 sfc_ev_qfini(rxq->evq);
1132 * Mapping between RTE RSS hash functions and their EFX counterparts.
1134 static const struct sfc_rss_hf_rte_to_efx sfc_rss_hf_map[] = {
1135 { ETH_RSS_NONFRAG_IPV4_TCP,
1136 EFX_RX_HASH(IPV4_TCP, 4TUPLE) },
1137 { ETH_RSS_NONFRAG_IPV4_UDP,
1138 EFX_RX_HASH(IPV4_UDP, 4TUPLE) },
1139 { ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX,
1140 EFX_RX_HASH(IPV6_TCP, 4TUPLE) },
1141 { ETH_RSS_NONFRAG_IPV6_UDP | ETH_RSS_IPV6_UDP_EX,
1142 EFX_RX_HASH(IPV6_UDP, 4TUPLE) },
1143 { ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_OTHER,
1144 EFX_RX_HASH(IPV4_TCP, 2TUPLE) | EFX_RX_HASH(IPV4_UDP, 2TUPLE) |
1145 EFX_RX_HASH(IPV4, 2TUPLE) },
1146 { ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | ETH_RSS_NONFRAG_IPV6_OTHER |
1148 EFX_RX_HASH(IPV6_TCP, 2TUPLE) | EFX_RX_HASH(IPV6_UDP, 2TUPLE) |
1149 EFX_RX_HASH(IPV6, 2TUPLE) }
1152 static efx_rx_hash_type_t
1153 sfc_rx_hash_types_mask_supp(efx_rx_hash_type_t hash_type,
1154 unsigned int *hash_type_flags_supported,
1155 unsigned int nb_hash_type_flags_supported)
1157 efx_rx_hash_type_t hash_type_masked = 0;
1160 for (i = 0; i < nb_hash_type_flags_supported; ++i) {
1161 unsigned int class_tuple_lbn[] = {
1162 EFX_RX_CLASS_IPV4_TCP_LBN,
1163 EFX_RX_CLASS_IPV4_UDP_LBN,
1164 EFX_RX_CLASS_IPV4_LBN,
1165 EFX_RX_CLASS_IPV6_TCP_LBN,
1166 EFX_RX_CLASS_IPV6_UDP_LBN,
1167 EFX_RX_CLASS_IPV6_LBN
1170 for (j = 0; j < RTE_DIM(class_tuple_lbn); ++j) {
1171 unsigned int tuple_mask = EFX_RX_CLASS_HASH_4TUPLE;
1174 tuple_mask <<= class_tuple_lbn[j];
1175 flag = hash_type & tuple_mask;
1177 if (flag == hash_type_flags_supported[i])
1178 hash_type_masked |= flag;
1182 return hash_type_masked;
1186 sfc_rx_hash_init(struct sfc_adapter *sa)
1188 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1189 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
1190 uint32_t alg_mask = encp->enc_rx_scale_hash_alg_mask;
1191 efx_rx_hash_alg_t alg;
1192 unsigned int flags_supp[EFX_RX_HASH_NFLAGS];
1193 unsigned int nb_flags_supp;
1194 struct sfc_rss_hf_rte_to_efx *hf_map;
1195 struct sfc_rss_hf_rte_to_efx *entry;
1196 efx_rx_hash_type_t efx_hash_types;
1200 if (alg_mask & (1U << EFX_RX_HASHALG_TOEPLITZ))
1201 alg = EFX_RX_HASHALG_TOEPLITZ;
1202 else if (alg_mask & (1U << EFX_RX_HASHALG_PACKED_STREAM))
1203 alg = EFX_RX_HASHALG_PACKED_STREAM;
1207 rc = efx_rx_scale_hash_flags_get(sa->nic, alg, flags_supp,
1208 RTE_DIM(flags_supp), &nb_flags_supp);
1212 hf_map = rte_calloc_socket("sfc-rss-hf-map",
1213 RTE_DIM(sfc_rss_hf_map),
1214 sizeof(*hf_map), 0, sa->socket_id);
1220 for (i = 0; i < RTE_DIM(sfc_rss_hf_map); ++i) {
1221 efx_rx_hash_type_t ht;
1223 ht = sfc_rx_hash_types_mask_supp(sfc_rss_hf_map[i].efx,
1224 flags_supp, nb_flags_supp);
1226 entry->rte = sfc_rss_hf_map[i].rte;
1228 efx_hash_types |= ht;
1233 rss->hash_alg = alg;
1234 rss->hf_map_nb_entries = (unsigned int)(entry - hf_map);
1235 rss->hf_map = hf_map;
1236 rss->hash_types = efx_hash_types;
1242 sfc_rx_hash_fini(struct sfc_adapter *sa)
1244 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1246 rte_free(rss->hf_map);
1250 sfc_rx_hf_rte_to_efx(struct sfc_adapter *sa, uint64_t rte,
1251 efx_rx_hash_type_t *efx)
1253 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1254 efx_rx_hash_type_t hash_types = 0;
1257 for (i = 0; i < rss->hf_map_nb_entries; ++i) {
1258 uint64_t rte_mask = rss->hf_map[i].rte;
1260 if ((rte & rte_mask) != 0) {
1262 hash_types |= rss->hf_map[i].efx;
1267 sfc_err(sa, "unsupported hash functions requested");
1277 sfc_rx_hf_efx_to_rte(struct sfc_rss *rss, efx_rx_hash_type_t efx)
1282 for (i = 0; i < rss->hf_map_nb_entries; ++i) {
1283 efx_rx_hash_type_t hash_type = rss->hf_map[i].efx;
1285 if ((efx & hash_type) == hash_type)
1286 rte |= rss->hf_map[i].rte;
1293 sfc_rx_process_adv_conf_rss(struct sfc_adapter *sa,
1294 struct rte_eth_rss_conf *conf)
1296 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1297 efx_rx_hash_type_t efx_hash_types = rss->hash_types;
1298 uint64_t rss_hf = sfc_rx_hf_efx_to_rte(rss, efx_hash_types);
1301 if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) {
1302 if ((conf->rss_hf != 0 && conf->rss_hf != rss_hf) ||
1303 conf->rss_key != NULL)
1307 if (conf->rss_hf != 0) {
1308 rc = sfc_rx_hf_rte_to_efx(sa, conf->rss_hf, &efx_hash_types);
1313 if (conf->rss_key != NULL) {
1314 if (conf->rss_key_len != sizeof(rss->key)) {
1315 sfc_err(sa, "RSS key size is wrong (should be %lu)",
1319 rte_memcpy(rss->key, conf->rss_key, sizeof(rss->key));
1322 rss->hash_types = efx_hash_types;
1328 sfc_rx_rss_config(struct sfc_adapter *sa)
1330 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1333 if (rss->channels > 0) {
1334 rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1335 rss->hash_alg, rss->hash_types,
1340 rc = efx_rx_scale_key_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1341 rss->key, sizeof(rss->key));
1345 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1346 rss->tbl, RTE_DIM(rss->tbl));
1354 sfc_rx_start(struct sfc_adapter *sa)
1356 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1357 unsigned int sw_index;
1360 sfc_log_init(sa, "rxq_count=%u", sas->rxq_count);
1362 rc = efx_rx_init(sa->nic);
1366 rc = sfc_rx_rss_config(sa);
1368 goto fail_rss_config;
1370 for (sw_index = 0; sw_index < sas->rxq_count; ++sw_index) {
1371 if (sas->rxq_info[sw_index].state == SFC_RXQ_INITIALIZED &&
1372 (!sas->rxq_info[sw_index].deferred_start ||
1373 sas->rxq_info[sw_index].deferred_started)) {
1374 rc = sfc_rx_qstart(sa, sw_index);
1376 goto fail_rx_qstart;
1383 while (sw_index-- > 0)
1384 sfc_rx_qstop(sa, sw_index);
1387 efx_rx_fini(sa->nic);
1390 sfc_log_init(sa, "failed %d", rc);
1395 sfc_rx_stop(struct sfc_adapter *sa)
1397 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1398 unsigned int sw_index;
1400 sfc_log_init(sa, "rxq_count=%u", sas->rxq_count);
1402 sw_index = sas->rxq_count;
1403 while (sw_index-- > 0) {
1404 if (sas->rxq_info[sw_index].state & SFC_RXQ_STARTED)
1405 sfc_rx_qstop(sa, sw_index);
1408 efx_rx_fini(sa->nic);
1412 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
1414 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1415 struct sfc_rxq_info *rxq_info = &sas->rxq_info[sw_index];
1416 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
1417 unsigned int max_entries;
1419 max_entries = encp->enc_rxq_max_ndescs;
1420 SFC_ASSERT(rte_is_power_of_2(max_entries));
1422 rxq_info->max_entries = max_entries;
1428 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
1430 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1431 uint64_t offloads_supported = sfc_rx_get_dev_offload_caps(sa) |
1432 sfc_rx_get_queue_offload_caps(sa);
1433 struct sfc_rss *rss = &sas->rss;
1436 switch (rxmode->mq_mode) {
1437 case ETH_MQ_RX_NONE:
1438 /* No special checks are required */
1441 if (rss->context_type == EFX_RX_SCALE_UNAVAILABLE) {
1442 sfc_err(sa, "RSS is not available");
1447 sfc_err(sa, "Rx multi-queue mode %u not supported",
1453 * Requested offloads are validated against supported by ethdev,
1454 * so unsupported offloads cannot be added as the result of
1457 if ((rxmode->offloads & DEV_RX_OFFLOAD_CHECKSUM) !=
1458 (offloads_supported & DEV_RX_OFFLOAD_CHECKSUM)) {
1459 sfc_warn(sa, "Rx checksum offloads cannot be disabled - always on (IPv4/TCP/UDP)");
1460 rxmode->offloads |= DEV_RX_OFFLOAD_CHECKSUM;
1463 if ((offloads_supported & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) &&
1464 (~rxmode->offloads & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)) {
1465 sfc_warn(sa, "Rx outer IPv4 checksum offload cannot be disabled - always on");
1466 rxmode->offloads |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
1473 * Destroy excess queues that are no longer needed after reconfiguration
1474 * or complete close.
1477 sfc_rx_fini_queues(struct sfc_adapter *sa, unsigned int nb_rx_queues)
1479 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1482 SFC_ASSERT(nb_rx_queues <= sas->rxq_count);
1484 sw_index = sas->rxq_count;
1485 while (--sw_index >= (int)nb_rx_queues) {
1486 if (sas->rxq_info[sw_index].state & SFC_RXQ_INITIALIZED)
1487 sfc_rx_qfini(sa, sw_index);
1490 sas->rxq_count = nb_rx_queues;
1494 * Initialize Rx subsystem.
1496 * Called at device (re)configuration stage when number of receive queues is
1497 * specified together with other device level receive configuration.
1499 * It should be used to allocate NUMA-unaware resources.
1502 sfc_rx_configure(struct sfc_adapter *sa)
1504 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1505 struct sfc_rss *rss = &sas->rss;
1506 struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
1507 const unsigned int nb_rx_queues = sa->eth_dev->data->nb_rx_queues;
1510 sfc_log_init(sa, "nb_rx_queues=%u (old %u)",
1511 nb_rx_queues, sas->rxq_count);
1513 rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
1515 goto fail_check_mode;
1517 if (nb_rx_queues == sas->rxq_count)
1520 if (sas->rxq_info == NULL) {
1522 sas->rxq_info = rte_calloc_socket("sfc-rxqs", nb_rx_queues,
1523 sizeof(sas->rxq_info[0]), 0,
1525 if (sas->rxq_info == NULL)
1526 goto fail_rxqs_alloc;
1529 * Allocate primary process only RxQ control from heap
1530 * since it should not be shared.
1533 sa->rxq_ctrl = calloc(nb_rx_queues, sizeof(sa->rxq_ctrl[0]));
1534 if (sa->rxq_ctrl == NULL)
1535 goto fail_rxqs_ctrl_alloc;
1537 struct sfc_rxq_info *new_rxq_info;
1538 struct sfc_rxq *new_rxq_ctrl;
1540 if (nb_rx_queues < sas->rxq_count)
1541 sfc_rx_fini_queues(sa, nb_rx_queues);
1545 rte_realloc(sas->rxq_info,
1546 nb_rx_queues * sizeof(sas->rxq_info[0]), 0);
1547 if (new_rxq_info == NULL && nb_rx_queues > 0)
1548 goto fail_rxqs_realloc;
1551 new_rxq_ctrl = realloc(sa->rxq_ctrl,
1552 nb_rx_queues * sizeof(sa->rxq_ctrl[0]));
1553 if (new_rxq_ctrl == NULL && nb_rx_queues > 0)
1554 goto fail_rxqs_ctrl_realloc;
1556 sas->rxq_info = new_rxq_info;
1557 sa->rxq_ctrl = new_rxq_ctrl;
1558 if (nb_rx_queues > sas->rxq_count) {
1559 memset(&sas->rxq_info[sas->rxq_count], 0,
1560 (nb_rx_queues - sas->rxq_count) *
1561 sizeof(sas->rxq_info[0]));
1562 memset(&sa->rxq_ctrl[sas->rxq_count], 0,
1563 (nb_rx_queues - sas->rxq_count) *
1564 sizeof(sa->rxq_ctrl[0]));
1568 while (sas->rxq_count < nb_rx_queues) {
1569 rc = sfc_rx_qinit_info(sa, sas->rxq_count);
1571 goto fail_rx_qinit_info;
1577 rss->channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
1578 MIN(sas->rxq_count, EFX_MAXRSS) : 0;
1580 if (rss->channels > 0) {
1581 struct rte_eth_rss_conf *adv_conf_rss;
1582 unsigned int sw_index;
1584 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
1585 rss->tbl[sw_index] = sw_index % rss->channels;
1587 adv_conf_rss = &dev_conf->rx_adv_conf.rss_conf;
1588 rc = sfc_rx_process_adv_conf_rss(sa, adv_conf_rss);
1590 goto fail_rx_process_adv_conf_rss;
1595 fail_rx_process_adv_conf_rss:
1597 fail_rxqs_ctrl_realloc:
1599 fail_rxqs_ctrl_alloc:
1604 sfc_log_init(sa, "failed %d", rc);
1609 * Shutdown Rx subsystem.
1611 * Called at device close stage, for example, before device shutdown.
1614 sfc_rx_close(struct sfc_adapter *sa)
1616 struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1618 sfc_rx_fini_queues(sa, 0);
1623 sa->rxq_ctrl = NULL;
1625 rte_free(sfc_sa2shared(sa)->rxq_info);
1626 sfc_sa2shared(sa)->rxq_info = NULL;