2 * Copyright (c) 2016 Solarflare Communications Inc.
5 * This software was jointly developed between OKTET Labs (under contract
6 * for Solarflare) and Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #include <rte_mempool.h>
35 #include "sfc_debug.h"
39 #include "sfc_tweak.h"
42 * Maximum number of Rx queue flush attempt in the case of failure or
45 #define SFC_RX_QFLUSH_ATTEMPTS (3)
48 * Time to wait between event queue polling attempts when waiting for Rx
49 * queue flush done or failed events.
51 #define SFC_RX_QFLUSH_POLL_WAIT_MS (1)
54 * Maximum number of event queue polling attempts when waiting for Rx queue
55 * flush done or failed events. It defines Rx queue flush attempt timeout
56 * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
58 #define SFC_RX_QFLUSH_POLL_ATTEMPTS (2000)
61 sfc_rx_qflush_done(struct sfc_rxq *rxq)
63 rxq->state |= SFC_RXQ_FLUSHED;
64 rxq->state &= ~SFC_RXQ_FLUSHING;
68 sfc_rx_qflush_failed(struct sfc_rxq *rxq)
70 rxq->state |= SFC_RXQ_FLUSH_FAILED;
71 rxq->state &= ~SFC_RXQ_FLUSHING;
75 sfc_rx_qrefill(struct sfc_rxq *rxq)
77 unsigned int free_space;
79 void *objs[SFC_RX_REFILL_BULK];
80 efsys_dma_addr_t addr[RTE_DIM(objs)];
81 unsigned int added = rxq->added;
84 struct sfc_rx_sw_desc *rxd;
86 uint8_t port_id = rxq->port_id;
88 free_space = EFX_RXQ_LIMIT(rxq->ptr_mask + 1) -
89 (added - rxq->completed);
91 if (free_space < rxq->refill_threshold)
94 bulks = free_space / RTE_DIM(objs);
96 id = added & rxq->ptr_mask;
98 if (rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
101 * It is hardly a safe way to increment counter
102 * from different contexts, but all PMDs do it.
104 rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
109 for (i = 0; i < RTE_DIM(objs);
110 ++i, id = (id + 1) & rxq->ptr_mask) {
113 rxd = &rxq->sw_desc[id];
116 rte_mbuf_refcnt_set(m, 1);
117 m->data_off = RTE_PKTMBUF_HEADROOM;
122 addr[i] = rte_pktmbuf_mtophys(m);
125 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
126 RTE_DIM(objs), rxq->completed, added);
127 added += RTE_DIM(objs);
130 /* Push doorbell if something is posted */
131 if (rxq->added != added) {
133 efx_rx_qpush(rxq->common, added, &rxq->pushed);
138 sfc_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
140 uint64_t mbuf_flags = 0;
142 switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
143 case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
144 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
147 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
150 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
151 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
152 PKT_RX_IP_CKSUM_UNKNOWN);
156 switch ((desc_flags &
157 (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
158 case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
159 case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
160 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
164 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
167 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
168 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
169 PKT_RX_L4_CKSUM_UNKNOWN);
177 sfc_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
179 return RTE_PTYPE_L2_ETHER |
180 ((desc_flags & EFX_PKT_IPV4) ?
181 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
182 ((desc_flags & EFX_PKT_IPV6) ?
183 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
184 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
185 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
189 sfc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
191 struct sfc_rxq *rxq = rx_queue;
192 unsigned int completed;
193 unsigned int prefix_size = rxq->prefix_size;
194 unsigned int done_pkts = 0;
195 boolean_t discard_next = B_FALSE;
196 struct rte_mbuf *scatter_pkt = NULL;
198 if (unlikely((rxq->state & SFC_RXQ_RUNNING) == 0))
201 sfc_ev_qpoll(rxq->evq);
203 completed = rxq->completed;
204 while (completed != rxq->pending && done_pkts < nb_pkts) {
206 struct sfc_rx_sw_desc *rxd;
208 unsigned int seg_len;
209 unsigned int desc_flags;
211 id = completed++ & rxq->ptr_mask;
212 rxd = &rxq->sw_desc[id];
214 desc_flags = rxd->flags;
219 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
222 if (desc_flags & EFX_PKT_PREFIX_LEN) {
226 rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
227 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
231 seg_len = rxd->size - prefix_size;
234 m->data_off += prefix_size;
235 rte_pktmbuf_data_len(m) = seg_len;
236 rte_pktmbuf_pkt_len(m) = seg_len;
238 if (scatter_pkt != NULL) {
239 if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
240 rte_mempool_put(rxq->refill_mb_pool,
244 /* The packet to deliver */
248 if (desc_flags & EFX_PKT_CONT) {
249 /* The packet is scattered, more fragments to come */
251 /* Futher fragments have no prefix */
256 /* Scattered packet is done */
258 /* The first fragment of the packet has prefix */
259 prefix_size = rxq->prefix_size;
261 m->ol_flags = sfc_rx_desc_flags_to_offload_flags(desc_flags);
262 m->packet_type = sfc_rx_desc_flags_to_packet_type(desc_flags);
269 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
270 rte_mempool_put(rxq->refill_mb_pool, m);
274 /* pending is only moved when entire packet is received */
275 SFC_ASSERT(scatter_pkt == NULL);
277 rxq->completed = completed;
285 sfc_rx_qdesc_npending(struct sfc_adapter *sa, unsigned int sw_index)
289 SFC_ASSERT(sw_index < sa->rxq_count);
290 rxq = sa->rxq_info[sw_index].rxq;
292 if (rxq == NULL || (rxq->state & SFC_RXQ_RUNNING) == 0)
295 sfc_ev_qpoll(rxq->evq);
297 return rxq->pending - rxq->completed;
301 sfc_rx_qdesc_done(struct sfc_rxq *rxq, unsigned int offset)
303 if ((rxq->state & SFC_RXQ_RUNNING) == 0)
306 sfc_ev_qpoll(rxq->evq);
308 return offset < (rxq->pending - rxq->completed);
312 sfc_rx_qpurge(struct sfc_rxq *rxq)
315 struct sfc_rx_sw_desc *rxd;
317 for (i = rxq->completed; i != rxq->added; ++i) {
318 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
319 rte_mempool_put(rxq->refill_mb_pool, rxd->mbuf);
325 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
328 unsigned int retry_count;
329 unsigned int wait_count;
331 rxq = sa->rxq_info[sw_index].rxq;
332 SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
335 * Retry Rx queue flushing in the case of flush failed or
336 * timeout. In the worst case it can delay for 6 seconds.
338 for (retry_count = 0;
339 ((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
340 (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
342 if (efx_rx_qflush(rxq->common) != 0) {
343 rxq->state |= SFC_RXQ_FLUSH_FAILED;
346 rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
347 rxq->state |= SFC_RXQ_FLUSHING;
350 * Wait for Rx queue flush done or failed event at least
351 * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
352 * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
353 * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
357 rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
358 sfc_ev_qpoll(rxq->evq);
359 } while ((rxq->state & SFC_RXQ_FLUSHING) &&
360 (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
362 if (rxq->state & SFC_RXQ_FLUSHING)
363 sfc_err(sa, "RxQ %u flush timed out", sw_index);
365 if (rxq->state & SFC_RXQ_FLUSH_FAILED)
366 sfc_err(sa, "RxQ %u flush failed", sw_index);
368 if (rxq->state & SFC_RXQ_FLUSHED)
369 sfc_info(sa, "RxQ %u flushed", sw_index);
376 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
378 struct sfc_rxq_info *rxq_info;
383 sfc_log_init(sa, "sw_index=%u", sw_index);
385 SFC_ASSERT(sw_index < sa->rxq_count);
387 rxq_info = &sa->rxq_info[sw_index];
389 SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
393 rc = sfc_ev_qstart(sa, evq->evq_index);
397 rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
398 &rxq->mem, rxq_info->entries,
399 0 /* not used on EF10 */, evq->common,
402 goto fail_rx_qcreate;
404 efx_rx_qenable(rxq->common);
406 rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
408 rxq->state |= (SFC_RXQ_STARTED | SFC_RXQ_RUNNING);
413 rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common,
414 (sa->rss_channels > 1) ?
417 goto fail_mac_filter_default_rxq_set;
420 /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
421 sa->eth_dev->data->rx_queue_state[sw_index] =
422 RTE_ETH_QUEUE_STATE_STARTED;
426 fail_mac_filter_default_rxq_set:
427 sfc_rx_qflush(sa, sw_index);
430 sfc_ev_qstop(sa, evq->evq_index);
437 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
439 struct sfc_rxq_info *rxq_info;
442 sfc_log_init(sa, "sw_index=%u", sw_index);
444 SFC_ASSERT(sw_index < sa->rxq_count);
446 rxq_info = &sa->rxq_info[sw_index];
449 if (rxq->state == SFC_RXQ_INITIALIZED)
451 SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
453 /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
454 sa->eth_dev->data->rx_queue_state[sw_index] =
455 RTE_ETH_QUEUE_STATE_STOPPED;
457 rxq->state &= ~SFC_RXQ_RUNNING;
460 efx_mac_filter_default_rxq_clear(sa->nic);
462 sfc_rx_qflush(sa, sw_index);
464 rxq->state = SFC_RXQ_INITIALIZED;
466 efx_rx_qdestroy(rxq->common);
468 sfc_ev_qstop(sa, rxq->evq->evq_index);
472 sfc_rx_qcheck_conf(struct sfc_adapter *sa, uint16_t nb_rx_desc,
473 const struct rte_eth_rxconf *rx_conf)
475 const uint16_t rx_free_thresh_max = EFX_RXQ_LIMIT(nb_rx_desc);
478 if (rx_conf->rx_thresh.pthresh != 0 ||
479 rx_conf->rx_thresh.hthresh != 0 ||
480 rx_conf->rx_thresh.wthresh != 0) {
482 "RxQ prefetch/host/writeback thresholds are not supported");
486 if (rx_conf->rx_free_thresh > rx_free_thresh_max) {
488 "RxQ free threshold too large: %u vs maximum %u",
489 rx_conf->rx_free_thresh, rx_free_thresh_max);
493 if (rx_conf->rx_drop_en == 0) {
494 sfc_err(sa, "RxQ drop disable is not supported");
502 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
507 /* The mbuf object itself is always cache line aligned */
508 order = rte_bsf32(RTE_CACHE_LINE_SIZE);
510 /* Data offset from mbuf object start */
511 data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
512 RTE_PKTMBUF_HEADROOM;
514 order = MIN(order, rte_bsf32(data_off));
516 return 1u << (order - 1);
520 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
522 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
523 const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
524 const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
526 unsigned int buf_aligned;
527 unsigned int start_alignment;
528 unsigned int end_padding_alignment;
530 /* Below it is assumed that both alignments are power of 2 */
531 SFC_ASSERT(rte_is_power_of_2(nic_align_start));
532 SFC_ASSERT(rte_is_power_of_2(nic_align_end));
535 * mbuf is always cache line aligned, double-check
536 * that it meets rx buffer start alignment requirements.
539 /* Start from mbuf pool data room size */
540 buf_size = rte_pktmbuf_data_room_size(mb_pool);
542 /* Remove headroom */
543 if (buf_size <= RTE_PKTMBUF_HEADROOM) {
545 "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
546 mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
549 buf_size -= RTE_PKTMBUF_HEADROOM;
551 /* Calculate guaranteed data start alignment */
552 buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
554 /* Reserve space for start alignment */
555 if (buf_aligned < nic_align_start) {
556 start_alignment = nic_align_start - buf_aligned;
557 if (buf_size <= start_alignment) {
559 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
561 rte_pktmbuf_data_room_size(mb_pool),
562 RTE_PKTMBUF_HEADROOM, start_alignment);
565 buf_aligned = nic_align_start;
566 buf_size -= start_alignment;
571 /* Make sure that end padding does not write beyond the buffer */
572 if (buf_aligned < nic_align_end) {
574 * Estimate space which can be lost. If guarnteed buffer
575 * size is odd, lost space is (nic_align_end - 1). More
576 * accurate formula is below.
578 end_padding_alignment = nic_align_end -
579 MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
580 if (buf_size <= end_padding_alignment) {
582 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
584 rte_pktmbuf_data_room_size(mb_pool),
585 RTE_PKTMBUF_HEADROOM, start_alignment,
586 end_padding_alignment);
589 buf_size -= end_padding_alignment;
592 * Start is aligned the same or better than end,
595 buf_size = P2ALIGN(buf_size, nic_align_end);
602 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
603 uint16_t nb_rx_desc, unsigned int socket_id,
604 const struct rte_eth_rxconf *rx_conf,
605 struct rte_mempool *mb_pool)
607 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
610 struct sfc_rxq_info *rxq_info;
611 unsigned int evq_index;
615 rc = sfc_rx_qcheck_conf(sa, nb_rx_desc, rx_conf);
619 buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
621 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
627 if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
628 !sa->eth_dev->data->dev_conf.rxmode.enable_scatter) {
629 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
630 "object size is too small", sw_index);
631 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
632 "PDU size %u plus Rx prefix %u bytes",
633 sw_index, buf_size, (unsigned int)sa->port.pdu,
634 encp->enc_rx_prefix_size);
639 SFC_ASSERT(sw_index < sa->rxq_count);
640 rxq_info = &sa->rxq_info[sw_index];
642 SFC_ASSERT(nb_rx_desc <= rxq_info->max_entries);
643 rxq_info->entries = nb_rx_desc;
645 sa->eth_dev->data->dev_conf.rxmode.enable_scatter ?
646 EFX_RXQ_TYPE_SCATTER : EFX_RXQ_TYPE_DEFAULT;
648 evq_index = sfc_evq_index_by_rxq_sw_index(sa, sw_index);
650 rc = sfc_ev_qinit(sa, evq_index, rxq_info->entries, socket_id);
654 evq = sa->evq_info[evq_index].evq;
657 rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
662 rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
663 socket_id, &rxq->mem);
668 rxq->sw_desc = rte_calloc_socket("sfc-rxq-sw_desc", rxq_info->entries,
669 sizeof(*rxq->sw_desc),
670 RTE_CACHE_LINE_SIZE, socket_id);
671 if (rxq->sw_desc == NULL)
672 goto fail_desc_alloc;
676 rxq->ptr_mask = rxq_info->entries - 1;
677 rxq->refill_threshold = rx_conf->rx_free_thresh;
678 rxq->refill_mb_pool = mb_pool;
679 rxq->buf_size = buf_size;
680 rxq->hw_index = sw_index;
681 rxq->port_id = sa->eth_dev->data->port_id;
683 /* Cache limits required on datapath in RxQ structure */
684 rxq->batch_max = encp->enc_rx_batch_max;
685 rxq->prefix_size = encp->enc_rx_prefix_size;
687 #if EFSYS_OPT_RX_SCALE
688 if (sa->hash_support == EFX_RX_HASH_AVAILABLE)
689 rxq->flags |= SFC_RXQ_RSS_HASH;
692 rxq->state = SFC_RXQ_INITIALIZED;
695 rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
700 sfc_dma_free(sa, &rxq->mem);
706 sfc_ev_qfini(sa, evq_index);
709 rxq_info->entries = 0;
712 sfc_log_init(sa, "failed %d", rc);
717 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
719 struct sfc_rxq_info *rxq_info;
722 SFC_ASSERT(sw_index < sa->rxq_count);
724 rxq_info = &sa->rxq_info[sw_index];
727 SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
729 rxq_info->rxq = NULL;
730 rxq_info->entries = 0;
732 rte_free(rxq->sw_desc);
733 sfc_dma_free(sa, &rxq->mem);
737 #if EFSYS_OPT_RX_SCALE
739 sfc_rte_to_efx_hash_type(uint64_t rss_hf)
741 efx_rx_hash_type_t efx_hash_types = 0;
743 if ((rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
744 ETH_RSS_NONFRAG_IPV4_OTHER)) != 0)
745 efx_hash_types |= EFX_RX_HASH_IPV4;
747 if ((rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) != 0)
748 efx_hash_types |= EFX_RX_HASH_TCPIPV4;
750 if ((rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
751 ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX)) != 0)
752 efx_hash_types |= EFX_RX_HASH_IPV6;
754 if ((rss_hf & (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX)) != 0)
755 efx_hash_types |= EFX_RX_HASH_TCPIPV6;
757 return efx_hash_types;
762 sfc_rx_rss_config(struct sfc_adapter *sa)
766 #if EFSYS_OPT_RX_SCALE
767 if (sa->rss_channels > 1) {
768 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
769 sa->rss_hash_types, B_TRUE);
773 rc = efx_rx_scale_key_set(sa->nic, sa->rss_key,
774 sizeof(sa->rss_key));
778 rc = efx_rx_scale_tbl_set(sa->nic, sa->rss_tbl,
779 sizeof(sa->rss_tbl));
788 sfc_rx_start(struct sfc_adapter *sa)
790 unsigned int sw_index;
793 sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
795 rc = efx_rx_init(sa->nic);
799 rc = sfc_rx_rss_config(sa);
801 goto fail_rss_config;
803 for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
804 if ((!sa->rxq_info[sw_index].deferred_start ||
805 sa->rxq_info[sw_index].deferred_started)) {
806 rc = sfc_rx_qstart(sa, sw_index);
815 while (sw_index-- > 0)
816 sfc_rx_qstop(sa, sw_index);
819 efx_rx_fini(sa->nic);
822 sfc_log_init(sa, "failed %d", rc);
827 sfc_rx_stop(struct sfc_adapter *sa)
829 unsigned int sw_index;
831 sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
833 sw_index = sa->rxq_count;
834 while (sw_index-- > 0) {
835 if (sa->rxq_info[sw_index].rxq != NULL)
836 sfc_rx_qstop(sa, sw_index);
839 efx_rx_fini(sa->nic);
843 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
845 struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
846 unsigned int max_entries;
848 max_entries = EFX_RXQ_MAXNDESCS;
849 SFC_ASSERT(rte_is_power_of_2(max_entries));
851 rxq_info->max_entries = max_entries;
857 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
861 switch (rxmode->mq_mode) {
863 /* No special checks are required */
865 #if EFSYS_OPT_RX_SCALE
867 if (sa->rss_support == EFX_RX_SCALE_UNAVAILABLE) {
868 sfc_err(sa, "RSS is not available");
874 sfc_err(sa, "Rx multi-queue mode %u not supported",
879 if (rxmode->header_split) {
880 sfc_err(sa, "Header split on Rx not supported");
884 if (rxmode->hw_vlan_filter) {
885 sfc_err(sa, "HW VLAN filtering not supported");
889 if (rxmode->hw_vlan_strip) {
890 sfc_err(sa, "HW VLAN stripping not supported");
894 if (rxmode->hw_vlan_extend) {
896 "Q-in-Q HW VLAN stripping not supported");
900 if (!rxmode->hw_strip_crc) {
902 "FCS stripping control not supported - always stripped");
903 rxmode->hw_strip_crc = 1;
906 if (rxmode->enable_lro) {
907 sfc_err(sa, "LRO not supported");
915 * Initialize Rx subsystem.
917 * Called at device configuration stage when number of receive queues is
918 * specified together with other device level receive configuration.
920 * It should be used to allocate NUMA-unaware resources.
923 sfc_rx_init(struct sfc_adapter *sa)
925 struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
926 unsigned int sw_index;
929 rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
931 goto fail_check_mode;
933 sa->rxq_count = sa->eth_dev->data->nb_rx_queues;
936 sa->rxq_info = rte_calloc_socket("sfc-rxqs", sa->rxq_count,
937 sizeof(struct sfc_rxq_info), 0,
939 if (sa->rxq_info == NULL)
940 goto fail_rxqs_alloc;
942 for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
943 rc = sfc_rx_qinit_info(sa, sw_index);
945 goto fail_rx_qinit_info;
948 #if EFSYS_OPT_RX_SCALE
949 sa->rss_channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
950 MIN(sa->rxq_count, EFX_MAXRSS) : 1;
952 if (sa->rss_channels > 1) {
953 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
954 sa->rss_tbl[sw_index] = sw_index % sa->rss_channels;
961 rte_free(sa->rxq_info);
967 sfc_log_init(sa, "failed %d", rc);
972 * Shutdown Rx subsystem.
974 * Called at device close stage, for example, before device
975 * reconfiguration or shutdown.
978 sfc_rx_fini(struct sfc_adapter *sa)
980 unsigned int sw_index;
982 sw_index = sa->rxq_count;
983 while (sw_index-- > 0) {
984 if (sa->rxq_info[sw_index].rxq != NULL)
985 sfc_rx_qfini(sa, sw_index);
988 rte_free(sa->rxq_info);