4 * Copyright (c) 2016-2017 Solarflare Communications Inc.
7 * This software was jointly developed between OKTET Labs (under contract
8 * for Solarflare) and Solarflare Communications, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #include <rte_mempool.h>
37 #include "sfc_debug.h"
41 #include "sfc_kvargs.h"
42 #include "sfc_tweak.h"
45 * Maximum number of Rx queue flush attempt in the case of failure or
48 #define SFC_RX_QFLUSH_ATTEMPTS (3)
51 * Time to wait between event queue polling attempts when waiting for Rx
52 * queue flush done or failed events.
54 #define SFC_RX_QFLUSH_POLL_WAIT_MS (1)
57 * Maximum number of event queue polling attempts when waiting for Rx queue
58 * flush done or failed events. It defines Rx queue flush attempt timeout
59 * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
61 #define SFC_RX_QFLUSH_POLL_ATTEMPTS (2000)
64 sfc_rx_qflush_done(struct sfc_rxq *rxq)
66 rxq->state |= SFC_RXQ_FLUSHED;
67 rxq->state &= ~SFC_RXQ_FLUSHING;
71 sfc_rx_qflush_failed(struct sfc_rxq *rxq)
73 rxq->state |= SFC_RXQ_FLUSH_FAILED;
74 rxq->state &= ~SFC_RXQ_FLUSHING;
78 sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq)
80 unsigned int free_space;
82 void *objs[SFC_RX_REFILL_BULK];
83 efsys_dma_addr_t addr[RTE_DIM(objs)];
84 unsigned int added = rxq->added;
87 struct sfc_efx_rx_sw_desc *rxd;
89 uint16_t port_id = rxq->dp.dpq.port_id;
91 free_space = EFX_RXQ_LIMIT(rxq->ptr_mask + 1) -
92 (added - rxq->completed);
94 if (free_space < rxq->refill_threshold)
97 bulks = free_space / RTE_DIM(objs);
99 id = added & rxq->ptr_mask;
100 while (bulks-- > 0) {
101 if (rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
102 RTE_DIM(objs)) < 0) {
104 * It is hardly a safe way to increment counter
105 * from different contexts, but all PMDs do it.
107 rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
112 for (i = 0; i < RTE_DIM(objs);
113 ++i, id = (id + 1) & rxq->ptr_mask) {
116 rxd = &rxq->sw_desc[id];
119 rte_mbuf_refcnt_set(m, 1);
120 m->data_off = RTE_PKTMBUF_HEADROOM;
125 addr[i] = rte_pktmbuf_mtophys(m);
128 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
129 RTE_DIM(objs), rxq->completed, added);
130 added += RTE_DIM(objs);
133 /* Push doorbell if something is posted */
134 if (rxq->added != added) {
136 efx_rx_qpush(rxq->common, added, &rxq->pushed);
141 sfc_efx_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
143 uint64_t mbuf_flags = 0;
145 switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
146 case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
147 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
150 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
153 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
154 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
155 PKT_RX_IP_CKSUM_UNKNOWN);
159 switch ((desc_flags &
160 (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
161 case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
162 case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
163 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
167 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
170 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
171 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
172 PKT_RX_L4_CKSUM_UNKNOWN);
180 sfc_efx_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
182 return RTE_PTYPE_L2_ETHER |
183 ((desc_flags & EFX_PKT_IPV4) ?
184 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
185 ((desc_flags & EFX_PKT_IPV6) ?
186 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
187 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
188 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
191 static const uint32_t *
192 sfc_efx_supported_ptypes_get(void)
194 static const uint32_t ptypes[] = {
196 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
197 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
207 sfc_efx_rx_set_rss_hash(struct sfc_efx_rxq *rxq, unsigned int flags,
210 #if EFSYS_OPT_RX_SCALE
214 if ((rxq->flags & SFC_EFX_RXQ_FLAG_RSS_HASH) == 0)
217 mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
219 if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
220 m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
221 EFX_RX_HASHALG_TOEPLITZ,
224 m->ol_flags |= PKT_RX_RSS_HASH;
230 sfc_efx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
232 struct sfc_dp_rxq *dp_rxq = rx_queue;
233 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
234 unsigned int completed;
235 unsigned int prefix_size = rxq->prefix_size;
236 unsigned int done_pkts = 0;
237 boolean_t discard_next = B_FALSE;
238 struct rte_mbuf *scatter_pkt = NULL;
240 if (unlikely((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0))
243 sfc_ev_qpoll(rxq->evq);
245 completed = rxq->completed;
246 while (completed != rxq->pending && done_pkts < nb_pkts) {
248 struct sfc_efx_rx_sw_desc *rxd;
250 unsigned int seg_len;
251 unsigned int desc_flags;
253 id = completed++ & rxq->ptr_mask;
254 rxd = &rxq->sw_desc[id];
256 desc_flags = rxd->flags;
261 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
264 if (desc_flags & EFX_PKT_PREFIX_LEN) {
268 rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
269 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
273 seg_len = rxd->size - prefix_size;
276 rte_pktmbuf_data_len(m) = seg_len;
277 rte_pktmbuf_pkt_len(m) = seg_len;
279 if (scatter_pkt != NULL) {
280 if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
281 rte_mempool_put(rxq->refill_mb_pool,
285 /* The packet to deliver */
289 if (desc_flags & EFX_PKT_CONT) {
290 /* The packet is scattered, more fragments to come */
292 /* Futher fragments have no prefix */
297 /* Scattered packet is done */
299 /* The first fragment of the packet has prefix */
300 prefix_size = rxq->prefix_size;
303 sfc_efx_rx_desc_flags_to_offload_flags(desc_flags);
305 sfc_efx_rx_desc_flags_to_packet_type(desc_flags);
308 * Extract RSS hash from the packet prefix and
309 * set the corresponding field (if needed and possible)
311 sfc_efx_rx_set_rss_hash(rxq, desc_flags, m);
313 m->data_off += prefix_size;
320 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
321 rte_mempool_put(rxq->refill_mb_pool, m);
325 /* pending is only moved when entire packet is received */
326 SFC_ASSERT(scatter_pkt == NULL);
328 rxq->completed = completed;
330 sfc_efx_rx_qrefill(rxq);
335 static sfc_dp_rx_qdesc_npending_t sfc_efx_rx_qdesc_npending;
337 sfc_efx_rx_qdesc_npending(struct sfc_dp_rxq *dp_rxq)
339 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
341 if ((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0)
344 sfc_ev_qpoll(rxq->evq);
346 return rxq->pending - rxq->completed;
350 sfc_rxq_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
352 const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
353 struct rte_eth_dev *eth_dev;
354 struct sfc_adapter *sa;
357 SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
358 eth_dev = &rte_eth_devices[dpq->port_id];
360 sa = eth_dev->data->dev_private;
362 SFC_ASSERT(dpq->queue_id < sa->rxq_count);
363 rxq = sa->rxq_info[dpq->queue_id].rxq;
365 SFC_ASSERT(rxq != NULL);
369 static sfc_dp_rx_qcreate_t sfc_efx_rx_qcreate;
371 sfc_efx_rx_qcreate(uint16_t port_id, uint16_t queue_id,
372 const struct rte_pci_addr *pci_addr, int socket_id,
373 const struct sfc_dp_rx_qcreate_info *info,
374 struct sfc_dp_rxq **dp_rxqp)
376 struct sfc_efx_rxq *rxq;
380 rxq = rte_zmalloc_socket("sfc-efx-rxq", sizeof(*rxq),
381 RTE_CACHE_LINE_SIZE, socket_id);
385 sfc_dp_queue_init(&rxq->dp.dpq, port_id, queue_id, pci_addr);
388 rxq->sw_desc = rte_calloc_socket("sfc-efx-rxq-sw_desc",
390 sizeof(*rxq->sw_desc),
391 RTE_CACHE_LINE_SIZE, socket_id);
392 if (rxq->sw_desc == NULL)
393 goto fail_desc_alloc;
395 /* efx datapath is bound to efx control path */
396 rxq->evq = sfc_rxq_by_dp_rxq(&rxq->dp)->evq;
397 if (info->flags & SFC_RXQ_FLAG_RSS_HASH)
398 rxq->flags |= SFC_EFX_RXQ_FLAG_RSS_HASH;
399 rxq->ptr_mask = info->rxq_entries - 1;
400 rxq->batch_max = info->batch_max;
401 rxq->prefix_size = info->prefix_size;
402 rxq->refill_threshold = info->refill_threshold;
403 rxq->buf_size = info->buf_size;
404 rxq->refill_mb_pool = info->refill_mb_pool;
416 static sfc_dp_rx_qdestroy_t sfc_efx_rx_qdestroy;
418 sfc_efx_rx_qdestroy(struct sfc_dp_rxq *dp_rxq)
420 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
422 rte_free(rxq->sw_desc);
426 static sfc_dp_rx_qstart_t sfc_efx_rx_qstart;
428 sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq,
429 __rte_unused unsigned int evq_read_ptr)
431 /* libefx-based datapath is specific to libefx-based PMD */
432 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
433 struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq);
435 rxq->common = crxq->common;
437 rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
439 sfc_efx_rx_qrefill(rxq);
441 rxq->flags |= (SFC_EFX_RXQ_FLAG_STARTED | SFC_EFX_RXQ_FLAG_RUNNING);
446 static sfc_dp_rx_qstop_t sfc_efx_rx_qstop;
448 sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq,
449 __rte_unused unsigned int *evq_read_ptr)
451 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
453 rxq->flags &= ~SFC_EFX_RXQ_FLAG_RUNNING;
455 /* libefx-based datapath is bound to libefx-based PMD and uses
456 * event queue structure directly. So, there is no necessity to
457 * return EvQ read pointer.
461 static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge;
463 sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq)
465 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
467 struct sfc_efx_rx_sw_desc *rxd;
469 for (i = rxq->completed; i != rxq->added; ++i) {
470 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
471 rte_mempool_put(rxq->refill_mb_pool, rxd->mbuf);
473 /* Packed stream relies on 0 in inactive SW desc.
474 * Rx queue stop is not performance critical, so
475 * there is no harm to do it always.
481 rxq->flags &= ~SFC_EFX_RXQ_FLAG_STARTED;
484 struct sfc_dp_rx sfc_efx_rx = {
486 .name = SFC_KVARG_DATAPATH_EFX,
490 .features = SFC_DP_RX_FEAT_SCATTER,
491 .qcreate = sfc_efx_rx_qcreate,
492 .qdestroy = sfc_efx_rx_qdestroy,
493 .qstart = sfc_efx_rx_qstart,
494 .qstop = sfc_efx_rx_qstop,
495 .qpurge = sfc_efx_rx_qpurge,
496 .supported_ptypes_get = sfc_efx_supported_ptypes_get,
497 .qdesc_npending = sfc_efx_rx_qdesc_npending,
498 .pkt_burst = sfc_efx_recv_pkts,
502 sfc_rx_qdesc_npending(struct sfc_adapter *sa, unsigned int sw_index)
506 SFC_ASSERT(sw_index < sa->rxq_count);
507 rxq = sa->rxq_info[sw_index].rxq;
509 if (rxq == NULL || (rxq->state & SFC_RXQ_STARTED) == 0)
512 return sa->dp_rx->qdesc_npending(rxq->dp);
516 sfc_rx_qdesc_done(struct sfc_dp_rxq *dp_rxq, unsigned int offset)
518 struct sfc_rxq *rxq = sfc_rxq_by_dp_rxq(dp_rxq);
520 return offset < rxq->evq->sa->dp_rx->qdesc_npending(dp_rxq);
524 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
527 unsigned int retry_count;
528 unsigned int wait_count;
530 rxq = sa->rxq_info[sw_index].rxq;
531 SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
534 * Retry Rx queue flushing in the case of flush failed or
535 * timeout. In the worst case it can delay for 6 seconds.
537 for (retry_count = 0;
538 ((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
539 (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
541 if (efx_rx_qflush(rxq->common) != 0) {
542 rxq->state |= SFC_RXQ_FLUSH_FAILED;
545 rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
546 rxq->state |= SFC_RXQ_FLUSHING;
549 * Wait for Rx queue flush done or failed event at least
550 * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
551 * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
552 * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
556 rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
557 sfc_ev_qpoll(rxq->evq);
558 } while ((rxq->state & SFC_RXQ_FLUSHING) &&
559 (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
561 if (rxq->state & SFC_RXQ_FLUSHING)
562 sfc_err(sa, "RxQ %u flush timed out", sw_index);
564 if (rxq->state & SFC_RXQ_FLUSH_FAILED)
565 sfc_err(sa, "RxQ %u flush failed", sw_index);
567 if (rxq->state & SFC_RXQ_FLUSHED)
568 sfc_info(sa, "RxQ %u flushed", sw_index);
571 sa->dp_rx->qpurge(rxq->dp);
575 sfc_rx_default_rxq_set_filter(struct sfc_adapter *sa, struct sfc_rxq *rxq)
577 boolean_t rss = (sa->rss_channels > 1) ? B_TRUE : B_FALSE;
578 struct sfc_port *port = &sa->port;
582 * If promiscuous or all-multicast mode has been requested, setting
583 * filter for the default Rx queue might fail, in particular, while
584 * running over PCI function which is not a member of corresponding
585 * privilege groups; if this occurs, few iterations will be made to
586 * repeat this step without promiscuous and all-multicast flags set
589 rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common, rss);
592 else if (rc != EOPNOTSUPP)
596 sfc_warn(sa, "promiscuous mode has been requested, "
597 "but the HW rejects it");
598 sfc_warn(sa, "promiscuous mode will be disabled");
600 port->promisc = B_FALSE;
601 rc = sfc_set_rx_mode(sa);
608 if (port->allmulti) {
609 sfc_warn(sa, "all-multicast mode has been requested, "
610 "but the HW rejects it");
611 sfc_warn(sa, "all-multicast mode will be disabled");
613 port->allmulti = B_FALSE;
614 rc = sfc_set_rx_mode(sa);
625 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
627 struct sfc_rxq_info *rxq_info;
632 sfc_log_init(sa, "sw_index=%u", sw_index);
634 SFC_ASSERT(sw_index < sa->rxq_count);
636 rxq_info = &sa->rxq_info[sw_index];
638 SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
642 rc = sfc_ev_qstart(sa, evq->evq_index);
646 rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
647 &rxq->mem, rxq_info->entries,
648 0 /* not used on EF10 */, evq->common,
651 goto fail_rx_qcreate;
653 efx_rx_qenable(rxq->common);
655 rc = sa->dp_rx->qstart(rxq->dp, evq->read_ptr);
659 rxq->state |= SFC_RXQ_STARTED;
662 rc = sfc_rx_default_rxq_set_filter(sa, rxq);
664 goto fail_mac_filter_default_rxq_set;
667 /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
668 sa->eth_dev->data->rx_queue_state[sw_index] =
669 RTE_ETH_QUEUE_STATE_STARTED;
673 fail_mac_filter_default_rxq_set:
674 sa->dp_rx->qstop(rxq->dp, &rxq->evq->read_ptr);
677 sfc_rx_qflush(sa, sw_index);
680 sfc_ev_qstop(sa, evq->evq_index);
687 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
689 struct sfc_rxq_info *rxq_info;
692 sfc_log_init(sa, "sw_index=%u", sw_index);
694 SFC_ASSERT(sw_index < sa->rxq_count);
696 rxq_info = &sa->rxq_info[sw_index];
699 if (rxq->state == SFC_RXQ_INITIALIZED)
701 SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
703 /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
704 sa->eth_dev->data->rx_queue_state[sw_index] =
705 RTE_ETH_QUEUE_STATE_STOPPED;
707 sa->dp_rx->qstop(rxq->dp, &rxq->evq->read_ptr);
710 efx_mac_filter_default_rxq_clear(sa->nic);
712 sfc_rx_qflush(sa, sw_index);
714 rxq->state = SFC_RXQ_INITIALIZED;
716 efx_rx_qdestroy(rxq->common);
718 sfc_ev_qstop(sa, rxq->evq->evq_index);
722 sfc_rx_qcheck_conf(struct sfc_adapter *sa, uint16_t nb_rx_desc,
723 const struct rte_eth_rxconf *rx_conf)
725 const uint16_t rx_free_thresh_max = EFX_RXQ_LIMIT(nb_rx_desc);
728 if (rx_conf->rx_thresh.pthresh != 0 ||
729 rx_conf->rx_thresh.hthresh != 0 ||
730 rx_conf->rx_thresh.wthresh != 0) {
732 "RxQ prefetch/host/writeback thresholds are not supported");
736 if (rx_conf->rx_free_thresh > rx_free_thresh_max) {
738 "RxQ free threshold too large: %u vs maximum %u",
739 rx_conf->rx_free_thresh, rx_free_thresh_max);
743 if (rx_conf->rx_drop_en == 0) {
744 sfc_err(sa, "RxQ drop disable is not supported");
752 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
757 /* The mbuf object itself is always cache line aligned */
758 order = rte_bsf32(RTE_CACHE_LINE_SIZE);
760 /* Data offset from mbuf object start */
761 data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
762 RTE_PKTMBUF_HEADROOM;
764 order = MIN(order, rte_bsf32(data_off));
766 return 1u << (order - 1);
770 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
772 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
773 const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
774 const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
776 unsigned int buf_aligned;
777 unsigned int start_alignment;
778 unsigned int end_padding_alignment;
780 /* Below it is assumed that both alignments are power of 2 */
781 SFC_ASSERT(rte_is_power_of_2(nic_align_start));
782 SFC_ASSERT(rte_is_power_of_2(nic_align_end));
785 * mbuf is always cache line aligned, double-check
786 * that it meets rx buffer start alignment requirements.
789 /* Start from mbuf pool data room size */
790 buf_size = rte_pktmbuf_data_room_size(mb_pool);
792 /* Remove headroom */
793 if (buf_size <= RTE_PKTMBUF_HEADROOM) {
795 "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
796 mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
799 buf_size -= RTE_PKTMBUF_HEADROOM;
801 /* Calculate guaranteed data start alignment */
802 buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
804 /* Reserve space for start alignment */
805 if (buf_aligned < nic_align_start) {
806 start_alignment = nic_align_start - buf_aligned;
807 if (buf_size <= start_alignment) {
809 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
811 rte_pktmbuf_data_room_size(mb_pool),
812 RTE_PKTMBUF_HEADROOM, start_alignment);
815 buf_aligned = nic_align_start;
816 buf_size -= start_alignment;
821 /* Make sure that end padding does not write beyond the buffer */
822 if (buf_aligned < nic_align_end) {
824 * Estimate space which can be lost. If guarnteed buffer
825 * size is odd, lost space is (nic_align_end - 1). More
826 * accurate formula is below.
828 end_padding_alignment = nic_align_end -
829 MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
830 if (buf_size <= end_padding_alignment) {
832 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
834 rte_pktmbuf_data_room_size(mb_pool),
835 RTE_PKTMBUF_HEADROOM, start_alignment,
836 end_padding_alignment);
839 buf_size -= end_padding_alignment;
842 * Start is aligned the same or better than end,
845 buf_size = P2ALIGN(buf_size, nic_align_end);
852 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
853 uint16_t nb_rx_desc, unsigned int socket_id,
854 const struct rte_eth_rxconf *rx_conf,
855 struct rte_mempool *mb_pool)
857 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
860 struct sfc_rxq_info *rxq_info;
861 unsigned int evq_index;
864 struct sfc_dp_rx_qcreate_info info;
866 rc = sfc_rx_qcheck_conf(sa, nb_rx_desc, rx_conf);
870 buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
872 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
878 if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
879 !sa->eth_dev->data->dev_conf.rxmode.enable_scatter) {
880 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
881 "object size is too small", sw_index);
882 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
883 "PDU size %u plus Rx prefix %u bytes",
884 sw_index, buf_size, (unsigned int)sa->port.pdu,
885 encp->enc_rx_prefix_size);
890 SFC_ASSERT(sw_index < sa->rxq_count);
891 rxq_info = &sa->rxq_info[sw_index];
893 SFC_ASSERT(nb_rx_desc <= rxq_info->max_entries);
894 rxq_info->entries = nb_rx_desc;
896 sa->eth_dev->data->dev_conf.rxmode.enable_scatter ?
897 EFX_RXQ_TYPE_SCATTER : EFX_RXQ_TYPE_DEFAULT;
899 evq_index = sfc_evq_index_by_rxq_sw_index(sa, sw_index);
901 rc = sfc_ev_qinit(sa, evq_index, rxq_info->entries, socket_id);
905 evq = sa->evq_info[evq_index].evq;
908 rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
916 rxq->hw_index = sw_index;
917 rxq->refill_threshold = rx_conf->rx_free_thresh;
918 rxq->refill_mb_pool = mb_pool;
920 rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
921 socket_id, &rxq->mem);
925 memset(&info, 0, sizeof(info));
926 info.refill_mb_pool = rxq->refill_mb_pool;
927 info.refill_threshold = rxq->refill_threshold;
928 info.buf_size = buf_size;
929 info.batch_max = encp->enc_rx_batch_max;
930 info.prefix_size = encp->enc_rx_prefix_size;
932 #if EFSYS_OPT_RX_SCALE
933 if (sa->hash_support == EFX_RX_HASH_AVAILABLE)
934 info.flags |= SFC_RXQ_FLAG_RSS_HASH;
937 info.rxq_entries = rxq_info->entries;
939 rc = sa->dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index,
940 &SFC_DEV_TO_PCI(sa->eth_dev)->addr,
941 socket_id, &info, &rxq->dp);
943 goto fail_dp_rx_qcreate;
945 evq->dp_rxq = rxq->dp;
947 rxq->state = SFC_RXQ_INITIALIZED;
949 rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
954 sfc_dma_free(sa, &rxq->mem);
957 rxq_info->rxq = NULL;
961 sfc_ev_qfini(sa, evq_index);
964 rxq_info->entries = 0;
967 sfc_log_init(sa, "failed %d", rc);
972 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
974 struct sfc_rxq_info *rxq_info;
977 SFC_ASSERT(sw_index < sa->rxq_count);
979 rxq_info = &sa->rxq_info[sw_index];
982 SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
984 sa->dp_rx->qdestroy(rxq->dp);
987 rxq_info->rxq = NULL;
988 rxq_info->entries = 0;
990 sfc_dma_free(sa, &rxq->mem);
994 #if EFSYS_OPT_RX_SCALE
996 sfc_rte_to_efx_hash_type(uint64_t rss_hf)
998 efx_rx_hash_type_t efx_hash_types = 0;
1000 if ((rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
1001 ETH_RSS_NONFRAG_IPV4_OTHER)) != 0)
1002 efx_hash_types |= EFX_RX_HASH_IPV4;
1004 if ((rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) != 0)
1005 efx_hash_types |= EFX_RX_HASH_TCPIPV4;
1007 if ((rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
1008 ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX)) != 0)
1009 efx_hash_types |= EFX_RX_HASH_IPV6;
1011 if ((rss_hf & (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX)) != 0)
1012 efx_hash_types |= EFX_RX_HASH_TCPIPV6;
1014 return efx_hash_types;
1018 sfc_efx_to_rte_hash_type(efx_rx_hash_type_t efx_hash_types)
1020 uint64_t rss_hf = 0;
1022 if ((efx_hash_types & EFX_RX_HASH_IPV4) != 0)
1023 rss_hf |= (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
1024 ETH_RSS_NONFRAG_IPV4_OTHER);
1026 if ((efx_hash_types & EFX_RX_HASH_TCPIPV4) != 0)
1027 rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
1029 if ((efx_hash_types & EFX_RX_HASH_IPV6) != 0)
1030 rss_hf |= (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
1031 ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX);
1033 if ((efx_hash_types & EFX_RX_HASH_TCPIPV6) != 0)
1034 rss_hf |= (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX);
1041 sfc_rx_rss_config(struct sfc_adapter *sa)
1045 #if EFSYS_OPT_RX_SCALE
1046 if (sa->rss_channels > 1) {
1047 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1048 sa->rss_hash_types, B_TRUE);
1052 rc = efx_rx_scale_key_set(sa->nic, sa->rss_key,
1053 sizeof(sa->rss_key));
1057 rc = efx_rx_scale_tbl_set(sa->nic, sa->rss_tbl,
1058 sizeof(sa->rss_tbl));
1067 sfc_rx_start(struct sfc_adapter *sa)
1069 unsigned int sw_index;
1072 sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
1074 rc = efx_rx_init(sa->nic);
1078 rc = sfc_rx_rss_config(sa);
1080 goto fail_rss_config;
1082 for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
1083 if ((!sa->rxq_info[sw_index].deferred_start ||
1084 sa->rxq_info[sw_index].deferred_started)) {
1085 rc = sfc_rx_qstart(sa, sw_index);
1087 goto fail_rx_qstart;
1094 while (sw_index-- > 0)
1095 sfc_rx_qstop(sa, sw_index);
1098 efx_rx_fini(sa->nic);
1101 sfc_log_init(sa, "failed %d", rc);
1106 sfc_rx_stop(struct sfc_adapter *sa)
1108 unsigned int sw_index;
1110 sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
1112 sw_index = sa->rxq_count;
1113 while (sw_index-- > 0) {
1114 if (sa->rxq_info[sw_index].rxq != NULL)
1115 sfc_rx_qstop(sa, sw_index);
1118 efx_rx_fini(sa->nic);
1122 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
1124 struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
1125 unsigned int max_entries;
1127 max_entries = EFX_RXQ_MAXNDESCS;
1128 SFC_ASSERT(rte_is_power_of_2(max_entries));
1130 rxq_info->max_entries = max_entries;
1136 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
1140 switch (rxmode->mq_mode) {
1141 case ETH_MQ_RX_NONE:
1142 /* No special checks are required */
1144 #if EFSYS_OPT_RX_SCALE
1146 if (sa->rss_support == EFX_RX_SCALE_UNAVAILABLE) {
1147 sfc_err(sa, "RSS is not available");
1153 sfc_err(sa, "Rx multi-queue mode %u not supported",
1158 if (rxmode->header_split) {
1159 sfc_err(sa, "Header split on Rx not supported");
1163 if (rxmode->hw_vlan_filter) {
1164 sfc_err(sa, "HW VLAN filtering not supported");
1168 if (rxmode->hw_vlan_strip) {
1169 sfc_err(sa, "HW VLAN stripping not supported");
1173 if (rxmode->hw_vlan_extend) {
1175 "Q-in-Q HW VLAN stripping not supported");
1179 if (!rxmode->hw_strip_crc) {
1181 "FCS stripping control not supported - always stripped");
1182 rxmode->hw_strip_crc = 1;
1185 if (rxmode->enable_scatter &&
1186 (~sa->dp_rx->features & SFC_DP_RX_FEAT_SCATTER)) {
1187 sfc_err(sa, "Rx scatter not supported by %s datapath",
1188 sa->dp_rx->dp.name);
1192 if (rxmode->enable_lro) {
1193 sfc_err(sa, "LRO not supported");
1201 * Initialize Rx subsystem.
1203 * Called at device configuration stage when number of receive queues is
1204 * specified together with other device level receive configuration.
1206 * It should be used to allocate NUMA-unaware resources.
1209 sfc_rx_init(struct sfc_adapter *sa)
1211 struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
1212 unsigned int sw_index;
1215 rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
1217 goto fail_check_mode;
1219 sa->rxq_count = sa->eth_dev->data->nb_rx_queues;
1222 sa->rxq_info = rte_calloc_socket("sfc-rxqs", sa->rxq_count,
1223 sizeof(struct sfc_rxq_info), 0,
1225 if (sa->rxq_info == NULL)
1226 goto fail_rxqs_alloc;
1228 for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
1229 rc = sfc_rx_qinit_info(sa, sw_index);
1231 goto fail_rx_qinit_info;
1234 #if EFSYS_OPT_RX_SCALE
1235 sa->rss_channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
1236 MIN(sa->rxq_count, EFX_MAXRSS) : 1;
1238 if (sa->rss_channels > 1) {
1239 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
1240 sa->rss_tbl[sw_index] = sw_index % sa->rss_channels;
1247 rte_free(sa->rxq_info);
1248 sa->rxq_info = NULL;
1253 sfc_log_init(sa, "failed %d", rc);
1258 * Shutdown Rx subsystem.
1260 * Called at device close stage, for example, before device
1261 * reconfiguration or shutdown.
1264 sfc_rx_fini(struct sfc_adapter *sa)
1266 unsigned int sw_index;
1268 sw_index = sa->rxq_count;
1269 while (sw_index-- > 0) {
1270 if (sa->rxq_info[sw_index].rxq != NULL)
1271 sfc_rx_qfini(sa, sw_index);
1274 rte_free(sa->rxq_info);
1275 sa->rxq_info = NULL;