net/af_packet: make qdisc bypass configurable
[dpdk.git] / drivers / net / sfc / sfc_rx.c
1 /*-
2  *   BSD LICENSE
3  *
4  * Copyright (c) 2016-2017 Solarflare Communications Inc.
5  * All rights reserved.
6  *
7  * This software was jointly developed between OKTET Labs (under contract
8  * for Solarflare) and Solarflare Communications, Inc.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions are met:
12  *
13  * 1. Redistributions of source code must retain the above copyright notice,
14  *    this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright notice,
16  *    this list of conditions and the following disclaimer in the documentation
17  *    and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31
32 #include <rte_mempool.h>
33
34 #include "efx.h"
35
36 #include "sfc.h"
37 #include "sfc_debug.h"
38 #include "sfc_log.h"
39 #include "sfc_ev.h"
40 #include "sfc_rx.h"
41 #include "sfc_kvargs.h"
42 #include "sfc_tweak.h"
43
44 /*
45  * Maximum number of Rx queue flush attempt in the case of failure or
46  * flush timeout
47  */
48 #define SFC_RX_QFLUSH_ATTEMPTS          (3)
49
50 /*
51  * Time to wait between event queue polling attempts when waiting for Rx
52  * queue flush done or failed events.
53  */
54 #define SFC_RX_QFLUSH_POLL_WAIT_MS      (1)
55
56 /*
57  * Maximum number of event queue polling attempts when waiting for Rx queue
58  * flush done or failed events. It defines Rx queue flush attempt timeout
59  * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
60  */
61 #define SFC_RX_QFLUSH_POLL_ATTEMPTS     (2000)
62
63 void
64 sfc_rx_qflush_done(struct sfc_rxq *rxq)
65 {
66         rxq->state |= SFC_RXQ_FLUSHED;
67         rxq->state &= ~SFC_RXQ_FLUSHING;
68 }
69
70 void
71 sfc_rx_qflush_failed(struct sfc_rxq *rxq)
72 {
73         rxq->state |= SFC_RXQ_FLUSH_FAILED;
74         rxq->state &= ~SFC_RXQ_FLUSHING;
75 }
76
77 static void
78 sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq)
79 {
80         unsigned int free_space;
81         unsigned int bulks;
82         void *objs[SFC_RX_REFILL_BULK];
83         efsys_dma_addr_t addr[RTE_DIM(objs)];
84         unsigned int added = rxq->added;
85         unsigned int id;
86         unsigned int i;
87         struct sfc_efx_rx_sw_desc *rxd;
88         struct rte_mbuf *m;
89         uint16_t port_id = rxq->dp.dpq.port_id;
90
91         free_space = EFX_RXQ_LIMIT(rxq->ptr_mask + 1) -
92                 (added - rxq->completed);
93
94         if (free_space < rxq->refill_threshold)
95                 return;
96
97         bulks = free_space / RTE_DIM(objs);
98         /* refill_threshold guarantees that bulks is positive */
99         SFC_ASSERT(bulks > 0);
100
101         id = added & rxq->ptr_mask;
102         do {
103                 if (unlikely(rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
104                                                   RTE_DIM(objs)) < 0)) {
105                         /*
106                          * It is hardly a safe way to increment counter
107                          * from different contexts, but all PMDs do it.
108                          */
109                         rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
110                                 RTE_DIM(objs);
111                         /* Return if we have posted nothing yet */
112                         if (added == rxq->added)
113                                 return;
114                         /* Push posted */
115                         break;
116                 }
117
118                 for (i = 0; i < RTE_DIM(objs);
119                      ++i, id = (id + 1) & rxq->ptr_mask) {
120                         m = objs[i];
121
122                         rxd = &rxq->sw_desc[id];
123                         rxd->mbuf = m;
124
125                         SFC_ASSERT(rte_mbuf_refcnt_read(m) == 1);
126                         m->data_off = RTE_PKTMBUF_HEADROOM;
127                         SFC_ASSERT(m->next == NULL);
128                         SFC_ASSERT(m->nb_segs == 1);
129                         m->port = port_id;
130
131                         addr[i] = rte_pktmbuf_mtophys(m);
132                 }
133
134                 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
135                              RTE_DIM(objs), rxq->completed, added);
136                 added += RTE_DIM(objs);
137         } while (--bulks > 0);
138
139         SFC_ASSERT(added != rxq->added);
140         rxq->added = added;
141         efx_rx_qpush(rxq->common, added, &rxq->pushed);
142 }
143
144 static uint64_t
145 sfc_efx_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
146 {
147         uint64_t mbuf_flags = 0;
148
149         switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
150         case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
151                 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
152                 break;
153         case EFX_PKT_IPV4:
154                 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
155                 break;
156         default:
157                 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
158                 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
159                            PKT_RX_IP_CKSUM_UNKNOWN);
160                 break;
161         }
162
163         switch ((desc_flags &
164                  (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
165         case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
166         case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
167                 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
168                 break;
169         case EFX_PKT_TCP:
170         case EFX_PKT_UDP:
171                 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
172                 break;
173         default:
174                 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
175                 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
176                            PKT_RX_L4_CKSUM_UNKNOWN);
177                 break;
178         }
179
180         return mbuf_flags;
181 }
182
183 static uint32_t
184 sfc_efx_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
185 {
186         return RTE_PTYPE_L2_ETHER |
187                 ((desc_flags & EFX_PKT_IPV4) ?
188                         RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
189                 ((desc_flags & EFX_PKT_IPV6) ?
190                         RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
191                 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
192                 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
193 }
194
195 static const uint32_t *
196 sfc_efx_supported_ptypes_get(void)
197 {
198         static const uint32_t ptypes[] = {
199                 RTE_PTYPE_L2_ETHER,
200                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
201                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
202                 RTE_PTYPE_L4_TCP,
203                 RTE_PTYPE_L4_UDP,
204                 RTE_PTYPE_UNKNOWN
205         };
206
207         return ptypes;
208 }
209
210 #if EFSYS_OPT_RX_SCALE
211 static void
212 sfc_efx_rx_set_rss_hash(struct sfc_efx_rxq *rxq, unsigned int flags,
213                         struct rte_mbuf *m)
214 {
215         uint8_t *mbuf_data;
216
217
218         if ((rxq->flags & SFC_EFX_RXQ_FLAG_RSS_HASH) == 0)
219                 return;
220
221         mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
222
223         if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
224                 m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
225                                                       EFX_RX_HASHALG_TOEPLITZ,
226                                                       mbuf_data);
227
228                 m->ol_flags |= PKT_RX_RSS_HASH;
229         }
230 }
231 #else
232 static void
233 sfc_efx_rx_set_rss_hash(__rte_unused struct sfc_efx_rxq *rxq,
234                         __rte_unused unsigned int flags,
235                         __rte_unused struct rte_mbuf *m)
236 {
237 }
238 #endif
239
240 static uint16_t
241 sfc_efx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
242 {
243         struct sfc_dp_rxq *dp_rxq = rx_queue;
244         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
245         unsigned int completed;
246         unsigned int prefix_size = rxq->prefix_size;
247         unsigned int done_pkts = 0;
248         boolean_t discard_next = B_FALSE;
249         struct rte_mbuf *scatter_pkt = NULL;
250
251         if (unlikely((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0))
252                 return 0;
253
254         sfc_ev_qpoll(rxq->evq);
255
256         completed = rxq->completed;
257         while (completed != rxq->pending && done_pkts < nb_pkts) {
258                 unsigned int id;
259                 struct sfc_efx_rx_sw_desc *rxd;
260                 struct rte_mbuf *m;
261                 unsigned int seg_len;
262                 unsigned int desc_flags;
263
264                 id = completed++ & rxq->ptr_mask;
265                 rxd = &rxq->sw_desc[id];
266                 m = rxd->mbuf;
267                 desc_flags = rxd->flags;
268
269                 if (discard_next)
270                         goto discard;
271
272                 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
273                         goto discard;
274
275                 if (desc_flags & EFX_PKT_PREFIX_LEN) {
276                         uint16_t tmp_size;
277                         int rc __rte_unused;
278
279                         rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
280                                 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
281                         SFC_ASSERT(rc == 0);
282                         seg_len = tmp_size;
283                 } else {
284                         seg_len = rxd->size - prefix_size;
285                 }
286
287                 rte_pktmbuf_data_len(m) = seg_len;
288                 rte_pktmbuf_pkt_len(m) = seg_len;
289
290                 if (scatter_pkt != NULL) {
291                         if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
292                                 rte_pktmbuf_free(scatter_pkt);
293                                 goto discard;
294                         }
295                         /* The packet to deliver */
296                         m = scatter_pkt;
297                 }
298
299                 if (desc_flags & EFX_PKT_CONT) {
300                         /* The packet is scattered, more fragments to come */
301                         scatter_pkt = m;
302                         /* Further fragments have no prefix */
303                         prefix_size = 0;
304                         continue;
305                 }
306
307                 /* Scattered packet is done */
308                 scatter_pkt = NULL;
309                 /* The first fragment of the packet has prefix */
310                 prefix_size = rxq->prefix_size;
311
312                 m->ol_flags =
313                         sfc_efx_rx_desc_flags_to_offload_flags(desc_flags);
314                 m->packet_type =
315                         sfc_efx_rx_desc_flags_to_packet_type(desc_flags);
316
317                 /*
318                  * Extract RSS hash from the packet prefix and
319                  * set the corresponding field (if needed and possible)
320                  */
321                 sfc_efx_rx_set_rss_hash(rxq, desc_flags, m);
322
323                 m->data_off += prefix_size;
324
325                 *rx_pkts++ = m;
326                 done_pkts++;
327                 continue;
328
329 discard:
330                 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
331                 rte_mempool_put(rxq->refill_mb_pool, m);
332                 rxd->mbuf = NULL;
333         }
334
335         /* pending is only moved when entire packet is received */
336         SFC_ASSERT(scatter_pkt == NULL);
337
338         rxq->completed = completed;
339
340         sfc_efx_rx_qrefill(rxq);
341
342         return done_pkts;
343 }
344
345 static sfc_dp_rx_qdesc_npending_t sfc_efx_rx_qdesc_npending;
346 static unsigned int
347 sfc_efx_rx_qdesc_npending(struct sfc_dp_rxq *dp_rxq)
348 {
349         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
350
351         if ((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0)
352                 return 0;
353
354         sfc_ev_qpoll(rxq->evq);
355
356         return rxq->pending - rxq->completed;
357 }
358
359 static sfc_dp_rx_qdesc_status_t sfc_efx_rx_qdesc_status;
360 static int
361 sfc_efx_rx_qdesc_status(struct sfc_dp_rxq *dp_rxq, uint16_t offset)
362 {
363         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
364
365         if (unlikely(offset > rxq->ptr_mask))
366                 return -EINVAL;
367
368         /*
369          * Poll EvQ to derive up-to-date 'rxq->pending' figure;
370          * it is required for the queue to be running, but the
371          * check is omitted because API design assumes that it
372          * is the duty of the caller to satisfy all conditions
373          */
374         SFC_ASSERT((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) ==
375                    SFC_EFX_RXQ_FLAG_RUNNING);
376         sfc_ev_qpoll(rxq->evq);
377
378         /*
379          * There is a handful of reserved entries in the ring,
380          * but an explicit check whether the offset points to
381          * a reserved entry is neglected since the two checks
382          * below rely on the figures which take the HW limits
383          * into account and thus if an entry is reserved, the
384          * checks will fail and UNAVAIL code will be returned
385          */
386
387         if (offset < (rxq->pending - rxq->completed))
388                 return RTE_ETH_RX_DESC_DONE;
389
390         if (offset < (rxq->added - rxq->completed))
391                 return RTE_ETH_RX_DESC_AVAIL;
392
393         return RTE_ETH_RX_DESC_UNAVAIL;
394 }
395
396 struct sfc_rxq *
397 sfc_rxq_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
398 {
399         const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
400         struct rte_eth_dev *eth_dev;
401         struct sfc_adapter *sa;
402         struct sfc_rxq *rxq;
403
404         SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
405         eth_dev = &rte_eth_devices[dpq->port_id];
406
407         sa = eth_dev->data->dev_private;
408
409         SFC_ASSERT(dpq->queue_id < sa->rxq_count);
410         rxq = sa->rxq_info[dpq->queue_id].rxq;
411
412         SFC_ASSERT(rxq != NULL);
413         return rxq;
414 }
415
416 static sfc_dp_rx_qcreate_t sfc_efx_rx_qcreate;
417 static int
418 sfc_efx_rx_qcreate(uint16_t port_id, uint16_t queue_id,
419                    const struct rte_pci_addr *pci_addr, int socket_id,
420                    const struct sfc_dp_rx_qcreate_info *info,
421                    struct sfc_dp_rxq **dp_rxqp)
422 {
423         struct sfc_efx_rxq *rxq;
424         int rc;
425
426         rc = ENOMEM;
427         rxq = rte_zmalloc_socket("sfc-efx-rxq", sizeof(*rxq),
428                                  RTE_CACHE_LINE_SIZE, socket_id);
429         if (rxq == NULL)
430                 goto fail_rxq_alloc;
431
432         sfc_dp_queue_init(&rxq->dp.dpq, port_id, queue_id, pci_addr);
433
434         rc = ENOMEM;
435         rxq->sw_desc = rte_calloc_socket("sfc-efx-rxq-sw_desc",
436                                          info->rxq_entries,
437                                          sizeof(*rxq->sw_desc),
438                                          RTE_CACHE_LINE_SIZE, socket_id);
439         if (rxq->sw_desc == NULL)
440                 goto fail_desc_alloc;
441
442         /* efx datapath is bound to efx control path */
443         rxq->evq = sfc_rxq_by_dp_rxq(&rxq->dp)->evq;
444         if (info->flags & SFC_RXQ_FLAG_RSS_HASH)
445                 rxq->flags |= SFC_EFX_RXQ_FLAG_RSS_HASH;
446         rxq->ptr_mask = info->rxq_entries - 1;
447         rxq->batch_max = info->batch_max;
448         rxq->prefix_size = info->prefix_size;
449         rxq->refill_threshold = info->refill_threshold;
450         rxq->buf_size = info->buf_size;
451         rxq->refill_mb_pool = info->refill_mb_pool;
452
453         *dp_rxqp = &rxq->dp;
454         return 0;
455
456 fail_desc_alloc:
457         rte_free(rxq);
458
459 fail_rxq_alloc:
460         return rc;
461 }
462
463 static sfc_dp_rx_qdestroy_t sfc_efx_rx_qdestroy;
464 static void
465 sfc_efx_rx_qdestroy(struct sfc_dp_rxq *dp_rxq)
466 {
467         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
468
469         rte_free(rxq->sw_desc);
470         rte_free(rxq);
471 }
472
473 static sfc_dp_rx_qstart_t sfc_efx_rx_qstart;
474 static int
475 sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq,
476                   __rte_unused unsigned int evq_read_ptr)
477 {
478         /* libefx-based datapath is specific to libefx-based PMD */
479         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
480         struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq);
481
482         rxq->common = crxq->common;
483
484         rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
485
486         sfc_efx_rx_qrefill(rxq);
487
488         rxq->flags |= (SFC_EFX_RXQ_FLAG_STARTED | SFC_EFX_RXQ_FLAG_RUNNING);
489
490         return 0;
491 }
492
493 static sfc_dp_rx_qstop_t sfc_efx_rx_qstop;
494 static void
495 sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq,
496                  __rte_unused unsigned int *evq_read_ptr)
497 {
498         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
499
500         rxq->flags &= ~SFC_EFX_RXQ_FLAG_RUNNING;
501
502         /* libefx-based datapath is bound to libefx-based PMD and uses
503          * event queue structure directly. So, there is no necessity to
504          * return EvQ read pointer.
505          */
506 }
507
508 static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge;
509 static void
510 sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq)
511 {
512         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
513         unsigned int i;
514         struct sfc_efx_rx_sw_desc *rxd;
515
516         for (i = rxq->completed; i != rxq->added; ++i) {
517                 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
518                 rte_mempool_put(rxq->refill_mb_pool, rxd->mbuf);
519                 rxd->mbuf = NULL;
520                 /* Packed stream relies on 0 in inactive SW desc.
521                  * Rx queue stop is not performance critical, so
522                  * there is no harm to do it always.
523                  */
524                 rxd->flags = 0;
525                 rxd->size = 0;
526         }
527
528         rxq->flags &= ~SFC_EFX_RXQ_FLAG_STARTED;
529 }
530
531 struct sfc_dp_rx sfc_efx_rx = {
532         .dp = {
533                 .name           = SFC_KVARG_DATAPATH_EFX,
534                 .type           = SFC_DP_RX,
535                 .hw_fw_caps     = 0,
536         },
537         .features               = SFC_DP_RX_FEAT_SCATTER,
538         .qcreate                = sfc_efx_rx_qcreate,
539         .qdestroy               = sfc_efx_rx_qdestroy,
540         .qstart                 = sfc_efx_rx_qstart,
541         .qstop                  = sfc_efx_rx_qstop,
542         .qpurge                 = sfc_efx_rx_qpurge,
543         .supported_ptypes_get   = sfc_efx_supported_ptypes_get,
544         .qdesc_npending         = sfc_efx_rx_qdesc_npending,
545         .qdesc_status           = sfc_efx_rx_qdesc_status,
546         .pkt_burst              = sfc_efx_recv_pkts,
547 };
548
549 unsigned int
550 sfc_rx_qdesc_npending(struct sfc_adapter *sa, unsigned int sw_index)
551 {
552         struct sfc_rxq *rxq;
553
554         SFC_ASSERT(sw_index < sa->rxq_count);
555         rxq = sa->rxq_info[sw_index].rxq;
556
557         if (rxq == NULL || (rxq->state & SFC_RXQ_STARTED) == 0)
558                 return 0;
559
560         return sa->dp_rx->qdesc_npending(rxq->dp);
561 }
562
563 int
564 sfc_rx_qdesc_done(struct sfc_dp_rxq *dp_rxq, unsigned int offset)
565 {
566         struct sfc_rxq *rxq = sfc_rxq_by_dp_rxq(dp_rxq);
567
568         return offset < rxq->evq->sa->dp_rx->qdesc_npending(dp_rxq);
569 }
570
571 static void
572 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
573 {
574         struct sfc_rxq *rxq;
575         unsigned int retry_count;
576         unsigned int wait_count;
577         int rc;
578
579         rxq = sa->rxq_info[sw_index].rxq;
580         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
581
582         /*
583          * Retry Rx queue flushing in the case of flush failed or
584          * timeout. In the worst case it can delay for 6 seconds.
585          */
586         for (retry_count = 0;
587              ((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
588              (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
589              ++retry_count) {
590                 rc = efx_rx_qflush(rxq->common);
591                 if (rc != 0) {
592                         rxq->state |= (rc == EALREADY) ?
593                                 SFC_RXQ_FLUSHED : SFC_RXQ_FLUSH_FAILED;
594                         break;
595                 }
596                 rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
597                 rxq->state |= SFC_RXQ_FLUSHING;
598
599                 /*
600                  * Wait for Rx queue flush done or failed event at least
601                  * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
602                  * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
603                  * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
604                  */
605                 wait_count = 0;
606                 do {
607                         rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
608                         sfc_ev_qpoll(rxq->evq);
609                 } while ((rxq->state & SFC_RXQ_FLUSHING) &&
610                          (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
611
612                 if (rxq->state & SFC_RXQ_FLUSHING)
613                         sfc_err(sa, "RxQ %u flush timed out", sw_index);
614
615                 if (rxq->state & SFC_RXQ_FLUSH_FAILED)
616                         sfc_err(sa, "RxQ %u flush failed", sw_index);
617
618                 if (rxq->state & SFC_RXQ_FLUSHED)
619                         sfc_info(sa, "RxQ %u flushed", sw_index);
620         }
621
622         sa->dp_rx->qpurge(rxq->dp);
623 }
624
625 static int
626 sfc_rx_default_rxq_set_filter(struct sfc_adapter *sa, struct sfc_rxq *rxq)
627 {
628         boolean_t rss = (sa->rss_channels > 0) ? B_TRUE : B_FALSE;
629         struct sfc_port *port = &sa->port;
630         int rc;
631
632         /*
633          * If promiscuous or all-multicast mode has been requested, setting
634          * filter for the default Rx queue might fail, in particular, while
635          * running over PCI function which is not a member of corresponding
636          * privilege groups; if this occurs, few iterations will be made to
637          * repeat this step without promiscuous and all-multicast flags set
638          */
639 retry:
640         rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common, rss);
641         if (rc == 0)
642                 return 0;
643         else if (rc != EOPNOTSUPP)
644                 return rc;
645
646         if (port->promisc) {
647                 sfc_warn(sa, "promiscuous mode has been requested, "
648                              "but the HW rejects it");
649                 sfc_warn(sa, "promiscuous mode will be disabled");
650
651                 port->promisc = B_FALSE;
652                 rc = sfc_set_rx_mode(sa);
653                 if (rc != 0)
654                         return rc;
655
656                 goto retry;
657         }
658
659         if (port->allmulti) {
660                 sfc_warn(sa, "all-multicast mode has been requested, "
661                              "but the HW rejects it");
662                 sfc_warn(sa, "all-multicast mode will be disabled");
663
664                 port->allmulti = B_FALSE;
665                 rc = sfc_set_rx_mode(sa);
666                 if (rc != 0)
667                         return rc;
668
669                 goto retry;
670         }
671
672         return rc;
673 }
674
675 int
676 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
677 {
678         struct sfc_port *port = &sa->port;
679         struct sfc_rxq_info *rxq_info;
680         struct sfc_rxq *rxq;
681         struct sfc_evq *evq;
682         int rc;
683
684         sfc_log_init(sa, "sw_index=%u", sw_index);
685
686         SFC_ASSERT(sw_index < sa->rxq_count);
687
688         rxq_info = &sa->rxq_info[sw_index];
689         rxq = rxq_info->rxq;
690         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
691
692         evq = rxq->evq;
693
694         rc = sfc_ev_qstart(evq, sfc_evq_index_by_rxq_sw_index(sa, sw_index));
695         if (rc != 0)
696                 goto fail_ev_qstart;
697
698         rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
699                             &rxq->mem, rxq_info->entries,
700                             0 /* not used on EF10 */, evq->common,
701                             &rxq->common);
702         if (rc != 0)
703                 goto fail_rx_qcreate;
704
705         efx_rx_qenable(rxq->common);
706
707         rc = sa->dp_rx->qstart(rxq->dp, evq->read_ptr);
708         if (rc != 0)
709                 goto fail_dp_qstart;
710
711         rxq->state |= SFC_RXQ_STARTED;
712
713         if ((sw_index == 0) && !port->isolated) {
714                 rc = sfc_rx_default_rxq_set_filter(sa, rxq);
715                 if (rc != 0)
716                         goto fail_mac_filter_default_rxq_set;
717         }
718
719         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
720         sa->eth_dev->data->rx_queue_state[sw_index] =
721                 RTE_ETH_QUEUE_STATE_STARTED;
722
723         return 0;
724
725 fail_mac_filter_default_rxq_set:
726         sa->dp_rx->qstop(rxq->dp, &rxq->evq->read_ptr);
727
728 fail_dp_qstart:
729         sfc_rx_qflush(sa, sw_index);
730
731 fail_rx_qcreate:
732         sfc_ev_qstop(evq);
733
734 fail_ev_qstart:
735         return rc;
736 }
737
738 void
739 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
740 {
741         struct sfc_rxq_info *rxq_info;
742         struct sfc_rxq *rxq;
743
744         sfc_log_init(sa, "sw_index=%u", sw_index);
745
746         SFC_ASSERT(sw_index < sa->rxq_count);
747
748         rxq_info = &sa->rxq_info[sw_index];
749         rxq = rxq_info->rxq;
750
751         if (rxq->state == SFC_RXQ_INITIALIZED)
752                 return;
753         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
754
755         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
756         sa->eth_dev->data->rx_queue_state[sw_index] =
757                 RTE_ETH_QUEUE_STATE_STOPPED;
758
759         sa->dp_rx->qstop(rxq->dp, &rxq->evq->read_ptr);
760
761         if (sw_index == 0)
762                 efx_mac_filter_default_rxq_clear(sa->nic);
763
764         sfc_rx_qflush(sa, sw_index);
765
766         rxq->state = SFC_RXQ_INITIALIZED;
767
768         efx_rx_qdestroy(rxq->common);
769
770         sfc_ev_qstop(rxq->evq);
771 }
772
773 static int
774 sfc_rx_qcheck_conf(struct sfc_adapter *sa, uint16_t nb_rx_desc,
775                    const struct rte_eth_rxconf *rx_conf)
776 {
777         const uint16_t rx_free_thresh_max = EFX_RXQ_LIMIT(nb_rx_desc);
778         int rc = 0;
779
780         if (rx_conf->rx_thresh.pthresh != 0 ||
781             rx_conf->rx_thresh.hthresh != 0 ||
782             rx_conf->rx_thresh.wthresh != 0) {
783                 sfc_err(sa,
784                         "RxQ prefetch/host/writeback thresholds are not supported");
785                 rc = EINVAL;
786         }
787
788         if (rx_conf->rx_free_thresh > rx_free_thresh_max) {
789                 sfc_err(sa,
790                         "RxQ free threshold too large: %u vs maximum %u",
791                         rx_conf->rx_free_thresh, rx_free_thresh_max);
792                 rc = EINVAL;
793         }
794
795         if (rx_conf->rx_drop_en == 0) {
796                 sfc_err(sa, "RxQ drop disable is not supported");
797                 rc = EINVAL;
798         }
799
800         return rc;
801 }
802
803 static unsigned int
804 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
805 {
806         uint32_t data_off;
807         uint32_t order;
808
809         /* The mbuf object itself is always cache line aligned */
810         order = rte_bsf32(RTE_CACHE_LINE_SIZE);
811
812         /* Data offset from mbuf object start */
813         data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
814                 RTE_PKTMBUF_HEADROOM;
815
816         order = MIN(order, rte_bsf32(data_off));
817
818         return 1u << (order - 1);
819 }
820
821 static uint16_t
822 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
823 {
824         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
825         const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
826         const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
827         uint16_t buf_size;
828         unsigned int buf_aligned;
829         unsigned int start_alignment;
830         unsigned int end_padding_alignment;
831
832         /* Below it is assumed that both alignments are power of 2 */
833         SFC_ASSERT(rte_is_power_of_2(nic_align_start));
834         SFC_ASSERT(rte_is_power_of_2(nic_align_end));
835
836         /*
837          * mbuf is always cache line aligned, double-check
838          * that it meets rx buffer start alignment requirements.
839          */
840
841         /* Start from mbuf pool data room size */
842         buf_size = rte_pktmbuf_data_room_size(mb_pool);
843
844         /* Remove headroom */
845         if (buf_size <= RTE_PKTMBUF_HEADROOM) {
846                 sfc_err(sa,
847                         "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
848                         mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
849                 return 0;
850         }
851         buf_size -= RTE_PKTMBUF_HEADROOM;
852
853         /* Calculate guaranteed data start alignment */
854         buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
855
856         /* Reserve space for start alignment */
857         if (buf_aligned < nic_align_start) {
858                 start_alignment = nic_align_start - buf_aligned;
859                 if (buf_size <= start_alignment) {
860                         sfc_err(sa,
861                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
862                                 mb_pool->name,
863                                 rte_pktmbuf_data_room_size(mb_pool),
864                                 RTE_PKTMBUF_HEADROOM, start_alignment);
865                         return 0;
866                 }
867                 buf_aligned = nic_align_start;
868                 buf_size -= start_alignment;
869         } else {
870                 start_alignment = 0;
871         }
872
873         /* Make sure that end padding does not write beyond the buffer */
874         if (buf_aligned < nic_align_end) {
875                 /*
876                  * Estimate space which can be lost. If guarnteed buffer
877                  * size is odd, lost space is (nic_align_end - 1). More
878                  * accurate formula is below.
879                  */
880                 end_padding_alignment = nic_align_end -
881                         MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
882                 if (buf_size <= end_padding_alignment) {
883                         sfc_err(sa,
884                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
885                                 mb_pool->name,
886                                 rte_pktmbuf_data_room_size(mb_pool),
887                                 RTE_PKTMBUF_HEADROOM, start_alignment,
888                                 end_padding_alignment);
889                         return 0;
890                 }
891                 buf_size -= end_padding_alignment;
892         } else {
893                 /*
894                  * Start is aligned the same or better than end,
895                  * just align length.
896                  */
897                 buf_size = P2ALIGN(buf_size, nic_align_end);
898         }
899
900         return buf_size;
901 }
902
903 int
904 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
905              uint16_t nb_rx_desc, unsigned int socket_id,
906              const struct rte_eth_rxconf *rx_conf,
907              struct rte_mempool *mb_pool)
908 {
909         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
910         int rc;
911         uint16_t buf_size;
912         struct sfc_rxq_info *rxq_info;
913         struct sfc_evq *evq;
914         struct sfc_rxq *rxq;
915         struct sfc_dp_rx_qcreate_info info;
916
917         rc = sfc_rx_qcheck_conf(sa, nb_rx_desc, rx_conf);
918         if (rc != 0)
919                 goto fail_bad_conf;
920
921         buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
922         if (buf_size == 0) {
923                 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
924                         sw_index);
925                 rc = EINVAL;
926                 goto fail_bad_conf;
927         }
928
929         if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
930             !sa->eth_dev->data->dev_conf.rxmode.enable_scatter) {
931                 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
932                         "object size is too small", sw_index);
933                 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
934                         "PDU size %u plus Rx prefix %u bytes",
935                         sw_index, buf_size, (unsigned int)sa->port.pdu,
936                         encp->enc_rx_prefix_size);
937                 rc = EINVAL;
938                 goto fail_bad_conf;
939         }
940
941         SFC_ASSERT(sw_index < sa->rxq_count);
942         rxq_info = &sa->rxq_info[sw_index];
943
944         SFC_ASSERT(nb_rx_desc <= rxq_info->max_entries);
945         rxq_info->entries = nb_rx_desc;
946         rxq_info->type =
947                 sa->eth_dev->data->dev_conf.rxmode.enable_scatter ?
948                 EFX_RXQ_TYPE_SCATTER : EFX_RXQ_TYPE_DEFAULT;
949
950         rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_RX, sw_index,
951                           rxq_info->entries, socket_id, &evq);
952         if (rc != 0)
953                 goto fail_ev_qinit;
954
955         rc = ENOMEM;
956         rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
957                                  socket_id);
958         if (rxq == NULL)
959                 goto fail_rxq_alloc;
960
961         rxq_info->rxq = rxq;
962
963         rxq->evq = evq;
964         rxq->hw_index = sw_index;
965         rxq->refill_threshold =
966                 RTE_MAX(rx_conf->rx_free_thresh, SFC_RX_REFILL_BULK);
967         rxq->refill_mb_pool = mb_pool;
968
969         rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
970                            socket_id, &rxq->mem);
971         if (rc != 0)
972                 goto fail_dma_alloc;
973
974         memset(&info, 0, sizeof(info));
975         info.refill_mb_pool = rxq->refill_mb_pool;
976         info.refill_threshold = rxq->refill_threshold;
977         info.buf_size = buf_size;
978         info.batch_max = encp->enc_rx_batch_max;
979         info.prefix_size = encp->enc_rx_prefix_size;
980
981 #if EFSYS_OPT_RX_SCALE
982         if (sa->hash_support == EFX_RX_HASH_AVAILABLE && sa->rss_channels > 0)
983                 info.flags |= SFC_RXQ_FLAG_RSS_HASH;
984 #endif
985
986         info.rxq_entries = rxq_info->entries;
987         info.rxq_hw_ring = rxq->mem.esm_base;
988         info.evq_entries = rxq_info->entries;
989         info.evq_hw_ring = evq->mem.esm_base;
990         info.hw_index = rxq->hw_index;
991         info.mem_bar = sa->mem_bar.esb_base;
992
993         rc = sa->dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index,
994                                 &RTE_ETH_DEV_TO_PCI(sa->eth_dev)->addr,
995                                 socket_id, &info, &rxq->dp);
996         if (rc != 0)
997                 goto fail_dp_rx_qcreate;
998
999         evq->dp_rxq = rxq->dp;
1000
1001         rxq->state = SFC_RXQ_INITIALIZED;
1002
1003         rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
1004
1005         return 0;
1006
1007 fail_dp_rx_qcreate:
1008         sfc_dma_free(sa, &rxq->mem);
1009
1010 fail_dma_alloc:
1011         rxq_info->rxq = NULL;
1012         rte_free(rxq);
1013
1014 fail_rxq_alloc:
1015         sfc_ev_qfini(evq);
1016
1017 fail_ev_qinit:
1018         rxq_info->entries = 0;
1019
1020 fail_bad_conf:
1021         sfc_log_init(sa, "failed %d", rc);
1022         return rc;
1023 }
1024
1025 void
1026 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
1027 {
1028         struct sfc_rxq_info *rxq_info;
1029         struct sfc_rxq *rxq;
1030
1031         SFC_ASSERT(sw_index < sa->rxq_count);
1032
1033         rxq_info = &sa->rxq_info[sw_index];
1034
1035         rxq = rxq_info->rxq;
1036         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
1037
1038         sa->dp_rx->qdestroy(rxq->dp);
1039         rxq->dp = NULL;
1040
1041         rxq_info->rxq = NULL;
1042         rxq_info->entries = 0;
1043
1044         sfc_dma_free(sa, &rxq->mem);
1045
1046         sfc_ev_qfini(rxq->evq);
1047         rxq->evq = NULL;
1048
1049         rte_free(rxq);
1050 }
1051
1052 #if EFSYS_OPT_RX_SCALE
1053 efx_rx_hash_type_t
1054 sfc_rte_to_efx_hash_type(uint64_t rss_hf)
1055 {
1056         efx_rx_hash_type_t efx_hash_types = 0;
1057
1058         if ((rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
1059                        ETH_RSS_NONFRAG_IPV4_OTHER)) != 0)
1060                 efx_hash_types |= EFX_RX_HASH_IPV4;
1061
1062         if ((rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) != 0)
1063                 efx_hash_types |= EFX_RX_HASH_TCPIPV4;
1064
1065         if ((rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
1066                         ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX)) != 0)
1067                 efx_hash_types |= EFX_RX_HASH_IPV6;
1068
1069         if ((rss_hf & (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX)) != 0)
1070                 efx_hash_types |= EFX_RX_HASH_TCPIPV6;
1071
1072         return efx_hash_types;
1073 }
1074
1075 uint64_t
1076 sfc_efx_to_rte_hash_type(efx_rx_hash_type_t efx_hash_types)
1077 {
1078         uint64_t rss_hf = 0;
1079
1080         if ((efx_hash_types & EFX_RX_HASH_IPV4) != 0)
1081                 rss_hf |= (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
1082                            ETH_RSS_NONFRAG_IPV4_OTHER);
1083
1084         if ((efx_hash_types & EFX_RX_HASH_TCPIPV4) != 0)
1085                 rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
1086
1087         if ((efx_hash_types & EFX_RX_HASH_IPV6) != 0)
1088                 rss_hf |= (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
1089                            ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX);
1090
1091         if ((efx_hash_types & EFX_RX_HASH_TCPIPV6) != 0)
1092                 rss_hf |= (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX);
1093
1094         return rss_hf;
1095 }
1096 #endif
1097
1098 #if EFSYS_OPT_RX_SCALE
1099 static int
1100 sfc_rx_rss_config(struct sfc_adapter *sa)
1101 {
1102         int rc = 0;
1103
1104         if (sa->rss_channels > 0) {
1105                 rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1106                                            EFX_RX_HASHALG_TOEPLITZ,
1107                                            sa->rss_hash_types, B_TRUE);
1108                 if (rc != 0)
1109                         goto finish;
1110
1111                 rc = efx_rx_scale_key_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1112                                           sa->rss_key,
1113                                           sizeof(sa->rss_key));
1114                 if (rc != 0)
1115                         goto finish;
1116
1117                 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1118                                           sa->rss_tbl, RTE_DIM(sa->rss_tbl));
1119         }
1120
1121 finish:
1122         return rc;
1123 }
1124 #else
1125 static int
1126 sfc_rx_rss_config(__rte_unused struct sfc_adapter *sa)
1127 {
1128         return 0;
1129 }
1130 #endif
1131
1132 int
1133 sfc_rx_start(struct sfc_adapter *sa)
1134 {
1135         unsigned int sw_index;
1136         int rc;
1137
1138         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
1139
1140         rc = efx_rx_init(sa->nic);
1141         if (rc != 0)
1142                 goto fail_rx_init;
1143
1144         rc = sfc_rx_rss_config(sa);
1145         if (rc != 0)
1146                 goto fail_rss_config;
1147
1148         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
1149                 if ((!sa->rxq_info[sw_index].deferred_start ||
1150                      sa->rxq_info[sw_index].deferred_started)) {
1151                         rc = sfc_rx_qstart(sa, sw_index);
1152                         if (rc != 0)
1153                                 goto fail_rx_qstart;
1154                 }
1155         }
1156
1157         return 0;
1158
1159 fail_rx_qstart:
1160         while (sw_index-- > 0)
1161                 sfc_rx_qstop(sa, sw_index);
1162
1163 fail_rss_config:
1164         efx_rx_fini(sa->nic);
1165
1166 fail_rx_init:
1167         sfc_log_init(sa, "failed %d", rc);
1168         return rc;
1169 }
1170
1171 void
1172 sfc_rx_stop(struct sfc_adapter *sa)
1173 {
1174         unsigned int sw_index;
1175
1176         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
1177
1178         sw_index = sa->rxq_count;
1179         while (sw_index-- > 0) {
1180                 if (sa->rxq_info[sw_index].rxq != NULL)
1181                         sfc_rx_qstop(sa, sw_index);
1182         }
1183
1184         efx_rx_fini(sa->nic);
1185 }
1186
1187 static int
1188 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
1189 {
1190         struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
1191         unsigned int max_entries;
1192
1193         max_entries = EFX_RXQ_MAXNDESCS;
1194         SFC_ASSERT(rte_is_power_of_2(max_entries));
1195
1196         rxq_info->max_entries = max_entries;
1197
1198         return 0;
1199 }
1200
1201 static int
1202 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
1203 {
1204         int rc = 0;
1205
1206         switch (rxmode->mq_mode) {
1207         case ETH_MQ_RX_NONE:
1208                 /* No special checks are required */
1209                 break;
1210 #if EFSYS_OPT_RX_SCALE
1211         case ETH_MQ_RX_RSS:
1212                 if (sa->rss_support == EFX_RX_SCALE_UNAVAILABLE) {
1213                         sfc_err(sa, "RSS is not available");
1214                         rc = EINVAL;
1215                 }
1216                 break;
1217 #endif
1218         default:
1219                 sfc_err(sa, "Rx multi-queue mode %u not supported",
1220                         rxmode->mq_mode);
1221                 rc = EINVAL;
1222         }
1223
1224         if (rxmode->header_split) {
1225                 sfc_err(sa, "Header split on Rx not supported");
1226                 rc = EINVAL;
1227         }
1228
1229         if (rxmode->hw_vlan_filter) {
1230                 sfc_err(sa, "HW VLAN filtering not supported");
1231                 rc = EINVAL;
1232         }
1233
1234         if (rxmode->hw_vlan_strip) {
1235                 sfc_err(sa, "HW VLAN stripping not supported");
1236                 rc = EINVAL;
1237         }
1238
1239         if (rxmode->hw_vlan_extend) {
1240                 sfc_err(sa,
1241                         "Q-in-Q HW VLAN stripping not supported");
1242                 rc = EINVAL;
1243         }
1244
1245         if (!rxmode->hw_strip_crc) {
1246                 sfc_warn(sa,
1247                          "FCS stripping control not supported - always stripped");
1248                 rxmode->hw_strip_crc = 1;
1249         }
1250
1251         if (rxmode->enable_scatter &&
1252             (~sa->dp_rx->features & SFC_DP_RX_FEAT_SCATTER)) {
1253                 sfc_err(sa, "Rx scatter not supported by %s datapath",
1254                         sa->dp_rx->dp.name);
1255                 rc = EINVAL;
1256         }
1257
1258         if (rxmode->enable_lro) {
1259                 sfc_err(sa, "LRO not supported");
1260                 rc = EINVAL;
1261         }
1262
1263         return rc;
1264 }
1265
1266 /**
1267  * Destroy excess queues that are no longer needed after reconfiguration
1268  * or complete close.
1269  */
1270 static void
1271 sfc_rx_fini_queues(struct sfc_adapter *sa, unsigned int nb_rx_queues)
1272 {
1273         int sw_index;
1274
1275         SFC_ASSERT(nb_rx_queues <= sa->rxq_count);
1276
1277         sw_index = sa->rxq_count;
1278         while (--sw_index >= (int)nb_rx_queues) {
1279                 if (sa->rxq_info[sw_index].rxq != NULL)
1280                         sfc_rx_qfini(sa, sw_index);
1281         }
1282
1283         sa->rxq_count = nb_rx_queues;
1284 }
1285
1286 /**
1287  * Initialize Rx subsystem.
1288  *
1289  * Called at device (re)configuration stage when number of receive queues is
1290  * specified together with other device level receive configuration.
1291  *
1292  * It should be used to allocate NUMA-unaware resources.
1293  */
1294 int
1295 sfc_rx_configure(struct sfc_adapter *sa)
1296 {
1297         struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
1298         const unsigned int nb_rx_queues = sa->eth_dev->data->nb_rx_queues;
1299         int rc;
1300
1301         sfc_log_init(sa, "nb_rx_queues=%u (old %u)",
1302                      nb_rx_queues, sa->rxq_count);
1303
1304         rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
1305         if (rc != 0)
1306                 goto fail_check_mode;
1307
1308         if (nb_rx_queues == sa->rxq_count)
1309                 goto done;
1310
1311         if (sa->rxq_info == NULL) {
1312                 rc = ENOMEM;
1313                 sa->rxq_info = rte_calloc_socket("sfc-rxqs", nb_rx_queues,
1314                                                  sizeof(sa->rxq_info[0]), 0,
1315                                                  sa->socket_id);
1316                 if (sa->rxq_info == NULL)
1317                         goto fail_rxqs_alloc;
1318         } else {
1319                 struct sfc_rxq_info *new_rxq_info;
1320
1321                 if (nb_rx_queues < sa->rxq_count)
1322                         sfc_rx_fini_queues(sa, nb_rx_queues);
1323
1324                 rc = ENOMEM;
1325                 new_rxq_info =
1326                         rte_realloc(sa->rxq_info,
1327                                     nb_rx_queues * sizeof(sa->rxq_info[0]), 0);
1328                 if (new_rxq_info == NULL && nb_rx_queues > 0)
1329                         goto fail_rxqs_realloc;
1330
1331                 sa->rxq_info = new_rxq_info;
1332                 if (nb_rx_queues > sa->rxq_count)
1333                         memset(&sa->rxq_info[sa->rxq_count], 0,
1334                                (nb_rx_queues - sa->rxq_count) *
1335                                sizeof(sa->rxq_info[0]));
1336         }
1337
1338         while (sa->rxq_count < nb_rx_queues) {
1339                 rc = sfc_rx_qinit_info(sa, sa->rxq_count);
1340                 if (rc != 0)
1341                         goto fail_rx_qinit_info;
1342
1343                 sa->rxq_count++;
1344         }
1345
1346 #if EFSYS_OPT_RX_SCALE
1347         sa->rss_channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
1348                            MIN(sa->rxq_count, EFX_MAXRSS) : 0;
1349
1350         if (sa->rss_channels > 0) {
1351                 unsigned int sw_index;
1352
1353                 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
1354                         sa->rss_tbl[sw_index] = sw_index % sa->rss_channels;
1355         }
1356 #endif
1357
1358 done:
1359         return 0;
1360
1361 fail_rx_qinit_info:
1362 fail_rxqs_realloc:
1363 fail_rxqs_alloc:
1364         sfc_rx_close(sa);
1365
1366 fail_check_mode:
1367         sfc_log_init(sa, "failed %d", rc);
1368         return rc;
1369 }
1370
1371 /**
1372  * Shutdown Rx subsystem.
1373  *
1374  * Called at device close stage, for example, before device shutdown.
1375  */
1376 void
1377 sfc_rx_close(struct sfc_adapter *sa)
1378 {
1379         sfc_rx_fini_queues(sa, 0);
1380
1381         sa->rss_channels = 0;
1382
1383         rte_free(sa->rxq_info);
1384         sa->rxq_info = NULL;
1385 }