4 * Copyright (c) 2015 - 2016 CESNET
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of CESNET nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #ifndef RTE_PMD_SZEDATA2_H_
35 #define RTE_PMD_SZEDATA2_H_
41 #include <rte_common.h>
44 #define PCI_VENDOR_ID_NETCOPE 0x1b26
47 #define PCI_DEVICE_ID_NETCOPE_COMBO80G 0xcb80
48 #define PCI_DEVICE_ID_NETCOPE_COMBO100G 0xc1c1
49 #define PCI_DEVICE_ID_NETCOPE_COMBO100G2 0xc2c1
51 /* number of PCI resource used by COMBO card */
52 #define PCI_RESOURCE_NUMBER 0
54 /* szedata2_packet header length == 4 bytes == 2B segment size + 2B hw size */
55 #define RTE_SZE2_PACKET_HEADER_SIZE 4
57 #define RTE_SZE2_MMIO_MAX 10
60 * Round 'what' to the nearest larger (or equal) multiple of '8'
61 * (szedata2 packet is aligned to 8 bytes)
63 #define RTE_SZE2_ALIGN8(what) RTE_ALIGN(what, 8)
65 /*! main handle structure */
68 struct sze2_instance_info *info;
70 void *space[RTE_SZE2_MMIO_MAX];
71 struct szedata_lock lock[2][2];
73 __u32 *rx_asize, *tx_asize;
75 /* szedata_read_next variables - to keep context (ct) */
80 /** initial sze lock ptr */
81 const struct szedata_lock *ct_rx_lck_orig;
82 /** current sze lock ptr (initial or next) */
83 const struct szedata_lock *ct_rx_lck;
84 /** remaining bytes (not read) within current lock */
85 unsigned int ct_rx_rem_bytes;
86 /** current pointer to locked memory */
87 unsigned char *ct_rx_cur_ptr;
89 * allocated buffer to store RX packet if it was split
92 unsigned char *ct_rx_buffer;
93 /** registered function to provide filtering based on hwdata */
94 int (*ct_rx_filter)(u_int16_t hwdata_len, u_char *hwdata);
100 * buffer for tx - packet is prepared here
101 * (in future for burst write)
103 unsigned char *ct_tx_buffer;
104 /** initial sze TX lock ptrs - number according to TX interfaces */
105 const struct szedata_lock **ct_tx_lck_orig;
106 /** current sze TX lock ptrs - number according to TX interfaces */
107 const struct szedata_lock **ct_tx_lck;
108 /** already written bytes in both locks */
109 unsigned int *ct_tx_written_bytes;
110 /** remaining bytes (not written) within current lock */
111 unsigned int *ct_tx_rem_bytes;
112 /** current pointers to locked memory */
113 unsigned char **ct_tx_cur_ptr;
114 /** NUMA node closest to PCIe device, or -1 */
118 #endif /* RTE_PMD_SZEDATA2_H_ */