4 * Copyright (C) Cavium networks Ltd. 2016.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
16 * * Neither the name of Cavium networks nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 #include <netinet/in.h>
43 #include <sys/queue.h>
44 #include <sys/timerfd.h>
46 #include <rte_alarm.h>
47 #include <rte_atomic.h>
48 #include <rte_branch_prediction.h>
49 #include <rte_byteorder.h>
50 #include <rte_common.h>
51 #include <rte_cycles.h>
52 #include <rte_debug.h>
55 #include <rte_ether.h>
56 #include <rte_ethdev.h>
57 #include <rte_interrupts.h>
59 #include <rte_memory.h>
60 #include <rte_memzone.h>
61 #include <rte_malloc.h>
62 #include <rte_random.h>
64 #include <rte_tailq.h>
66 #include "base/nicvf_plat.h"
68 #include "nicvf_ethdev.h"
70 #include "nicvf_logs.h"
73 nicvf_atomic_write_link_status(struct rte_eth_dev *dev,
74 struct rte_eth_link *link)
76 struct rte_eth_link *dst = &dev->data->dev_link;
77 struct rte_eth_link *src = link;
79 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
80 *(uint64_t *)src) == 0)
87 nicvf_set_eth_link_status(struct nicvf *nic, struct rte_eth_link *link)
89 link->link_status = nic->link_up;
90 link->link_duplex = ETH_LINK_AUTONEG;
91 if (nic->duplex == NICVF_HALF_DUPLEX)
92 link->link_duplex = ETH_LINK_HALF_DUPLEX;
93 else if (nic->duplex == NICVF_FULL_DUPLEX)
94 link->link_duplex = ETH_LINK_FULL_DUPLEX;
95 link->link_speed = nic->speed;
96 link->link_autoneg = ETH_LINK_SPEED_AUTONEG;
100 nicvf_interrupt(void *arg)
102 struct nicvf *nic = arg;
104 if (nicvf_reg_poll_interrupts(nic) == NIC_MBOX_MSG_BGX_LINK_CHANGE) {
105 if (nic->eth_dev->data->dev_conf.intr_conf.lsc)
106 nicvf_set_eth_link_status(nic,
107 &nic->eth_dev->data->dev_link);
108 _rte_eth_dev_callback_process(nic->eth_dev,
109 RTE_ETH_EVENT_INTR_LSC);
112 rte_eal_alarm_set(NICVF_INTR_POLL_INTERVAL_MS * 1000,
113 nicvf_interrupt, nic);
117 nicvf_periodic_alarm_start(struct nicvf *nic)
119 return rte_eal_alarm_set(NICVF_INTR_POLL_INTERVAL_MS * 1000,
120 nicvf_interrupt, nic);
124 nicvf_periodic_alarm_stop(struct nicvf *nic)
126 return rte_eal_alarm_cancel(nicvf_interrupt, nic);
130 * Return 0 means link status changed, -1 means not changed
133 nicvf_dev_link_update(struct rte_eth_dev *dev,
134 int wait_to_complete __rte_unused)
136 struct rte_eth_link link;
137 struct nicvf *nic = nicvf_pmd_priv(dev);
139 PMD_INIT_FUNC_TRACE();
141 memset(&link, 0, sizeof(link));
142 nicvf_set_eth_link_status(nic, &link);
143 return nicvf_atomic_write_link_status(dev, &link);
146 /* Initialize and register driver with DPDK Application */
147 static const struct eth_dev_ops nicvf_eth_dev_ops = {
148 .link_update = nicvf_dev_link_update,
152 nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)
155 struct rte_pci_device *pci_dev;
156 struct nicvf *nic = nicvf_pmd_priv(eth_dev);
158 PMD_INIT_FUNC_TRACE();
160 eth_dev->dev_ops = &nicvf_eth_dev_ops;
162 pci_dev = eth_dev->pci_dev;
163 rte_eth_copy_pci_info(eth_dev, pci_dev);
165 nic->device_id = pci_dev->id.device_id;
166 nic->vendor_id = pci_dev->id.vendor_id;
167 nic->subsystem_device_id = pci_dev->id.subsystem_device_id;
168 nic->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
169 nic->eth_dev = eth_dev;
171 PMD_INIT_LOG(DEBUG, "nicvf: device (%x:%x) %u:%u:%u:%u",
172 pci_dev->id.vendor_id, pci_dev->id.device_id,
173 pci_dev->addr.domain, pci_dev->addr.bus,
174 pci_dev->addr.devid, pci_dev->addr.function);
176 nic->reg_base = (uintptr_t)pci_dev->mem_resource[0].addr;
177 if (!nic->reg_base) {
178 PMD_INIT_LOG(ERR, "Failed to map BAR0");
183 nicvf_disable_all_interrupts(nic);
185 ret = nicvf_periodic_alarm_start(nic);
187 PMD_INIT_LOG(ERR, "Failed to start period alarm");
191 ret = nicvf_mbox_check_pf_ready(nic);
193 PMD_INIT_LOG(ERR, "Failed to get ready message from PF");
197 "node=%d vf=%d mode=%s sqs=%s loopback_supported=%s",
198 nic->node, nic->vf_id,
199 nic->tns_mode == NIC_TNS_MODE ? "tns" : "tns-bypass",
200 nic->sqs_mode ? "true" : "false",
201 nic->loopback_supported ? "true" : "false"
206 PMD_INIT_LOG(INFO, "Unsupported SQS VF detected, Detaching...");
207 /* Detach port by returning Positive error number */
212 eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", ETHER_ADDR_LEN, 0);
213 if (eth_dev->data->mac_addrs == NULL) {
214 PMD_INIT_LOG(ERR, "Failed to allocate memory for mac addr");
218 if (is_zero_ether_addr((struct ether_addr *)nic->mac_addr))
219 eth_random_addr(&nic->mac_addr[0]);
221 ether_addr_copy((struct ether_addr *)nic->mac_addr,
222 ð_dev->data->mac_addrs[0]);
224 ret = nicvf_mbox_set_mac_addr(nic, nic->mac_addr);
226 PMD_INIT_LOG(ERR, "Failed to set mac addr");
230 ret = nicvf_base_init(nic);
232 PMD_INIT_LOG(ERR, "Failed to execute nicvf_base_init");
236 ret = nicvf_mbox_get_rss_size(nic);
238 PMD_INIT_LOG(ERR, "Failed to get rss table size");
242 PMD_INIT_LOG(INFO, "Port %d (%x:%x) mac=%02x:%02x:%02x:%02x:%02x:%02x",
243 eth_dev->data->port_id, nic->vendor_id, nic->device_id,
244 nic->mac_addr[0], nic->mac_addr[1], nic->mac_addr[2],
245 nic->mac_addr[3], nic->mac_addr[4], nic->mac_addr[5]);
250 rte_free(eth_dev->data->mac_addrs);
252 nicvf_periodic_alarm_stop(nic);
257 static const struct rte_pci_id pci_id_nicvf_map[] = {
259 .class_id = RTE_CLASS_ANY_ID,
260 .vendor_id = PCI_VENDOR_ID_CAVIUM,
261 .device_id = PCI_DEVICE_ID_THUNDERX_PASS1_NICVF,
262 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
263 .subsystem_device_id = PCI_SUB_DEVICE_ID_THUNDERX_PASS1_NICVF,
266 .class_id = RTE_CLASS_ANY_ID,
267 .vendor_id = PCI_VENDOR_ID_CAVIUM,
268 .device_id = PCI_DEVICE_ID_THUNDERX_PASS2_NICVF,
269 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
270 .subsystem_device_id = PCI_SUB_DEVICE_ID_THUNDERX_PASS2_NICVF,
277 static struct eth_driver rte_nicvf_pmd = {
279 .name = "rte_nicvf_pmd",
280 .id_table = pci_id_nicvf_map,
281 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
283 .eth_dev_init = nicvf_eth_dev_init,
284 .dev_private_size = sizeof(struct nicvf),
288 rte_nicvf_pmd_init(const char *name __rte_unused, const char *para __rte_unused)
290 PMD_INIT_FUNC_TRACE();
291 PMD_INIT_LOG(INFO, "librte_pmd_thunderx nicvf version %s",
292 THUNDERX_NICVF_PMD_VERSION);
294 rte_eth_driver_register(&rte_nicvf_pmd);
298 static struct rte_driver rte_nicvf_driver = {
299 .name = "nicvf_driver",
301 .init = rte_nicvf_pmd_init,
304 PMD_REGISTER_DRIVER(rte_nicvf_driver);