drivers/net/thunderx/nicvf_ethdev.c

   1 /*
   2  *   BSD LICENSE
   3  *
   4  *   Copyright (C) Cavium networks Ltd. 2016.
   5  *
   6  *   Redistribution and use in source and binary forms, with or without
   7  *   modification, are permitted provided that the following conditions
   8  *   are met:
   9  *
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in
  14  *       the documentation and/or other materials provided with the
  15  *       distribution.
  16  *     * Neither the name of Cavium networks nor the names of its
  17  *       contributors may be used to endorse or promote products derived
  18  *       from this software without specific prior written permission.
  19  *
  20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <assert.h>
  34 #include <stdio.h>
  35 #include <stdbool.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42 #include <netinet/in.h>
  43 #include <sys/queue.h>
  44 #include <sys/timerfd.h>
  45
  46 #include <rte_alarm.h>
  47 #include <rte_atomic.h>
  48 #include <rte_branch_prediction.h>
  49 #include <rte_byteorder.h>
  50 #include <rte_common.h>
  51 #include <rte_cycles.h>
  52 #include <rte_debug.h>
  53 #include <rte_dev.h>
  54 #include <rte_eal.h>
  55 #include <rte_ether.h>
  56 #include <rte_ethdev.h>
  57 #include <rte_interrupts.h>
  58 #include <rte_log.h>
  59 #include <rte_memory.h>
  60 #include <rte_memzone.h>
  61 #include <rte_malloc.h>
  62 #include <rte_random.h>
  63 #include <rte_pci.h>
  64 #include <rte_tailq.h>
  65
  66 #include "base/nicvf_plat.h"
  67
  68 #include "nicvf_ethdev.h"
  69 #include "nicvf_rxtx.h"
  70 #include "nicvf_logs.h"
  71
  72 static inline int
  73 nicvf_atomic_write_link_status(struct rte_eth_dev *dev,
  74                                struct rte_eth_link *link)
  75 {
  76         struct rte_eth_link *dst = &dev->data->dev_link;
  77         struct rte_eth_link *src = link;
  78
  79         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
  80                 *(uint64_t *)src) == 0)
  81                 return -1;
  82
  83         return 0;
  84 }
  85
  86 static inline void
  87 nicvf_set_eth_link_status(struct nicvf *nic, struct rte_eth_link *link)
  88 {
  89         link->link_status = nic->link_up;
  90         link->link_duplex = ETH_LINK_AUTONEG;
  91         if (nic->duplex == NICVF_HALF_DUPLEX)
  92                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
  93         else if (nic->duplex == NICVF_FULL_DUPLEX)
  94                 link->link_duplex = ETH_LINK_FULL_DUPLEX;
  95         link->link_speed = nic->speed;
  96         link->link_autoneg = ETH_LINK_SPEED_AUTONEG;
  97 }
  98
  99 static void
 100 nicvf_interrupt(void *arg)
 101 {
 102         struct nicvf *nic = arg;
 103
 104         if (nicvf_reg_poll_interrupts(nic) == NIC_MBOX_MSG_BGX_LINK_CHANGE) {
 105                 if (nic->eth_dev->data->dev_conf.intr_conf.lsc)
 106                         nicvf_set_eth_link_status(nic,
 107                                         &nic->eth_dev->data->dev_link);
 108                 _rte_eth_dev_callback_process(nic->eth_dev,
 109                                 RTE_ETH_EVENT_INTR_LSC);
 110         }
 111
 112         rte_eal_alarm_set(NICVF_INTR_POLL_INTERVAL_MS * 1000,
 113                                 nicvf_interrupt, nic);
 114 }
 115
 116 static int
 117 nicvf_periodic_alarm_start(struct nicvf *nic)
 118 {
 119         return rte_eal_alarm_set(NICVF_INTR_POLL_INTERVAL_MS * 1000,
 120                                         nicvf_interrupt, nic);
 121 }
 122
 123 static int
 124 nicvf_periodic_alarm_stop(struct nicvf *nic)
 125 {
 126         return rte_eal_alarm_cancel(nicvf_interrupt, nic);
 127 }
 128
 129 /*
 130  * Return 0 means link status changed, -1 means not changed
 131  */
 132 static int
 133 nicvf_dev_link_update(struct rte_eth_dev *dev,
 134                       int wait_to_complete __rte_unused)
 135 {
 136         struct rte_eth_link link;
 137         struct nicvf *nic = nicvf_pmd_priv(dev);
 138
 139         PMD_INIT_FUNC_TRACE();
 140
 141         memset(&link, 0, sizeof(link));
 142         nicvf_set_eth_link_status(nic, &link);
 143         return nicvf_atomic_write_link_status(dev, &link);
 144 }
 145
 146 static int
 147 nicvf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
 148 {
 149         struct nicvf *nic = nicvf_pmd_priv(dev);
 150         uint32_t buffsz, frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
 151
 152         PMD_INIT_FUNC_TRACE();
 153
 154         if (frame_size > NIC_HW_MAX_FRS)
 155                 return -EINVAL;
 156
 157         if (frame_size < NIC_HW_MIN_FRS)
 158                 return -EINVAL;
 159
 160         buffsz = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
 161
 162         /*
 163          * Refuse mtu that requires the support of scattered packets
 164          * when this feature has not been enabled before.
 165          */
 166         if (!dev->data->scattered_rx &&
 167                 (frame_size + 2 * VLAN_TAG_SIZE > buffsz))
 168                 return -EINVAL;
 169
 170         /* check <seg size> * <max_seg>  >= max_frame */
 171         if (dev->data->scattered_rx &&
 172                 (frame_size + 2 * VLAN_TAG_SIZE > buffsz * NIC_HW_MAX_SEGS))
 173                 return -EINVAL;
 174
 175         if (frame_size > ETHER_MAX_LEN)
 176                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
 177         else
 178                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
 179
 180         if (nicvf_mbox_update_hw_max_frs(nic, frame_size))
 181                 return -EINVAL;
 182
 183         /* Update max frame size */
 184         dev->data->dev_conf.rxmode.max_rx_pkt_len = (uint32_t)frame_size;
 185         nic->mtu = mtu;
 186         return 0;
 187 }
 188
 189 static int
 190 nicvf_dev_get_reg_length(struct rte_eth_dev *dev  __rte_unused)
 191 {
 192         return nicvf_reg_get_count();
 193 }
 194
 195 static int
 196 nicvf_dev_get_regs(struct rte_eth_dev *dev, struct rte_dev_reg_info *regs)
 197 {
 198         uint64_t *data = regs->data;
 199         struct nicvf *nic = nicvf_pmd_priv(dev);
 200
 201         if (data == NULL)
 202                 return -EINVAL;
 203
 204         /* Support only full register dump */
 205         if ((regs->length == 0) ||
 206                 (regs->length == (uint32_t)nicvf_reg_get_count())) {
 207                 regs->version = nic->vendor_id << 16 | nic->device_id;
 208                 nicvf_reg_dump(nic, data);
 209                 return 0;
 210         }
 211         return -ENOTSUP;
 212 }
 213
 214 static void
 215 nicvf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 216 {
 217         uint16_t qidx;
 218         struct nicvf_hw_rx_qstats rx_qstats;
 219         struct nicvf_hw_tx_qstats tx_qstats;
 220         struct nicvf_hw_stats port_stats;
 221         struct nicvf *nic = nicvf_pmd_priv(dev);
 222
 223         /* Reading per RX ring stats */
 224         for (qidx = 0; qidx < dev->data->nb_rx_queues; qidx++) {
 225                 if (qidx == RTE_ETHDEV_QUEUE_STAT_CNTRS)
 226                         break;
 227
 228                 nicvf_hw_get_rx_qstats(nic, &rx_qstats, qidx);
 229                 stats->q_ibytes[qidx] = rx_qstats.q_rx_bytes;
 230                 stats->q_ipackets[qidx] = rx_qstats.q_rx_packets;
 231         }
 232
 233         /* Reading per TX ring stats */
 234         for (qidx = 0; qidx < dev->data->nb_tx_queues; qidx++) {
 235                 if (qidx == RTE_ETHDEV_QUEUE_STAT_CNTRS)
 236                         break;
 237
 238                 nicvf_hw_get_tx_qstats(nic, &tx_qstats, qidx);
 239                 stats->q_obytes[qidx] = tx_qstats.q_tx_bytes;
 240                 stats->q_opackets[qidx] = tx_qstats.q_tx_packets;
 241         }
 242
 243         nicvf_hw_get_stats(nic, &port_stats);
 244         stats->ibytes = port_stats.rx_bytes;
 245         stats->ipackets = port_stats.rx_ucast_frames;
 246         stats->ipackets += port_stats.rx_bcast_frames;
 247         stats->ipackets += port_stats.rx_mcast_frames;
 248         stats->ierrors = port_stats.rx_l2_errors;
 249         stats->imissed = port_stats.rx_drop_red;
 250         stats->imissed += port_stats.rx_drop_overrun;
 251         stats->imissed += port_stats.rx_drop_bcast;
 252         stats->imissed += port_stats.rx_drop_mcast;
 253         stats->imissed += port_stats.rx_drop_l3_bcast;
 254         stats->imissed += port_stats.rx_drop_l3_mcast;
 255
 256         stats->obytes = port_stats.tx_bytes_ok;
 257         stats->opackets = port_stats.tx_ucast_frames_ok;
 258         stats->opackets += port_stats.tx_bcast_frames_ok;
 259         stats->opackets += port_stats.tx_mcast_frames_ok;
 260         stats->oerrors = port_stats.tx_drops;
 261 }
 262
 263 static void
 264 nicvf_dev_stats_reset(struct rte_eth_dev *dev)
 265 {
 266         int i;
 267         uint16_t rxqs = 0, txqs = 0;
 268         struct nicvf *nic = nicvf_pmd_priv(dev);
 269
 270         for (i = 0; i < dev->data->nb_rx_queues; i++)
 271                 rxqs |= (0x3 << (i * 2));
 272         for (i = 0; i < dev->data->nb_tx_queues; i++)
 273                 txqs |= (0x3 << (i * 2));
 274
 275         nicvf_mbox_reset_stat_counters(nic, 0x3FFF, 0x1F, rxqs, txqs);
 276 }
 277
 278 /* Promiscuous mode enabled by default in LMAC to VF 1:1 map configuration */
 279 static void
 280 nicvf_dev_promisc_enable(struct rte_eth_dev *dev __rte_unused)
 281 {
 282 }
 283
 284 static inline uint64_t
 285 nicvf_rss_ethdev_to_nic(struct nicvf *nic, uint64_t ethdev_rss)
 286 {
 287         uint64_t nic_rss = 0;
 288
 289         if (ethdev_rss & ETH_RSS_IPV4)
 290                 nic_rss |= RSS_IP_ENA;
 291
 292         if (ethdev_rss & ETH_RSS_IPV6)
 293                 nic_rss |= RSS_IP_ENA;
 294
 295         if (ethdev_rss & ETH_RSS_NONFRAG_IPV4_UDP)
 296                 nic_rss |= (RSS_IP_ENA | RSS_UDP_ENA);
 297
 298         if (ethdev_rss & ETH_RSS_NONFRAG_IPV4_TCP)
 299                 nic_rss |= (RSS_IP_ENA | RSS_TCP_ENA);
 300
 301         if (ethdev_rss & ETH_RSS_NONFRAG_IPV6_UDP)
 302                 nic_rss |= (RSS_IP_ENA | RSS_UDP_ENA);
 303
 304         if (ethdev_rss & ETH_RSS_NONFRAG_IPV6_TCP)
 305                 nic_rss |= (RSS_IP_ENA | RSS_TCP_ENA);
 306
 307         if (ethdev_rss & ETH_RSS_PORT)
 308                 nic_rss |= RSS_L2_EXTENDED_HASH_ENA;
 309
 310         if (nicvf_hw_cap(nic) & NICVF_CAP_TUNNEL_PARSING) {
 311                 if (ethdev_rss & ETH_RSS_VXLAN)
 312                         nic_rss |= RSS_TUN_VXLAN_ENA;
 313
 314                 if (ethdev_rss & ETH_RSS_GENEVE)
 315                         nic_rss |= RSS_TUN_GENEVE_ENA;
 316
 317                 if (ethdev_rss & ETH_RSS_NVGRE)
 318                         nic_rss |= RSS_TUN_NVGRE_ENA;
 319         }
 320
 321         return nic_rss;
 322 }
 323
 324 static inline uint64_t
 325 nicvf_rss_nic_to_ethdev(struct nicvf *nic,  uint64_t nic_rss)
 326 {
 327         uint64_t ethdev_rss = 0;
 328
 329         if (nic_rss & RSS_IP_ENA)
 330                 ethdev_rss |= (ETH_RSS_IPV4 | ETH_RSS_IPV6);
 331
 332         if ((nic_rss & RSS_IP_ENA) && (nic_rss & RSS_TCP_ENA))
 333                 ethdev_rss |= (ETH_RSS_NONFRAG_IPV4_TCP |
 334                                 ETH_RSS_NONFRAG_IPV6_TCP);
 335
 336         if ((nic_rss & RSS_IP_ENA) && (nic_rss & RSS_UDP_ENA))
 337                 ethdev_rss |= (ETH_RSS_NONFRAG_IPV4_UDP |
 338                                 ETH_RSS_NONFRAG_IPV6_UDP);
 339
 340         if (nic_rss & RSS_L2_EXTENDED_HASH_ENA)
 341                 ethdev_rss |= ETH_RSS_PORT;
 342
 343         if (nicvf_hw_cap(nic) & NICVF_CAP_TUNNEL_PARSING) {
 344                 if (nic_rss & RSS_TUN_VXLAN_ENA)
 345                         ethdev_rss |= ETH_RSS_VXLAN;
 346
 347                 if (nic_rss & RSS_TUN_GENEVE_ENA)
 348                         ethdev_rss |= ETH_RSS_GENEVE;
 349
 350                 if (nic_rss & RSS_TUN_NVGRE_ENA)
 351                         ethdev_rss |= ETH_RSS_NVGRE;
 352         }
 353         return ethdev_rss;
 354 }
 355
 356 static int
 357 nicvf_dev_reta_query(struct rte_eth_dev *dev,
 358                      struct rte_eth_rss_reta_entry64 *reta_conf,
 359                      uint16_t reta_size)
 360 {
 361         struct nicvf *nic = nicvf_pmd_priv(dev);
 362         uint8_t tbl[NIC_MAX_RSS_IDR_TBL_SIZE];
 363         int ret, i, j;
 364
 365         if (reta_size != NIC_MAX_RSS_IDR_TBL_SIZE) {
 366                 RTE_LOG(ERR, PMD, "The size of hash lookup table configured "
 367                         "(%d) doesn't match the number hardware can supported "
 368                         "(%d)", reta_size, NIC_MAX_RSS_IDR_TBL_SIZE);
 369                 return -EINVAL;
 370         }
 371
 372         ret = nicvf_rss_reta_query(nic, tbl, NIC_MAX_RSS_IDR_TBL_SIZE);
 373         if (ret)
 374                 return ret;
 375
 376         /* Copy RETA table */
 377         for (i = 0; i < (NIC_MAX_RSS_IDR_TBL_SIZE / RTE_RETA_GROUP_SIZE); i++) {
 378                 for (j = 0; j < RTE_RETA_GROUP_SIZE; j++)
 379                         if ((reta_conf[i].mask >> j) & 0x01)
 380                                 reta_conf[i].reta[j] = tbl[j];
 381         }
 382
 383         return 0;
 384 }
 385
 386 static int
 387 nicvf_dev_reta_update(struct rte_eth_dev *dev,
 388                       struct rte_eth_rss_reta_entry64 *reta_conf,
 389                       uint16_t reta_size)
 390 {
 391         struct nicvf *nic = nicvf_pmd_priv(dev);
 392         uint8_t tbl[NIC_MAX_RSS_IDR_TBL_SIZE];
 393         int ret, i, j;
 394
 395         if (reta_size != NIC_MAX_RSS_IDR_TBL_SIZE) {
 396                 RTE_LOG(ERR, PMD, "The size of hash lookup table configured "
 397                         "(%d) doesn't match the number hardware can supported "
 398                         "(%d)", reta_size, NIC_MAX_RSS_IDR_TBL_SIZE);
 399                 return -EINVAL;
 400         }
 401
 402         ret = nicvf_rss_reta_query(nic, tbl, NIC_MAX_RSS_IDR_TBL_SIZE);
 403         if (ret)
 404                 return ret;
 405
 406         /* Copy RETA table */
 407         for (i = 0; i < (NIC_MAX_RSS_IDR_TBL_SIZE / RTE_RETA_GROUP_SIZE); i++) {
 408                 for (j = 0; j < RTE_RETA_GROUP_SIZE; j++)
 409                         if ((reta_conf[i].mask >> j) & 0x01)
 410                                 tbl[j] = reta_conf[i].reta[j];
 411         }
 412
 413         return nicvf_rss_reta_update(nic, tbl, NIC_MAX_RSS_IDR_TBL_SIZE);
 414 }
 415
 416 static int
 417 nicvf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 418                             struct rte_eth_rss_conf *rss_conf)
 419 {
 420         struct nicvf *nic = nicvf_pmd_priv(dev);
 421
 422         if (rss_conf->rss_key)
 423                 nicvf_rss_get_key(nic, rss_conf->rss_key);
 424
 425         rss_conf->rss_key_len =  RSS_HASH_KEY_BYTE_SIZE;
 426         rss_conf->rss_hf = nicvf_rss_nic_to_ethdev(nic, nicvf_rss_get_cfg(nic));
 427         return 0;
 428 }
 429
 430 static int
 431 nicvf_dev_rss_hash_update(struct rte_eth_dev *dev,
 432                           struct rte_eth_rss_conf *rss_conf)
 433 {
 434         struct nicvf *nic = nicvf_pmd_priv(dev);
 435         uint64_t nic_rss;
 436
 437         if (rss_conf->rss_key &&
 438                 rss_conf->rss_key_len != RSS_HASH_KEY_BYTE_SIZE) {
 439                 RTE_LOG(ERR, PMD, "Hash key size mismatch %d",
 440                                 rss_conf->rss_key_len);
 441                 return -EINVAL;
 442         }
 443
 444         if (rss_conf->rss_key)
 445                 nicvf_rss_set_key(nic, rss_conf->rss_key);
 446
 447         nic_rss = nicvf_rss_ethdev_to_nic(nic, rss_conf->rss_hf);
 448         nicvf_rss_set_cfg(nic, nic_rss);
 449         return 0;
 450 }
 451
 452 static int
 453 nicvf_qset_cq_alloc(struct nicvf *nic, struct nicvf_rxq *rxq, uint16_t qidx,
 454                     uint32_t desc_cnt)
 455 {
 456         const struct rte_memzone *rz;
 457         uint32_t ring_size = desc_cnt * sizeof(union cq_entry_t);
 458
 459         rz = rte_eth_dma_zone_reserve(nic->eth_dev, "cq_ring", qidx, ring_size,
 460                                         NICVF_CQ_BASE_ALIGN_BYTES, nic->node);
 461         if (rz == NULL) {
 462                 PMD_INIT_LOG(ERR, "Failed to allocate mem for cq hw ring");
 463                 return -ENOMEM;
 464         }
 465
 466         memset(rz->addr, 0, ring_size);
 467
 468         rxq->phys = rz->phys_addr;
 469         rxq->desc = rz->addr;
 470         rxq->qlen_mask = desc_cnt - 1;
 471
 472         return 0;
 473 }
 474
 475 static int
 476 nicvf_qset_sq_alloc(struct nicvf *nic,  struct nicvf_txq *sq, uint16_t qidx,
 477                     uint32_t desc_cnt)
 478 {
 479         const struct rte_memzone *rz;
 480         uint32_t ring_size = desc_cnt * sizeof(union sq_entry_t);
 481
 482         rz = rte_eth_dma_zone_reserve(nic->eth_dev, "sq", qidx, ring_size,
 483                                 NICVF_SQ_BASE_ALIGN_BYTES, nic->node);
 484         if (rz == NULL) {
 485                 PMD_INIT_LOG(ERR, "Failed allocate mem for sq hw ring");
 486                 return -ENOMEM;
 487         }
 488
 489         memset(rz->addr, 0, ring_size);
 490
 491         sq->phys = rz->phys_addr;
 492         sq->desc = rz->addr;
 493         sq->qlen_mask = desc_cnt - 1;
 494
 495         return 0;
 496 }
 497
 498 static inline void
 499 nicvf_tx_queue_release_mbufs(struct nicvf_txq *txq)
 500 {
 501         uint32_t head;
 502
 503         head = txq->head;
 504         while (head != txq->tail) {
 505                 if (txq->txbuffs[head]) {
 506                         rte_pktmbuf_free_seg(txq->txbuffs[head]);
 507                         txq->txbuffs[head] = NULL;
 508                 }
 509                 head++;
 510                 head = head & txq->qlen_mask;
 511         }
 512 }
 513
 514 static void
 515 nicvf_tx_queue_reset(struct nicvf_txq *txq)
 516 {
 517         uint32_t txq_desc_cnt = txq->qlen_mask + 1;
 518
 519         memset(txq->desc, 0, sizeof(union sq_entry_t) * txq_desc_cnt);
 520         memset(txq->txbuffs, 0, sizeof(struct rte_mbuf *) * txq_desc_cnt);
 521         txq->tail = 0;
 522         txq->head = 0;
 523         txq->xmit_bufs = 0;
 524 }
 525
 526 static void
 527 nicvf_dev_tx_queue_release(void *sq)
 528 {
 529         struct nicvf_txq *txq;
 530
 531         PMD_INIT_FUNC_TRACE();
 532
 533         txq = (struct nicvf_txq *)sq;
 534         if (txq) {
 535                 if (txq->txbuffs != NULL) {
 536                         nicvf_tx_queue_release_mbufs(txq);
 537                         rte_free(txq->txbuffs);
 538                         txq->txbuffs = NULL;
 539                 }
 540                 rte_free(txq);
 541         }
 542 }
 543
 544 static int
 545 nicvf_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
 546                          uint16_t nb_desc, unsigned int socket_id,
 547                          const struct rte_eth_txconf *tx_conf)
 548 {
 549         uint16_t tx_free_thresh;
 550         uint8_t is_single_pool;
 551         struct nicvf_txq *txq;
 552         struct nicvf *nic = nicvf_pmd_priv(dev);
 553
 554         PMD_INIT_FUNC_TRACE();
 555
 556         /* Socket id check */
 557         if (socket_id != (unsigned int)SOCKET_ID_ANY && socket_id != nic->node)
 558                 PMD_DRV_LOG(WARNING, "socket_id expected %d, configured %d",
 559                 socket_id, nic->node);
 560
 561         /* Tx deferred start is not supported */
 562         if (tx_conf->tx_deferred_start) {
 563                 PMD_INIT_LOG(ERR, "Tx deferred start not supported");
 564                 return -EINVAL;
 565         }
 566
 567         /* Roundup nb_desc to available qsize and validate max number of desc */
 568         nb_desc = nicvf_qsize_sq_roundup(nb_desc);
 569         if (nb_desc == 0) {
 570                 PMD_INIT_LOG(ERR, "Value of nb_desc beyond available sq qsize");
 571                 return -EINVAL;
 572         }
 573
 574         /* Validate tx_free_thresh */
 575         tx_free_thresh = (uint16_t)((tx_conf->tx_free_thresh) ?
 576                                 tx_conf->tx_free_thresh :
 577                                 NICVF_DEFAULT_TX_FREE_THRESH);
 578
 579         if (tx_free_thresh > (nb_desc) ||
 580                 tx_free_thresh > NICVF_MAX_TX_FREE_THRESH) {
 581                 PMD_INIT_LOG(ERR,
 582                         "tx_free_thresh must be less than the number of TX "
 583                         "descriptors. (tx_free_thresh=%u port=%d "
 584                         "queue=%d)", (unsigned int)tx_free_thresh,
 585                         (int)dev->data->port_id, (int)qidx);
 586                 return -EINVAL;
 587         }
 588
 589         /* Free memory prior to re-allocation if needed. */
 590         if (dev->data->tx_queues[qidx] != NULL) {
 591                 PMD_TX_LOG(DEBUG, "Freeing memory prior to re-allocation %d",
 592                                 qidx);
 593                 nicvf_dev_tx_queue_release(dev->data->tx_queues[qidx]);
 594                 dev->data->tx_queues[qidx] = NULL;
 595         }
 596
 597         /* Allocating tx queue data structure */
 598         txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct nicvf_txq),
 599                                         RTE_CACHE_LINE_SIZE, nic->node);
 600         if (txq == NULL) {
 601                 PMD_INIT_LOG(ERR, "Failed to allocate txq=%d", qidx);
 602                 return -ENOMEM;
 603         }
 604
 605         txq->nic = nic;
 606         txq->queue_id = qidx;
 607         txq->tx_free_thresh = tx_free_thresh;
 608         txq->txq_flags = tx_conf->txq_flags;
 609         txq->sq_head = nicvf_qset_base(nic, qidx) + NIC_QSET_SQ_0_7_HEAD;
 610         txq->sq_door = nicvf_qset_base(nic, qidx) + NIC_QSET_SQ_0_7_DOOR;
 611         is_single_pool = (txq->txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT &&
 612                                 txq->txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP);
 613
 614         /* Choose optimum free threshold value for multipool case */
 615         if (!is_single_pool) {
 616                 txq->tx_free_thresh = (uint16_t)
 617                 (tx_conf->tx_free_thresh == NICVF_DEFAULT_TX_FREE_THRESH ?
 618                                 NICVF_TX_FREE_MPOOL_THRESH :
 619                                 tx_conf->tx_free_thresh);
 620                 txq->pool_free = nicvf_multi_pool_free_xmited_buffers;
 621         } else {
 622                 txq->pool_free = nicvf_single_pool_free_xmited_buffers;
 623         }
 624
 625         /* Allocate software ring */
 626         txq->txbuffs = rte_zmalloc_socket("txq->txbuffs",
 627                                 nb_desc * sizeof(struct rte_mbuf *),
 628                                 RTE_CACHE_LINE_SIZE, nic->node);
 629
 630         if (txq->txbuffs == NULL) {
 631                 nicvf_dev_tx_queue_release(txq);
 632                 return -ENOMEM;
 633         }
 634
 635         if (nicvf_qset_sq_alloc(nic, txq, qidx, nb_desc)) {
 636                 PMD_INIT_LOG(ERR, "Failed to allocate mem for sq %d", qidx);
 637                 nicvf_dev_tx_queue_release(txq);
 638                 return -ENOMEM;
 639         }
 640
 641         nicvf_tx_queue_reset(txq);
 642
 643         PMD_TX_LOG(DEBUG, "[%d] txq=%p nb_desc=%d desc=%p phys=0x%" PRIx64,
 644                         qidx, txq, nb_desc, txq->desc, txq->phys);
 645
 646         dev->data->tx_queues[qidx] = txq;
 647         dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
 648         return 0;
 649 }
 650
 651 static void
 652 nicvf_rx_queue_reset(struct nicvf_rxq *rxq)
 653 {
 654         rxq->head = 0;
 655         rxq->available_space = 0;
 656         rxq->recv_buffers = 0;
 657 }
 658
 659 static void
 660 nicvf_dev_rx_queue_release(void *rx_queue)
 661 {
 662         struct nicvf_rxq *rxq = rx_queue;
 663
 664         PMD_INIT_FUNC_TRACE();
 665
 666         if (rxq)
 667                 rte_free(rxq);
 668 }
 669
 670 static int
 671 nicvf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
 672                          uint16_t nb_desc, unsigned int socket_id,
 673                          const struct rte_eth_rxconf *rx_conf,
 674                          struct rte_mempool *mp)
 675 {
 676         uint16_t rx_free_thresh;
 677         struct nicvf_rxq *rxq;
 678         struct nicvf *nic = nicvf_pmd_priv(dev);
 679
 680         PMD_INIT_FUNC_TRACE();
 681
 682         /* Socket id check */
 683         if (socket_id != (unsigned int)SOCKET_ID_ANY && socket_id != nic->node)
 684                 PMD_DRV_LOG(WARNING, "socket_id expected %d, configured %d",
 685                 socket_id, nic->node);
 686
 687         /* Mempool memory should be contiguous */
 688         if (mp->nb_mem_chunks != 1) {
 689                 PMD_INIT_LOG(ERR, "Non contiguous mempool, check huge page sz");
 690                 return -EINVAL;
 691         }
 692
 693         /* Rx deferred start is not supported */
 694         if (rx_conf->rx_deferred_start) {
 695                 PMD_INIT_LOG(ERR, "Rx deferred start not supported");
 696                 return -EINVAL;
 697         }
 698
 699         /* Roundup nb_desc to available qsize and validate max number of desc */
 700         nb_desc = nicvf_qsize_cq_roundup(nb_desc);
 701         if (nb_desc == 0) {
 702                 PMD_INIT_LOG(ERR, "Value nb_desc beyond available hw cq qsize");
 703                 return -EINVAL;
 704         }
 705
 706         /* Check rx_free_thresh upper bound */
 707         rx_free_thresh = (uint16_t)((rx_conf->rx_free_thresh) ?
 708                                 rx_conf->rx_free_thresh :
 709                                 NICVF_DEFAULT_RX_FREE_THRESH);
 710         if (rx_free_thresh > NICVF_MAX_RX_FREE_THRESH ||
 711                 rx_free_thresh >= nb_desc * .75) {
 712                 PMD_INIT_LOG(ERR, "rx_free_thresh greater than expected %d",
 713                                 rx_free_thresh);
 714                 return -EINVAL;
 715         }
 716
 717         /* Free memory prior to re-allocation if needed */
 718         if (dev->data->rx_queues[qidx] != NULL) {
 719                 PMD_RX_LOG(DEBUG, "Freeing memory prior to re-allocation %d",
 720                                 qidx);
 721                 nicvf_dev_rx_queue_release(dev->data->rx_queues[qidx]);
 722                 dev->data->rx_queues[qidx] = NULL;
 723         }
 724
 725         /* Allocate rxq memory */
 726         rxq = rte_zmalloc_socket("ethdev rx queue", sizeof(struct nicvf_rxq),
 727                                         RTE_CACHE_LINE_SIZE, nic->node);
 728         if (rxq == NULL) {
 729                 PMD_INIT_LOG(ERR, "Failed to allocate rxq=%d", qidx);
 730                 return -ENOMEM;
 731         }
 732
 733         rxq->nic = nic;
 734         rxq->pool = mp;
 735         rxq->queue_id = qidx;
 736         rxq->port_id = dev->data->port_id;
 737         rxq->rx_free_thresh = rx_free_thresh;
 738         rxq->rx_drop_en = rx_conf->rx_drop_en;
 739         rxq->cq_status = nicvf_qset_base(nic, qidx) + NIC_QSET_CQ_0_7_STATUS;
 740         rxq->cq_door = nicvf_qset_base(nic, qidx) + NIC_QSET_CQ_0_7_DOOR;
 741         rxq->precharge_cnt = 0;
 742         rxq->rbptr_offset = NICVF_CQE_RBPTR_WORD;
 743
 744         /* Alloc completion queue */
 745         if (nicvf_qset_cq_alloc(nic, rxq, rxq->queue_id, nb_desc)) {
 746                 PMD_INIT_LOG(ERR, "failed to allocate cq %u", rxq->queue_id);
 747                 nicvf_dev_rx_queue_release(rxq);
 748                 return -ENOMEM;
 749         }
 750
 751         nicvf_rx_queue_reset(rxq);
 752
 753         PMD_RX_LOG(DEBUG, "[%d] rxq=%p pool=%s nb_desc=(%d/%d) phy=%" PRIx64,
 754                         qidx, rxq, mp->name, nb_desc,
 755                         rte_mempool_count(mp), rxq->phys);
 756
 757         dev->data->rx_queues[qidx] = rxq;
 758         dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
 759         return 0;
 760 }
 761
 762 static void
 763 nicvf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 764 {
 765         struct nicvf *nic = nicvf_pmd_priv(dev);
 766
 767         PMD_INIT_FUNC_TRACE();
 768
 769         dev_info->min_rx_bufsize = ETHER_MIN_MTU;
 770         dev_info->max_rx_pktlen = NIC_HW_MAX_FRS;
 771         dev_info->max_rx_queues = (uint16_t)MAX_RCV_QUEUES_PER_QS;
 772         dev_info->max_tx_queues = (uint16_t)MAX_SND_QUEUES_PER_QS;
 773         dev_info->max_mac_addrs = 1;
 774         dev_info->max_vfs = dev->pci_dev->max_vfs;
 775
 776         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP;
 777         dev_info->tx_offload_capa =
 778                 DEV_TX_OFFLOAD_IPV4_CKSUM  |
 779                 DEV_TX_OFFLOAD_UDP_CKSUM   |
 780                 DEV_TX_OFFLOAD_TCP_CKSUM   |
 781                 DEV_TX_OFFLOAD_TCP_TSO     |
 782                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
 783
 784         dev_info->reta_size = nic->rss_info.rss_size;
 785         dev_info->hash_key_size = RSS_HASH_KEY_BYTE_SIZE;
 786         dev_info->flow_type_rss_offloads = NICVF_RSS_OFFLOAD_PASS1;
 787         if (nicvf_hw_cap(nic) & NICVF_CAP_TUNNEL_PARSING)
 788                 dev_info->flow_type_rss_offloads |= NICVF_RSS_OFFLOAD_TUNNEL;
 789
 790         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 791                 .rx_free_thresh = NICVF_DEFAULT_RX_FREE_THRESH,
 792                 .rx_drop_en = 0,
 793         };
 794
 795         dev_info->default_txconf = (struct rte_eth_txconf) {
 796                 .tx_free_thresh = NICVF_DEFAULT_TX_FREE_THRESH,
 797                 .txq_flags =
 798                         ETH_TXQ_FLAGS_NOMULTSEGS  |
 799                         ETH_TXQ_FLAGS_NOREFCOUNT  |
 800                         ETH_TXQ_FLAGS_NOMULTMEMP  |
 801                         ETH_TXQ_FLAGS_NOVLANOFFL  |
 802                         ETH_TXQ_FLAGS_NOXSUMSCTP,
 803         };
 804 }
 805
 806 static int
 807 nicvf_dev_configure(struct rte_eth_dev *dev)
 808 {
 809         struct rte_eth_conf *conf = &dev->data->dev_conf;
 810         struct rte_eth_rxmode *rxmode = &conf->rxmode;
 811         struct rte_eth_txmode *txmode = &conf->txmode;
 812         struct nicvf *nic = nicvf_pmd_priv(dev);
 813
 814         PMD_INIT_FUNC_TRACE();
 815
 816         if (!rte_eal_has_hugepages()) {
 817                 PMD_INIT_LOG(INFO, "Huge page is not configured");
 818                 return -EINVAL;
 819         }
 820
 821         if (txmode->mq_mode) {
 822                 PMD_INIT_LOG(INFO, "Tx mq_mode DCB or VMDq not supported");
 823                 return -EINVAL;
 824         }
 825
 826         if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
 827                 rxmode->mq_mode != ETH_MQ_RX_RSS) {
 828                 PMD_INIT_LOG(INFO, "Unsupported rx qmode %d", rxmode->mq_mode);
 829                 return -EINVAL;
 830         }
 831
 832         if (!rxmode->hw_strip_crc) {
 833                 PMD_INIT_LOG(NOTICE, "Can't disable hw crc strip");
 834                 rxmode->hw_strip_crc = 1;
 835         }
 836
 837         if (rxmode->hw_ip_checksum) {
 838                 PMD_INIT_LOG(NOTICE, "Rxcksum not supported");
 839                 rxmode->hw_ip_checksum = 0;
 840         }
 841
 842         if (rxmode->split_hdr_size) {
 843                 PMD_INIT_LOG(INFO, "Rxmode does not support split header");
 844                 return -EINVAL;
 845         }
 846
 847         if (rxmode->hw_vlan_filter) {
 848                 PMD_INIT_LOG(INFO, "VLAN filter not supported");
 849                 return -EINVAL;
 850         }
 851
 852         if (rxmode->hw_vlan_extend) {
 853                 PMD_INIT_LOG(INFO, "VLAN extended not supported");
 854                 return -EINVAL;
 855         }
 856
 857         if (rxmode->enable_lro) {
 858                 PMD_INIT_LOG(INFO, "LRO not supported");
 859                 return -EINVAL;
 860         }
 861
 862         if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
 863                 PMD_INIT_LOG(INFO, "Setting link speed/duplex not supported");
 864                 return -EINVAL;
 865         }
 866
 867         if (conf->dcb_capability_en) {
 868                 PMD_INIT_LOG(INFO, "DCB enable not supported");
 869                 return -EINVAL;
 870         }
 871
 872         if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
 873                 PMD_INIT_LOG(INFO, "Flow director not supported");
 874                 return -EINVAL;
 875         }
 876
 877         PMD_INIT_LOG(DEBUG, "Configured ethdev port%d hwcap=0x%" PRIx64,
 878                 dev->data->port_id, nicvf_hw_cap(nic));
 879
 880         return 0;
 881 }
 882
 883 /* Initialize and register driver with DPDK Application */
 884 static const struct eth_dev_ops nicvf_eth_dev_ops = {
 885         .dev_configure            = nicvf_dev_configure,
 886         .link_update              = nicvf_dev_link_update,
 887         .stats_get                = nicvf_dev_stats_get,
 888         .stats_reset              = nicvf_dev_stats_reset,
 889         .promiscuous_enable       = nicvf_dev_promisc_enable,
 890         .dev_infos_get            = nicvf_dev_info_get,
 891         .mtu_set                  = nicvf_dev_set_mtu,
 892         .reta_update              = nicvf_dev_reta_update,
 893         .reta_query               = nicvf_dev_reta_query,
 894         .rss_hash_update          = nicvf_dev_rss_hash_update,
 895         .rss_hash_conf_get        = nicvf_dev_rss_hash_conf_get,
 896         .rx_queue_setup           = nicvf_dev_rx_queue_setup,
 897         .rx_queue_release         = nicvf_dev_rx_queue_release,
 898         .tx_queue_setup           = nicvf_dev_tx_queue_setup,
 899         .tx_queue_release         = nicvf_dev_tx_queue_release,
 900         .get_reg_length           = nicvf_dev_get_reg_length,
 901         .get_reg                  = nicvf_dev_get_regs,
 902 };
 903
 904 static int
 905 nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)
 906 {
 907         int ret;
 908         struct rte_pci_device *pci_dev;
 909         struct nicvf *nic = nicvf_pmd_priv(eth_dev);
 910
 911         PMD_INIT_FUNC_TRACE();
 912
 913         eth_dev->dev_ops = &nicvf_eth_dev_ops;
 914
 915         pci_dev = eth_dev->pci_dev;
 916         rte_eth_copy_pci_info(eth_dev, pci_dev);
 917
 918         nic->device_id = pci_dev->id.device_id;
 919         nic->vendor_id = pci_dev->id.vendor_id;
 920         nic->subsystem_device_id = pci_dev->id.subsystem_device_id;
 921         nic->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
 922         nic->eth_dev = eth_dev;
 923
 924         PMD_INIT_LOG(DEBUG, "nicvf: device (%x:%x) %u:%u:%u:%u",
 925                         pci_dev->id.vendor_id, pci_dev->id.device_id,
 926                         pci_dev->addr.domain, pci_dev->addr.bus,
 927                         pci_dev->addr.devid, pci_dev->addr.function);
 928
 929         nic->reg_base = (uintptr_t)pci_dev->mem_resource[0].addr;
 930         if (!nic->reg_base) {
 931                 PMD_INIT_LOG(ERR, "Failed to map BAR0");
 932                 ret = -ENODEV;
 933                 goto fail;
 934         }
 935
 936         nicvf_disable_all_interrupts(nic);
 937
 938         ret = nicvf_periodic_alarm_start(nic);
 939         if (ret) {
 940                 PMD_INIT_LOG(ERR, "Failed to start period alarm");
 941                 goto fail;
 942         }
 943
 944         ret = nicvf_mbox_check_pf_ready(nic);
 945         if (ret) {
 946                 PMD_INIT_LOG(ERR, "Failed to get ready message from PF");
 947                 goto alarm_fail;
 948         } else {
 949                 PMD_INIT_LOG(INFO,
 950                         "node=%d vf=%d mode=%s sqs=%s loopback_supported=%s",
 951                         nic->node, nic->vf_id,
 952                         nic->tns_mode == NIC_TNS_MODE ? "tns" : "tns-bypass",
 953                         nic->sqs_mode ? "true" : "false",
 954                         nic->loopback_supported ? "true" : "false"
 955                         );
 956         }
 957
 958         if (nic->sqs_mode) {
 959                 PMD_INIT_LOG(INFO, "Unsupported SQS VF detected, Detaching...");
 960                 /* Detach port by returning Positive error number */
 961                 ret = ENOTSUP;
 962                 goto alarm_fail;
 963         }
 964
 965         eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", ETHER_ADDR_LEN, 0);
 966         if (eth_dev->data->mac_addrs == NULL) {
 967                 PMD_INIT_LOG(ERR, "Failed to allocate memory for mac addr");
 968                 ret = -ENOMEM;
 969                 goto alarm_fail;
 970         }
 971         if (is_zero_ether_addr((struct ether_addr *)nic->mac_addr))
 972                 eth_random_addr(&nic->mac_addr[0]);
 973
 974         ether_addr_copy((struct ether_addr *)nic->mac_addr,
 975                         &eth_dev->data->mac_addrs[0]);
 976
 977         ret = nicvf_mbox_set_mac_addr(nic, nic->mac_addr);
 978         if (ret) {
 979                 PMD_INIT_LOG(ERR, "Failed to set mac addr");
 980                 goto malloc_fail;
 981         }
 982
 983         ret = nicvf_base_init(nic);
 984         if (ret) {
 985                 PMD_INIT_LOG(ERR, "Failed to execute nicvf_base_init");
 986                 goto malloc_fail;
 987         }
 988
 989         ret = nicvf_mbox_get_rss_size(nic);
 990         if (ret) {
 991                 PMD_INIT_LOG(ERR, "Failed to get rss table size");
 992                 goto malloc_fail;
 993         }
 994
 995         PMD_INIT_LOG(INFO, "Port %d (%x:%x) mac=%02x:%02x:%02x:%02x:%02x:%02x",
 996                 eth_dev->data->port_id, nic->vendor_id, nic->device_id,
 997                 nic->mac_addr[0], nic->mac_addr[1], nic->mac_addr[2],
 998                 nic->mac_addr[3], nic->mac_addr[4], nic->mac_addr[5]);
 999
1000         return 0;
1001
1002 malloc_fail:
1003         rte_free(eth_dev->data->mac_addrs);
1004 alarm_fail:
1005         nicvf_periodic_alarm_stop(nic);
1006 fail:
1007         return ret;
1008 }
1009
1010 static const struct rte_pci_id pci_id_nicvf_map[] = {
1011         {
1012                 .class_id = RTE_CLASS_ANY_ID,
1013                 .vendor_id = PCI_VENDOR_ID_CAVIUM,
1014                 .device_id = PCI_DEVICE_ID_THUNDERX_PASS1_NICVF,
1015                 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
1016                 .subsystem_device_id = PCI_SUB_DEVICE_ID_THUNDERX_PASS1_NICVF,
1017         },
1018         {
1019                 .class_id = RTE_CLASS_ANY_ID,
1020                 .vendor_id = PCI_VENDOR_ID_CAVIUM,
1021                 .device_id = PCI_DEVICE_ID_THUNDERX_PASS2_NICVF,
1022                 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
1023                 .subsystem_device_id = PCI_SUB_DEVICE_ID_THUNDERX_PASS2_NICVF,
1024         },
1025         {
1026                 .vendor_id = 0,
1027         },
1028 };
1029
1030 static struct eth_driver rte_nicvf_pmd = {
1031         .pci_drv = {
1032                 .name = "rte_nicvf_pmd",
1033                 .id_table = pci_id_nicvf_map,
1034                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1035         },
1036         .eth_dev_init = nicvf_eth_dev_init,
1037         .dev_private_size = sizeof(struct nicvf),
1038 };
1039
1040 static int
1041 rte_nicvf_pmd_init(const char *name __rte_unused, const char *para __rte_unused)
1042 {
1043         PMD_INIT_FUNC_TRACE();
1044         PMD_INIT_LOG(INFO, "librte_pmd_thunderx nicvf version %s",
1045                         THUNDERX_NICVF_PMD_VERSION);
1046
1047         rte_eth_driver_register(&rte_nicvf_pmd);
1048         return 0;
1049 }
1050
1051 static struct rte_driver rte_nicvf_driver = {
1052         .name = "nicvf_driver",
1053         .type = PMD_PDEV,
1054         .init = rte_nicvf_pmd_init,
1055 };
1056
1057 PMD_REGISTER_DRIVER(rte_nicvf_driver);