1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020 Beijing WangXun Technology Co., Ltd.
3 * Copyright(c) 2010-2017 Intel Corporation
9 #include "txgbe_type.h"
12 /* DCB credit calculation defines */
13 #define TXGBE_DCB_CREDIT_QUANTUM 64
14 #define TXGBE_DCB_MAX_CREDIT_REFILL 200 /* 200 * 64B = 12800B */
15 #define TXGBE_DCB_MAX_TSO_SIZE (32 * 1024) /* Max TSO pkt size in DCB*/
16 #define TXGBE_DCB_MAX_CREDIT (2 * TXGBE_DCB_MAX_CREDIT_REFILL)
18 /* 513 for 32KB TSO packet */
19 #define TXGBE_DCB_MIN_TSO_CREDIT \
20 ((TXGBE_DCB_MAX_TSO_SIZE / TXGBE_DCB_CREDIT_QUANTUM) + 1)
22 #define TXGBE_DCB_TX_CONFIG 0
23 #define TXGBE_DCB_RX_CONFIG 1
25 struct txgbe_dcb_support {
26 u32 capabilities; /* DCB capabilities */
28 /* Each bit represents a number of TCs configurable in the hw.
29 * If 8 traffic classes can be configured, the value is 0x80.
32 u8 pfc_traffic_classes;
36 txgbe_dcb_tsa_ets = 0,
37 txgbe_dcb_tsa_group_strict_cee,
41 /* Traffic class bandwidth allocation per direction */
42 struct txgbe_dcb_tc_path {
43 u8 bwg_id; /* Bandwidth Group (BWG) ID */
44 u8 bwg_percent; /* % of BWG's bandwidth */
45 u8 link_percent; /* % of link bandwidth */
46 u8 up_to_tc_bitmap; /* User Priority to Traffic Class mapping */
47 u16 data_credits_refill; /* Credit refill amount in 64B granularity */
48 u16 data_credits_max; /* Max credits for a configured packet buffer
51 enum txgbe_dcb_tsa tsa; /* Link or Group Strict Priority */
55 txgbe_dcb_pfc_disabled = 0,
56 txgbe_dcb_pfc_enabled,
57 txgbe_dcb_pfc_enabled_txonly,
58 txgbe_dcb_pfc_enabled_rxonly
61 /* Traffic class configuration */
62 struct txgbe_dcb_tc_config {
63 struct txgbe_dcb_tc_path path[2]; /* One each for Tx/Rx */
64 enum txgbe_dcb_pfc pfc; /* Class based flow control setting */
66 u16 desc_credits_max; /* For Tx Descriptor arbitration */
67 u8 tc; /* Traffic class (TC) */
71 /* PBA[0-7] each use 64KB FIFO */
72 txgbe_dcb_pba_equal = PBA_STRATEGY_EQUAL,
73 /* PBA[0-3] each use 80KB, PBA[4-7] each use 48KB */
74 txgbe_dcb_pba_80_48 = PBA_STRATEGY_WEIGHTED
77 struct txgbe_dcb_num_tcs {
82 struct txgbe_dcb_config {
83 struct txgbe_dcb_tc_config tc_config[TXGBE_DCB_TC_MAX];
84 struct txgbe_dcb_support support;
85 struct txgbe_dcb_num_tcs num_tcs;
86 u8 bw_percentage[TXGBE_DCB_BWG_MAX][2]; /* One each for Tx/Rx */
88 bool round_robin_enable;
90 enum txgbe_dcb_pba rx_pba_cfg;
92 u32 link_speed; /* For bandwidth allocation validation purpose */
96 int txgbe_dcb_pfc_enable(struct txgbe_hw *hw, u8 tc_num);
98 /* DCB credits calculation */
99 s32 txgbe_dcb_calculate_tc_credits_cee(struct txgbe_hw *hw,
100 struct txgbe_dcb_config *dcb_config,
101 u32 max_frame_size, u8 direction);
104 s32 txgbe_dcb_config_pfc(struct txgbe_hw *hw, u8 pfc_en, u8 *map);
106 /* DCB unpack routines */
107 void txgbe_dcb_unpack_pfc_cee(struct txgbe_dcb_config *cfg,
108 u8 *map, u8 *pfc_up);
109 void txgbe_dcb_unpack_refill_cee(struct txgbe_dcb_config *cfg, int direction,
111 void txgbe_dcb_unpack_max_cee(struct txgbe_dcb_config *cfg, u16 *max);
112 void txgbe_dcb_unpack_bwgid_cee(struct txgbe_dcb_config *cfg, int direction,
114 void txgbe_dcb_unpack_tsa_cee(struct txgbe_dcb_config *cfg, int direction,
116 void txgbe_dcb_unpack_map_cee(struct txgbe_dcb_config *cfg, int direction,
118 u8 txgbe_dcb_get_tc_from_up(struct txgbe_dcb_config *cfg, int direction, u8 up);
120 #include "txgbe_dcb_hw.h"
122 #endif /* _TXGBE_DCB_H_ */