1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020 Beijing WangXun Technology Co., Ltd.
3 * Copyright(c) 2010-2017 Intel Corporation
8 #include "txgbe_eeprom.h"
11 * txgbe_init_eeprom_params - Initialize EEPROM params
12 * @hw: pointer to hardware structure
14 * Initializes the EEPROM parameters txgbe_rom_info within the
15 * txgbe_hw struct in order to set up EEPROM access.
17 s32 txgbe_init_eeprom_params(struct txgbe_hw *hw)
19 struct txgbe_rom_info *eeprom = &hw->rom;
24 if (eeprom->type != txgbe_eeprom_unknown)
27 eeprom->type = txgbe_eeprom_none;
28 /* Set default semaphore delay to 10ms which is a well
31 eeprom->semaphore_delay = 10; /*ms*/
32 /* Clear EEPROM page size, it will be initialized as needed */
33 eeprom->word_page_size = 0;
36 * Check for EEPROM present first.
37 * If not present leave as none
39 eec = rd32(hw, TXGBE_SPISTAT);
40 if (!(eec & TXGBE_SPISTAT_BPFLASH)) {
41 eeprom->type = txgbe_eeprom_flash;
44 * SPI EEPROM is assumed here. This code would need to
45 * change if a future EEPROM is not SPI.
48 eeprom->word_size = eeprom_size >> 1;
51 eeprom->address_bits = 16;
53 err = eeprom->read32(hw, TXGBE_SW_REGION_PTR << 1, &eeprom->sw_addr);
55 DEBUGOUT("EEPROM read failed.");
59 DEBUGOUT("eeprom params: type = %d, size = %d, address bits: %d %d",
60 eeprom->type, eeprom->word_size,
61 eeprom->address_bits, eeprom->sw_addr);
67 * txgbe_get_eeprom_semaphore - Get hardware semaphore
68 * @hw: pointer to hardware structure
70 * Sets the hardware semaphores so EEPROM access can occur for bit-bang method
72 s32 txgbe_get_eeprom_semaphore(struct txgbe_hw *hw)
74 s32 status = TXGBE_ERR_EEPROM;
79 /* Get SMBI software semaphore between device drivers first */
80 for (i = 0; i < timeout; i++) {
82 * If the SMBI bit is 0 when we read it, then the bit will be
83 * set and we have the semaphore
85 swsm = rd32(hw, TXGBE_SWSEM);
86 if (!(swsm & TXGBE_SWSEM_PF)) {
94 DEBUGOUT("Driver can't access the eeprom - SMBI Semaphore not granted.");
96 * this release is particularly important because our attempts
97 * above to get the semaphore may have succeeded, and if there
98 * was a timeout, we should unconditionally clear the semaphore
99 * bits to free the driver to make progress
101 txgbe_release_eeprom_semaphore(hw);
106 * If the SMBI bit is 0 when we read it, then the bit will be
107 * set and we have the semaphore
109 swsm = rd32(hw, TXGBE_SWSEM);
110 if (!(swsm & TXGBE_SWSEM_PF))
114 /* Now get the semaphore between SW/FW through the SWESMBI bit */
116 for (i = 0; i < timeout; i++) {
117 /* Set the SW EEPROM semaphore bit to request access */
118 wr32m(hw, TXGBE_MNGSWSYNC,
119 TXGBE_MNGSWSYNC_REQ, TXGBE_MNGSWSYNC_REQ);
122 * If we set the bit successfully then we got the
125 swsm = rd32(hw, TXGBE_MNGSWSYNC);
126 if (swsm & TXGBE_MNGSWSYNC_REQ)
133 * Release semaphores and return error if SW EEPROM semaphore
134 * was not granted because we don't have access to the EEPROM
137 DEBUGOUT("SWESMBI Software EEPROM semaphore not granted.");
138 txgbe_release_eeprom_semaphore(hw);
139 status = TXGBE_ERR_EEPROM;
142 DEBUGOUT("Software semaphore SMBI between device drivers not granted.");
149 * txgbe_release_eeprom_semaphore - Release hardware semaphore
150 * @hw: pointer to hardware structure
152 * This function clears hardware semaphore bits.
154 void txgbe_release_eeprom_semaphore(struct txgbe_hw *hw)
156 wr32m(hw, TXGBE_MNGSWSYNC, TXGBE_MNGSWSYNC_REQ, 0);
157 wr32m(hw, TXGBE_SWSEM, TXGBE_SWSEM_PF, 0);
162 * txgbe_ee_read - Read EEPROM word using a host interface cmd
163 * @hw: pointer to hardware structure
164 * @offset: offset of word in the EEPROM to read
165 * @data: word read from the EEPROM
167 * Reads a 16 bit word from the EEPROM using the hostif.
169 s32 txgbe_ee_read16(struct txgbe_hw *hw, u32 offset,
172 const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH;
173 u32 addr = (offset << 1);
176 err = hw->mac.acquire_swfw_sync(hw, mask);
180 err = txgbe_hic_sr_read(hw, addr, (u8 *)data, 2);
182 hw->mac.release_swfw_sync(hw, mask);
188 * txgbe_ee_readw_buffer- Read EEPROM word(s) using hostif
189 * @hw: pointer to hardware structure
190 * @offset: offset of word in the EEPROM to read
191 * @words: number of words
192 * @data: word(s) read from the EEPROM
194 * Reads a 16 bit word(s) from the EEPROM using the hostif.
196 s32 txgbe_ee_readw_buffer(struct txgbe_hw *hw,
197 u32 offset, u32 words, void *data)
199 const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH;
200 u32 addr = (offset << 1);
201 u32 len = (words << 1);
202 u8 *buf = (u8 *)data;
205 err = hw->mac.acquire_swfw_sync(hw, mask);
210 u32 seg = (len <= TXGBE_PMMBX_DATA_SIZE
211 ? len : TXGBE_PMMBX_DATA_SIZE);
213 err = txgbe_hic_sr_read(hw, addr, buf, seg);
222 hw->mac.release_swfw_sync(hw, mask);
227 s32 txgbe_ee_readw_sw(struct txgbe_hw *hw, u32 offset,
230 const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH;
231 u32 addr = hw->rom.sw_addr + (offset << 1);
234 err = hw->mac.acquire_swfw_sync(hw, mask);
238 err = txgbe_hic_sr_read(hw, addr, (u8 *)data, 2);
240 hw->mac.release_swfw_sync(hw, mask);
246 * txgbe_ee_read32 - Read EEPROM word using a host interface cmd
247 * @hw: pointer to hardware structure
248 * @offset: offset of word in the EEPROM to read
249 * @data: word read from the EEPROM
251 * Reads a 32 bit word from the EEPROM using the hostif.
253 s32 txgbe_ee_read32(struct txgbe_hw *hw, u32 addr, u32 *data)
255 const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH;
258 err = hw->mac.acquire_swfw_sync(hw, mask);
262 err = txgbe_hic_sr_read(hw, addr, (u8 *)data, 4);
264 hw->mac.release_swfw_sync(hw, mask);
270 * txgbe_ee_write - Write EEPROM word using hostif
271 * @hw: pointer to hardware structure
272 * @offset: offset of word in the EEPROM to write
273 * @data: word write to the EEPROM
275 * Write a 16 bit word to the EEPROM using the hostif.
277 s32 txgbe_ee_write16(struct txgbe_hw *hw, u32 offset,
280 const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH;
281 u32 addr = (offset << 1);
284 err = hw->mac.acquire_swfw_sync(hw, mask);
288 err = txgbe_hic_sr_write(hw, addr, (u8 *)&data, 2);
290 hw->mac.release_swfw_sync(hw, mask);
296 * txgbe_ee_writew_buffer - Write EEPROM word(s) using hostif
297 * @hw: pointer to hardware structure
298 * @offset: offset of word in the EEPROM to write
299 * @words: number of words
300 * @data: word(s) write to the EEPROM
302 * Write a 16 bit word(s) to the EEPROM using the hostif.
304 s32 txgbe_ee_writew_buffer(struct txgbe_hw *hw,
305 u32 offset, u32 words, void *data)
307 const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH;
308 u32 addr = (offset << 1);
309 u32 len = (words << 1);
310 u8 *buf = (u8 *)data;
313 err = hw->mac.acquire_swfw_sync(hw, mask);
318 u32 seg = (len <= TXGBE_PMMBX_DATA_SIZE
319 ? len : TXGBE_PMMBX_DATA_SIZE);
321 err = txgbe_hic_sr_write(hw, addr, buf, seg);
329 hw->mac.release_swfw_sync(hw, mask);
333 s32 txgbe_ee_writew_sw(struct txgbe_hw *hw, u32 offset,
336 const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH;
337 u32 addr = hw->rom.sw_addr + (offset << 1);
340 err = hw->mac.acquire_swfw_sync(hw, mask);
344 err = txgbe_hic_sr_write(hw, addr, (u8 *)&data, 2);
346 hw->mac.release_swfw_sync(hw, mask);
352 * txgbe_ee_write32 - Read EEPROM word using a host interface cmd
353 * @hw: pointer to hardware structure
354 * @offset: offset of word in the EEPROM to read
355 * @data: word read from the EEPROM
357 * Reads a 32 bit word from the EEPROM using the hostif.
359 s32 txgbe_ee_write32(struct txgbe_hw *hw, u32 addr, u32 data)
361 const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH;
364 err = hw->mac.acquire_swfw_sync(hw, mask);
368 err = txgbe_hic_sr_write(hw, addr, (u8 *)&data, 4);
370 hw->mac.release_swfw_sync(hw, mask);
376 * txgbe_calc_eeprom_checksum - Calculates and returns the checksum
377 * @hw: pointer to hardware structure
379 * Returns a negative error code on error, or the 16-bit checksum
382 s32 txgbe_calc_eeprom_checksum(struct txgbe_hw *hw)
384 u16 checksum = 0, read_checksum = 0;
387 u16 buffer[BUFF_SIZE];
389 err = hw->rom.readw_sw(hw, TXGBE_EEPROM_CHECKSUM, &read_checksum);
391 DEBUGOUT("EEPROM read failed");
395 for (i = 0; i < TXGBE_EE_CSUM_MAX; i += seg) {
396 seg = (i + BUFF_SIZE < TXGBE_EE_CSUM_MAX
397 ? BUFF_SIZE : TXGBE_EE_CSUM_MAX - i);
398 err = hw->rom.readw_buffer(hw, i, seg, buffer);
401 for (j = 0; j < seg; j++)
402 checksum += buffer[j];
405 checksum = (u16)TXGBE_EEPROM_SUM - checksum + read_checksum;
407 return (s32)checksum;
411 * txgbe_validate_eeprom_checksum - Validate EEPROM checksum
412 * @hw: pointer to hardware structure
413 * @checksum_val: calculated checksum
415 * Performs checksum calculation and validates the EEPROM checksum. If the
416 * caller does not need checksum_val, the value can be NULL.
418 s32 txgbe_validate_eeprom_checksum(struct txgbe_hw *hw,
422 u16 read_checksum = 0;
425 /* Read the first word from the EEPROM. If this times out or fails, do
426 * not continue or we could be in for a very long wait while every
429 err = hw->rom.read16(hw, 0, &checksum);
431 DEBUGOUT("EEPROM read failed");
435 err = hw->rom.calc_checksum(hw);
439 checksum = (u16)(err & 0xffff);
441 err = hw->rom.readw_sw(hw, TXGBE_EEPROM_CHECKSUM, &read_checksum);
443 DEBUGOUT("EEPROM read failed");
447 /* Verify read checksum from EEPROM is the same as
448 * calculated checksum
450 if (read_checksum != checksum) {
451 err = TXGBE_ERR_EEPROM_CHECKSUM;
452 DEBUGOUT("EEPROM checksum error");
455 /* If the user cares, return the calculated checksum */
457 *checksum_val = checksum;
463 * txgbe_update_eeprom_checksum - Updates the EEPROM checksum
464 * @hw: pointer to hardware structure
466 s32 txgbe_update_eeprom_checksum(struct txgbe_hw *hw)
471 /* Read the first word from the EEPROM. If this times out or fails, do
472 * not continue or we could be in for a very long wait while every
475 status = hw->rom.read16(hw, 0, &checksum);
477 DEBUGOUT("EEPROM read failed");
481 status = hw->rom.calc_checksum(hw);
485 checksum = (u16)(status & 0xffff);
487 status = hw->rom.writew_sw(hw, TXGBE_EEPROM_CHECKSUM, checksum);