1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020
8 #define TXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */
9 #define TXGBE_AUTO_NEG_TIME 45 /* 4.5 Seconds */
11 #define TXGBE_ALIGN 128 /* as intel did */
13 #include "txgbe_status.h"
14 #include "txgbe_osdep.h"
15 #include "txgbe_devids.h"
17 /* Physical layer type */
18 #define TXGBE_PHYSICAL_LAYER_UNKNOWN 0
19 #define TXGBE_PHYSICAL_LAYER_10GBASE_T 0x00001
20 #define TXGBE_PHYSICAL_LAYER_1000BASE_T 0x00002
21 #define TXGBE_PHYSICAL_LAYER_100BASE_TX 0x00004
22 #define TXGBE_PHYSICAL_LAYER_SFP_PLUS_CU 0x00008
23 #define TXGBE_PHYSICAL_LAYER_10GBASE_LR 0x00010
24 #define TXGBE_PHYSICAL_LAYER_10GBASE_LRM 0x00020
25 #define TXGBE_PHYSICAL_LAYER_10GBASE_SR 0x00040
26 #define TXGBE_PHYSICAL_LAYER_10GBASE_KX4 0x00080
27 #define TXGBE_PHYSICAL_LAYER_10GBASE_CX4 0x00100
28 #define TXGBE_PHYSICAL_LAYER_1000BASE_KX 0x00200
29 #define TXGBE_PHYSICAL_LAYER_1000BASE_BX 0x00400
30 #define TXGBE_PHYSICAL_LAYER_10GBASE_KR 0x00800
31 #define TXGBE_PHYSICAL_LAYER_10GBASE_XAUI 0x01000
32 #define TXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA 0x02000
33 #define TXGBE_PHYSICAL_LAYER_1000BASE_SX 0x04000
34 #define TXGBE_PHYSICAL_LAYER_10BASE_T 0x08000
35 #define TXGBE_PHYSICAL_LAYER_2500BASE_KX 0x10000
37 enum txgbe_eeprom_type {
38 txgbe_eeprom_unknown = 0,
41 txgbe_eeprom_none /* No NVM support */
45 txgbe_mac_unknown = 0,
52 txgbe_phy_unknown = 0,
62 txgbe_phy_sfp_tyco_passive,
63 txgbe_phy_sfp_unknown_passive,
64 txgbe_phy_sfp_unknown_active,
67 txgbe_phy_sfp_ftl_active,
68 txgbe_phy_sfp_unknown,
70 txgbe_phy_qsfp_unknown_passive,
71 txgbe_phy_qsfp_unknown_active,
73 txgbe_phy_qsfp_unknown,
74 txgbe_phy_sfp_unsupported, /* Enforce bit set with unsupported module */
81 * SFP+ module type IDs:
88 * 3 SFP_DA_CU_CORE0 - chip-specific
89 * 4 SFP_DA_CU_CORE1 - chip-specific
90 * 5 SFP_SR/LR_CORE0 - chip-specific
91 * 6 SFP_SR/LR_CORE1 - chip-specific
94 txgbe_sfp_type_unknown = 0,
98 txgbe_sfp_type_da_cu_core0,
99 txgbe_sfp_type_da_cu_core1,
100 txgbe_sfp_type_srlr_core0,
101 txgbe_sfp_type_srlr_core1,
102 txgbe_sfp_type_da_act_lmt_core0,
103 txgbe_sfp_type_da_act_lmt_core1,
104 txgbe_sfp_type_1g_cu_core0,
105 txgbe_sfp_type_1g_cu_core1,
106 txgbe_sfp_type_1g_sx_core0,
107 txgbe_sfp_type_1g_sx_core1,
108 txgbe_sfp_type_1g_lx_core0,
109 txgbe_sfp_type_1g_lx_core1,
110 txgbe_sfp_type_not_present = 0xFFFE,
111 txgbe_sfp_type_not_known = 0xFFFF
114 enum txgbe_media_type {
115 txgbe_media_type_unknown = 0,
116 txgbe_media_type_fiber,
117 txgbe_media_type_fiber_qsfp,
118 txgbe_media_type_copper,
119 txgbe_media_type_backplane,
120 txgbe_media_type_cx4,
121 txgbe_media_type_virtual
125 /* Smart Speed Settings */
126 #define TXGBE_SMARTSPEED_MAX_RETRIES 3
127 enum txgbe_smart_speed {
128 txgbe_smart_speed_auto = 0,
129 txgbe_smart_speed_on,
130 txgbe_smart_speed_off
134 enum txgbe_bus_type {
135 txgbe_bus_type_unknown = 0,
138 txgbe_bus_type_pci_express,
139 txgbe_bus_type_internal,
140 txgbe_bus_type_reserved
144 enum txgbe_bus_speed {
145 txgbe_bus_speed_unknown = 0,
146 txgbe_bus_speed_33 = 33,
147 txgbe_bus_speed_66 = 66,
148 txgbe_bus_speed_100 = 100,
149 txgbe_bus_speed_120 = 120,
150 txgbe_bus_speed_133 = 133,
151 txgbe_bus_speed_2500 = 2500,
152 txgbe_bus_speed_5000 = 5000,
153 txgbe_bus_speed_8000 = 8000,
154 txgbe_bus_speed_reserved
158 enum txgbe_bus_width {
159 txgbe_bus_width_unknown = 0,
160 txgbe_bus_width_pcie_x1 = 1,
161 txgbe_bus_width_pcie_x2 = 2,
162 txgbe_bus_width_pcie_x4 = 4,
163 txgbe_bus_width_pcie_x8 = 8,
164 txgbe_bus_width_32 = 32,
165 txgbe_bus_width_64 = 64,
166 txgbe_bus_width_reserved
172 struct txgbe_bus_info {
173 s32 (*get_bus_info)(struct txgbe_hw *hw);
174 void (*set_lan_id)(struct txgbe_hw *hw);
176 enum txgbe_bus_speed speed;
177 enum txgbe_bus_width width;
178 enum txgbe_bus_type type;
185 /* iterator type for walking multicast address lists */
186 typedef u8* (*txgbe_mc_addr_itr) (struct txgbe_hw *hw, u8 **mc_addr_ptr,
189 struct txgbe_link_info {
190 s32 (*read_link)(struct txgbe_hw *hw, u8 addr, u16 reg, u16 *val);
191 s32 (*read_link_unlocked)(struct txgbe_hw *hw, u8 addr, u16 reg,
193 s32 (*write_link)(struct txgbe_hw *hw, u8 addr, u16 reg, u16 val);
194 s32 (*write_link_unlocked)(struct txgbe_hw *hw, u8 addr, u16 reg,
200 struct txgbe_rom_info {
201 s32 (*init_params)(struct txgbe_hw *hw);
202 s32 (*read16)(struct txgbe_hw *hw, u32 offset, u16 *data);
203 s32 (*readw_sw)(struct txgbe_hw *hw, u32 offset, u16 *data);
204 s32 (*readw_buffer)(struct txgbe_hw *hw, u32 offset, u32 words,
206 s32 (*read32)(struct txgbe_hw *hw, u32 addr, u32 *data);
207 s32 (*read_buffer)(struct txgbe_hw *hw, u32 addr, u32 len, void *data);
208 s32 (*write16)(struct txgbe_hw *hw, u32 offset, u16 data);
209 s32 (*writew_sw)(struct txgbe_hw *hw, u32 offset, u16 data);
210 s32 (*writew_buffer)(struct txgbe_hw *hw, u32 offset, u32 words,
212 s32 (*write32)(struct txgbe_hw *hw, u32 addr, u32 data);
213 s32 (*write_buffer)(struct txgbe_hw *hw, u32 addr, u32 len, void *data);
214 s32 (*validate_checksum)(struct txgbe_hw *hw, u16 *checksum_val);
215 s32 (*update_checksum)(struct txgbe_hw *hw);
216 s32 (*calc_checksum)(struct txgbe_hw *hw);
218 enum txgbe_eeprom_type type;
228 struct txgbe_flash_info {
234 #define TXGBE_FLAGS_DOUBLE_RESET_REQUIRED 0x01
235 struct txgbe_mac_info {
236 s32 (*init_hw)(struct txgbe_hw *hw);
237 s32 (*reset_hw)(struct txgbe_hw *hw);
238 s32 (*start_hw)(struct txgbe_hw *hw);
239 s32 (*stop_hw)(struct txgbe_hw *hw);
240 s32 (*clear_hw_cntrs)(struct txgbe_hw *hw);
241 s32 (*get_mac_addr)(struct txgbe_hw *hw, u8 *mac_addr);
242 s32 (*get_san_mac_addr)(struct txgbe_hw *hw, u8 *san_mac_addr);
243 s32 (*set_san_mac_addr)(struct txgbe_hw *hw, u8 *san_mac_addr);
244 s32 (*get_device_caps)(struct txgbe_hw *hw, u16 *device_caps);
245 s32 (*get_wwn_prefix)(struct txgbe_hw *hw, u16 *wwnn_prefix,
247 s32 (*setup_sfp)(struct txgbe_hw *hw);
248 s32 (*enable_rx_dma)(struct txgbe_hw *hw, u32 regval);
249 s32 (*disable_sec_rx_path)(struct txgbe_hw *hw);
250 s32 (*enable_sec_rx_path)(struct txgbe_hw *hw);
251 s32 (*disable_sec_tx_path)(struct txgbe_hw *hw);
252 s32 (*enable_sec_tx_path)(struct txgbe_hw *hw);
253 s32 (*acquire_swfw_sync)(struct txgbe_hw *hw, u32 mask);
254 void (*release_swfw_sync)(struct txgbe_hw *hw, u32 mask);
255 u64 (*autoc_read)(struct txgbe_hw *hw);
256 void (*autoc_write)(struct txgbe_hw *hw, u64 value);
257 s32 (*prot_autoc_read)(struct txgbe_hw *hw, bool *locked, u64 *value);
258 s32 (*prot_autoc_write)(struct txgbe_hw *hw, bool locked, u64 value);
259 s32 (*negotiate_api_version)(struct txgbe_hw *hw, int api);
262 void (*disable_tx_laser)(struct txgbe_hw *hw);
263 void (*enable_tx_laser)(struct txgbe_hw *hw);
264 void (*flap_tx_laser)(struct txgbe_hw *hw);
265 s32 (*setup_link)(struct txgbe_hw *hw, u32 speed,
266 bool autoneg_wait_to_complete);
267 s32 (*setup_mac_link)(struct txgbe_hw *hw, u32 speed,
268 bool autoneg_wait_to_complete);
269 s32 (*check_link)(struct txgbe_hw *hw, u32 *speed,
270 bool *link_up, bool link_up_wait_to_complete);
271 s32 (*get_link_capabilities)(struct txgbe_hw *hw,
272 u32 *speed, bool *autoneg);
273 void (*set_rate_select_speed)(struct txgbe_hw *hw, u32 speed);
275 /* Packet Buffer manipulation */
276 void (*setup_pba)(struct txgbe_hw *hw, int num_pb, u32 headroom,
280 s32 (*led_on)(struct txgbe_hw *hw, u32 index);
281 s32 (*led_off)(struct txgbe_hw *hw, u32 index);
283 /* RAR, Multicast, VLAN */
284 s32 (*set_rar)(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
286 s32 (*set_uc_addr)(struct txgbe_hw *hw, u32 index, u8 *addr);
287 s32 (*clear_rar)(struct txgbe_hw *hw, u32 index);
288 s32 (*set_vmdq)(struct txgbe_hw *hw, u32 rar, u32 vmdq);
289 s32 (*clear_vmdq)(struct txgbe_hw *hw, u32 rar, u32 vmdq);
290 s32 (*init_rx_addrs)(struct txgbe_hw *hw);
291 s32 (*update_mc_addr_list)(struct txgbe_hw *hw, u8 *mc_addr_list,
293 txgbe_mc_addr_itr func, bool clear);
294 s32 (*clear_vfta)(struct txgbe_hw *hw);
295 s32 (*set_vfta)(struct txgbe_hw *hw, u32 vlan,
296 u32 vind, bool vlan_on, bool vlvf_bypass);
297 s32 (*set_vlvf)(struct txgbe_hw *hw, u32 vlan, u32 vind,
298 bool vlan_on, u32 *vfta_delta, u32 vfta,
300 s32 (*init_uta_tables)(struct txgbe_hw *hw);
301 void (*set_mac_anti_spoofing)(struct txgbe_hw *hw, bool enable, int vf);
302 void (*set_vlan_anti_spoofing)(struct txgbe_hw *hw,
303 bool enable, int vf);
304 s32 (*update_xcast_mode)(struct txgbe_hw *hw, int xcast_mode);
305 s32 (*set_rlpml)(struct txgbe_hw *hw, u16 max_size);
308 s32 (*fc_enable)(struct txgbe_hw *hw);
309 s32 (*setup_fc)(struct txgbe_hw *hw);
310 void (*fc_autoneg)(struct txgbe_hw *hw);
312 /* Manageability interface */
313 s32 (*set_fw_drv_ver)(struct txgbe_hw *hw, u8 maj, u8 min, u8 build,
314 u8 ver, u16 len, char *driver_ver);
315 s32 (*get_thermal_sensor_data)(struct txgbe_hw *hw);
316 s32 (*init_thermal_sensor_thresh)(struct txgbe_hw *hw);
317 void (*get_rtrup2tc)(struct txgbe_hw *hw, u8 *map);
318 void (*disable_rx)(struct txgbe_hw *hw);
319 void (*enable_rx)(struct txgbe_hw *hw);
320 void (*set_ethertype_anti_spoofing)(struct txgbe_hw *hw,
321 bool enable, int vf);
322 s32 (*dmac_update_tcs)(struct txgbe_hw *hw);
323 s32 (*dmac_config_tcs)(struct txgbe_hw *hw);
324 s32 (*dmac_config)(struct txgbe_hw *hw);
325 s32 (*setup_eee)(struct txgbe_hw *hw, bool enable_eee);
327 enum txgbe_mac_type type;
328 u8 perm_addr[ETH_ADDR_LEN];
329 u8 san_addr[ETH_ADDR_LEN];
330 /* prefix for World Wide Node Name (WWNN) */
332 /* prefix for World Wide Port Name (WWPN) */
339 u8 san_mac_rar_index;
340 bool get_link_status;
341 u64 orig_autoc; /* cached value of AUTOC */
342 bool orig_link_settings_stored;
343 bool autotry_restart;
345 u32 max_link_up_time;
348 struct txgbe_phy_info {
349 u32 (*get_media_type)(struct txgbe_hw *hw);
350 s32 (*identify)(struct txgbe_hw *hw);
351 s32 (*identify_sfp)(struct txgbe_hw *hw);
352 s32 (*init)(struct txgbe_hw *hw);
353 s32 (*reset)(struct txgbe_hw *hw);
354 s32 (*read_reg)(struct txgbe_hw *hw, u32 reg_addr,
355 u32 device_type, u16 *phy_data);
356 s32 (*write_reg)(struct txgbe_hw *hw, u32 reg_addr,
357 u32 device_type, u16 phy_data);
358 s32 (*read_reg_mdi)(struct txgbe_hw *hw, u32 reg_addr,
359 u32 device_type, u16 *phy_data);
360 s32 (*write_reg_mdi)(struct txgbe_hw *hw, u32 reg_addr,
361 u32 device_type, u16 phy_data);
362 s32 (*setup_link)(struct txgbe_hw *hw);
363 s32 (*setup_internal_link)(struct txgbe_hw *hw);
364 s32 (*setup_link_speed)(struct txgbe_hw *hw, u32 speed,
365 bool autoneg_wait_to_complete);
366 s32 (*check_link)(struct txgbe_hw *hw, u32 *speed, bool *link_up);
367 s32 (*read_i2c_byte)(struct txgbe_hw *hw, u8 byte_offset,
368 u8 dev_addr, u8 *data);
369 s32 (*write_i2c_byte)(struct txgbe_hw *hw, u8 byte_offset,
370 u8 dev_addr, u8 data);
371 s32 (*read_i2c_sff8472)(struct txgbe_hw *hw, u8 byte_offset,
373 s32 (*read_i2c_eeprom)(struct txgbe_hw *hw, u8 byte_offset,
375 s32 (*write_i2c_eeprom)(struct txgbe_hw *hw, u8 byte_offset,
377 s32 (*check_overtemp)(struct txgbe_hw *hw);
378 s32 (*set_phy_power)(struct txgbe_hw *hw, bool on);
379 s32 (*handle_lasi)(struct txgbe_hw *hw);
380 s32 (*read_i2c_byte_unlocked)(struct txgbe_hw *hw, u8 offset, u8 addr,
382 s32 (*write_i2c_byte_unlocked)(struct txgbe_hw *hw, u8 offset, u8 addr,
385 enum txgbe_phy_type type;
388 enum txgbe_sfp_type sfp_type;
389 bool sfp_setup_needed;
392 u32 phy_semaphore_mask;
394 u32 autoneg_advertised;
395 u32 speeds_supported;
396 enum txgbe_smart_speed smart_speed;
397 bool smart_speed_active;
398 bool multispeed_fiber;
399 bool qsfp_shared_i2c_bus;
404 struct txgbe_mbx_info {
405 void (*init_params)(struct txgbe_hw *hw);
406 s32 (*read)(struct txgbe_hw *hw, u32 *msg, u16 size, u16 vf_number);
407 s32 (*write)(struct txgbe_hw *hw, u32 *msg, u16 size, u16 vf_number);
408 s32 (*read_posted)(struct txgbe_hw *hw, u32 *msg, u16 size,
410 s32 (*write_posted)(struct txgbe_hw *hw, u32 *msg, u16 size,
412 s32 (*check_for_msg)(struct txgbe_hw *hw, u16 mbx_id);
413 s32 (*check_for_ack)(struct txgbe_hw *hw, u16 mbx_id);
414 s32 (*check_for_rst)(struct txgbe_hw *hw, u16 mbx_id);
428 struct txgbe_mac_info mac;
429 struct txgbe_phy_info phy;
430 struct txgbe_link_info link;
431 struct txgbe_rom_info rom;
432 struct txgbe_flash_info flash;
433 struct txgbe_bus_info bus;
434 struct txgbe_mbx_info mbx;
437 u16 subsystem_device_id;
438 u16 subsystem_vendor_id;
440 bool allow_unsupported_sfp;
441 bool need_crosstalk_fix;
445 enum txgbe_link_status {
446 TXGBE_LINK_STATUS_NONE = 0,
447 TXGBE_LINK_STATUS_KX,
448 TXGBE_LINK_STATUS_KX4
450 enum txgbe_reset_type {
457 #include "txgbe_regs.h"
458 #include "txgbe_dummy.h"
460 #endif /* _TXGBE_TYPE_H_ */