1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020
8 #define TXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */
9 #define TXGBE_AUTO_NEG_TIME 45 /* 4.5 Seconds */
11 #define TXGBE_FRAME_SIZE_MAX (9728) /* Maximum frame size, +FCS */
12 #define TXGBE_FRAME_SIZE_DFT (1518) /* Default frame size, +FCS */
13 #define TXGBE_MAX_UTA 128
15 #define TXGBE_ALIGN 128 /* as intel did */
17 #include "txgbe_status.h"
18 #include "txgbe_osdep.h"
19 #include "txgbe_devids.h"
21 /* Physical layer type */
22 #define TXGBE_PHYSICAL_LAYER_UNKNOWN 0
23 #define TXGBE_PHYSICAL_LAYER_10GBASE_T 0x00001
24 #define TXGBE_PHYSICAL_LAYER_1000BASE_T 0x00002
25 #define TXGBE_PHYSICAL_LAYER_100BASE_TX 0x00004
26 #define TXGBE_PHYSICAL_LAYER_SFP_PLUS_CU 0x00008
27 #define TXGBE_PHYSICAL_LAYER_10GBASE_LR 0x00010
28 #define TXGBE_PHYSICAL_LAYER_10GBASE_LRM 0x00020
29 #define TXGBE_PHYSICAL_LAYER_10GBASE_SR 0x00040
30 #define TXGBE_PHYSICAL_LAYER_10GBASE_KX4 0x00080
31 #define TXGBE_PHYSICAL_LAYER_10GBASE_CX4 0x00100
32 #define TXGBE_PHYSICAL_LAYER_1000BASE_KX 0x00200
33 #define TXGBE_PHYSICAL_LAYER_1000BASE_BX 0x00400
34 #define TXGBE_PHYSICAL_LAYER_10GBASE_KR 0x00800
35 #define TXGBE_PHYSICAL_LAYER_10GBASE_XAUI 0x01000
36 #define TXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA 0x02000
37 #define TXGBE_PHYSICAL_LAYER_1000BASE_SX 0x04000
38 #define TXGBE_PHYSICAL_LAYER_10BASE_T 0x08000
39 #define TXGBE_PHYSICAL_LAYER_2500BASE_KX 0x10000
41 #define TXGBE_ATR_HASH_MASK 0x7fff
43 enum txgbe_eeprom_type {
44 txgbe_eeprom_unknown = 0,
47 txgbe_eeprom_none /* No NVM support */
51 txgbe_mac_unknown = 0,
58 txgbe_phy_unknown = 0,
68 txgbe_phy_sfp_tyco_passive,
69 txgbe_phy_sfp_unknown_passive,
70 txgbe_phy_sfp_unknown_active,
73 txgbe_phy_sfp_ftl_active,
74 txgbe_phy_sfp_unknown,
76 txgbe_phy_qsfp_unknown_passive,
77 txgbe_phy_qsfp_unknown_active,
79 txgbe_phy_qsfp_unknown,
80 txgbe_phy_sfp_unsupported, /* Enforce bit set with unsupported module */
87 * SFP+ module type IDs:
94 * 3 SFP_DA_CU_CORE0 - chip-specific
95 * 4 SFP_DA_CU_CORE1 - chip-specific
96 * 5 SFP_SR/LR_CORE0 - chip-specific
97 * 6 SFP_SR/LR_CORE1 - chip-specific
100 txgbe_sfp_type_unknown = 0,
101 txgbe_sfp_type_da_cu,
104 txgbe_sfp_type_da_cu_core0,
105 txgbe_sfp_type_da_cu_core1,
106 txgbe_sfp_type_srlr_core0,
107 txgbe_sfp_type_srlr_core1,
108 txgbe_sfp_type_da_act_lmt_core0,
109 txgbe_sfp_type_da_act_lmt_core1,
110 txgbe_sfp_type_1g_cu_core0,
111 txgbe_sfp_type_1g_cu_core1,
112 txgbe_sfp_type_1g_sx_core0,
113 txgbe_sfp_type_1g_sx_core1,
114 txgbe_sfp_type_1g_lx_core0,
115 txgbe_sfp_type_1g_lx_core1,
116 txgbe_sfp_type_not_present = 0xFFFE,
117 txgbe_sfp_type_not_known = 0xFFFF
120 enum txgbe_media_type {
121 txgbe_media_type_unknown = 0,
122 txgbe_media_type_fiber,
123 txgbe_media_type_fiber_qsfp,
124 txgbe_media_type_copper,
125 txgbe_media_type_backplane,
126 txgbe_media_type_cx4,
127 txgbe_media_type_virtual
131 /* Smart Speed Settings */
132 #define TXGBE_SMARTSPEED_MAX_RETRIES 3
133 enum txgbe_smart_speed {
134 txgbe_smart_speed_auto = 0,
135 txgbe_smart_speed_on,
136 txgbe_smart_speed_off
140 enum txgbe_bus_type {
141 txgbe_bus_type_unknown = 0,
144 txgbe_bus_type_pci_express,
145 txgbe_bus_type_internal,
146 txgbe_bus_type_reserved
150 enum txgbe_bus_speed {
151 txgbe_bus_speed_unknown = 0,
152 txgbe_bus_speed_33 = 33,
153 txgbe_bus_speed_66 = 66,
154 txgbe_bus_speed_100 = 100,
155 txgbe_bus_speed_120 = 120,
156 txgbe_bus_speed_133 = 133,
157 txgbe_bus_speed_2500 = 2500,
158 txgbe_bus_speed_5000 = 5000,
159 txgbe_bus_speed_8000 = 8000,
160 txgbe_bus_speed_reserved
164 enum txgbe_bus_width {
165 txgbe_bus_width_unknown = 0,
166 txgbe_bus_width_pcie_x1 = 1,
167 txgbe_bus_width_pcie_x2 = 2,
168 txgbe_bus_width_pcie_x4 = 4,
169 txgbe_bus_width_pcie_x8 = 8,
170 txgbe_bus_width_32 = 32,
171 txgbe_bus_width_64 = 64,
172 txgbe_bus_width_reserved
177 struct txgbe_addr_filter_info {
181 u32 overflow_promisc;
182 bool user_set_promisc;
186 struct txgbe_bus_info {
187 s32 (*get_bus_info)(struct txgbe_hw *hw);
188 void (*set_lan_id)(struct txgbe_hw *hw);
190 enum txgbe_bus_speed speed;
191 enum txgbe_bus_width width;
192 enum txgbe_bus_type type;
199 /* iterator type for walking multicast address lists */
200 typedef u8* (*txgbe_mc_addr_itr) (struct txgbe_hw *hw, u8 **mc_addr_ptr,
203 struct txgbe_link_info {
204 s32 (*read_link)(struct txgbe_hw *hw, u8 addr, u16 reg, u16 *val);
205 s32 (*read_link_unlocked)(struct txgbe_hw *hw, u8 addr, u16 reg,
207 s32 (*write_link)(struct txgbe_hw *hw, u8 addr, u16 reg, u16 val);
208 s32 (*write_link_unlocked)(struct txgbe_hw *hw, u8 addr, u16 reg,
214 struct txgbe_rom_info {
215 s32 (*init_params)(struct txgbe_hw *hw);
216 s32 (*read16)(struct txgbe_hw *hw, u32 offset, u16 *data);
217 s32 (*readw_sw)(struct txgbe_hw *hw, u32 offset, u16 *data);
218 s32 (*readw_buffer)(struct txgbe_hw *hw, u32 offset, u32 words,
220 s32 (*read32)(struct txgbe_hw *hw, u32 addr, u32 *data);
221 s32 (*read_buffer)(struct txgbe_hw *hw, u32 addr, u32 len, void *data);
222 s32 (*write16)(struct txgbe_hw *hw, u32 offset, u16 data);
223 s32 (*writew_sw)(struct txgbe_hw *hw, u32 offset, u16 data);
224 s32 (*writew_buffer)(struct txgbe_hw *hw, u32 offset, u32 words,
226 s32 (*write32)(struct txgbe_hw *hw, u32 addr, u32 data);
227 s32 (*write_buffer)(struct txgbe_hw *hw, u32 addr, u32 len, void *data);
228 s32 (*validate_checksum)(struct txgbe_hw *hw, u16 *checksum_val);
229 s32 (*update_checksum)(struct txgbe_hw *hw);
230 s32 (*calc_checksum)(struct txgbe_hw *hw);
232 enum txgbe_eeprom_type type;
242 struct txgbe_flash_info {
248 #define TXGBE_FLAGS_DOUBLE_RESET_REQUIRED 0x01
249 struct txgbe_mac_info {
250 s32 (*init_hw)(struct txgbe_hw *hw);
251 s32 (*reset_hw)(struct txgbe_hw *hw);
252 s32 (*start_hw)(struct txgbe_hw *hw);
253 s32 (*stop_hw)(struct txgbe_hw *hw);
254 s32 (*clear_hw_cntrs)(struct txgbe_hw *hw);
255 s32 (*get_mac_addr)(struct txgbe_hw *hw, u8 *mac_addr);
256 s32 (*get_san_mac_addr)(struct txgbe_hw *hw, u8 *san_mac_addr);
257 s32 (*set_san_mac_addr)(struct txgbe_hw *hw, u8 *san_mac_addr);
258 s32 (*get_device_caps)(struct txgbe_hw *hw, u16 *device_caps);
259 s32 (*get_wwn_prefix)(struct txgbe_hw *hw, u16 *wwnn_prefix,
261 s32 (*setup_sfp)(struct txgbe_hw *hw);
262 s32 (*enable_rx_dma)(struct txgbe_hw *hw, u32 regval);
263 s32 (*disable_sec_rx_path)(struct txgbe_hw *hw);
264 s32 (*enable_sec_rx_path)(struct txgbe_hw *hw);
265 s32 (*disable_sec_tx_path)(struct txgbe_hw *hw);
266 s32 (*enable_sec_tx_path)(struct txgbe_hw *hw);
267 s32 (*acquire_swfw_sync)(struct txgbe_hw *hw, u32 mask);
268 void (*release_swfw_sync)(struct txgbe_hw *hw, u32 mask);
269 u64 (*autoc_read)(struct txgbe_hw *hw);
270 void (*autoc_write)(struct txgbe_hw *hw, u64 value);
271 s32 (*prot_autoc_read)(struct txgbe_hw *hw, bool *locked, u64 *value);
272 s32 (*prot_autoc_write)(struct txgbe_hw *hw, bool locked, u64 value);
273 s32 (*negotiate_api_version)(struct txgbe_hw *hw, int api);
276 void (*disable_tx_laser)(struct txgbe_hw *hw);
277 void (*enable_tx_laser)(struct txgbe_hw *hw);
278 void (*flap_tx_laser)(struct txgbe_hw *hw);
279 s32 (*setup_link)(struct txgbe_hw *hw, u32 speed,
280 bool autoneg_wait_to_complete);
281 s32 (*setup_mac_link)(struct txgbe_hw *hw, u32 speed,
282 bool autoneg_wait_to_complete);
283 s32 (*check_link)(struct txgbe_hw *hw, u32 *speed,
284 bool *link_up, bool link_up_wait_to_complete);
285 s32 (*get_link_capabilities)(struct txgbe_hw *hw,
286 u32 *speed, bool *autoneg);
287 void (*set_rate_select_speed)(struct txgbe_hw *hw, u32 speed);
289 /* Packet Buffer manipulation */
290 void (*setup_pba)(struct txgbe_hw *hw, int num_pb, u32 headroom,
294 s32 (*led_on)(struct txgbe_hw *hw, u32 index);
295 s32 (*led_off)(struct txgbe_hw *hw, u32 index);
297 /* RAR, Multicast, VLAN */
298 s32 (*set_rar)(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
300 s32 (*set_uc_addr)(struct txgbe_hw *hw, u32 index, u8 *addr);
301 s32 (*clear_rar)(struct txgbe_hw *hw, u32 index);
302 s32 (*set_vmdq)(struct txgbe_hw *hw, u32 rar, u32 vmdq);
303 s32 (*clear_vmdq)(struct txgbe_hw *hw, u32 rar, u32 vmdq);
304 s32 (*init_rx_addrs)(struct txgbe_hw *hw);
305 s32 (*update_mc_addr_list)(struct txgbe_hw *hw, u8 *mc_addr_list,
307 txgbe_mc_addr_itr func, bool clear);
308 s32 (*clear_vfta)(struct txgbe_hw *hw);
309 s32 (*set_vfta)(struct txgbe_hw *hw, u32 vlan,
310 u32 vind, bool vlan_on, bool vlvf_bypass);
311 s32 (*set_vlvf)(struct txgbe_hw *hw, u32 vlan, u32 vind,
312 bool vlan_on, u32 *vfta_delta, u32 vfta,
314 s32 (*init_uta_tables)(struct txgbe_hw *hw);
315 void (*set_mac_anti_spoofing)(struct txgbe_hw *hw, bool enable, int vf);
316 void (*set_vlan_anti_spoofing)(struct txgbe_hw *hw,
317 bool enable, int vf);
318 s32 (*update_xcast_mode)(struct txgbe_hw *hw, int xcast_mode);
319 s32 (*set_rlpml)(struct txgbe_hw *hw, u16 max_size);
322 s32 (*fc_enable)(struct txgbe_hw *hw);
323 s32 (*setup_fc)(struct txgbe_hw *hw);
324 void (*fc_autoneg)(struct txgbe_hw *hw);
326 /* Manageability interface */
327 s32 (*set_fw_drv_ver)(struct txgbe_hw *hw, u8 maj, u8 min, u8 build,
328 u8 ver, u16 len, char *driver_ver);
329 s32 (*get_thermal_sensor_data)(struct txgbe_hw *hw);
330 s32 (*init_thermal_sensor_thresh)(struct txgbe_hw *hw);
331 void (*get_rtrup2tc)(struct txgbe_hw *hw, u8 *map);
332 void (*disable_rx)(struct txgbe_hw *hw);
333 void (*enable_rx)(struct txgbe_hw *hw);
334 void (*set_ethertype_anti_spoofing)(struct txgbe_hw *hw,
335 bool enable, int vf);
336 s32 (*dmac_update_tcs)(struct txgbe_hw *hw);
337 s32 (*dmac_config_tcs)(struct txgbe_hw *hw);
338 s32 (*dmac_config)(struct txgbe_hw *hw);
339 s32 (*setup_eee)(struct txgbe_hw *hw, bool enable_eee);
341 enum txgbe_mac_type type;
342 u8 addr[ETH_ADDR_LEN];
343 u8 perm_addr[ETH_ADDR_LEN];
344 u8 san_addr[ETH_ADDR_LEN];
345 /* prefix for World Wide Node Name (WWNN) */
347 /* prefix for World Wide Port Name (WWPN) */
349 #define TXGBE_MAX_MTA 128
350 u32 mta_shadow[TXGBE_MAX_MTA];
357 u8 san_mac_rar_index;
358 bool get_link_status;
359 u64 orig_autoc; /* cached value of AUTOC */
360 bool orig_link_settings_stored;
361 bool autotry_restart;
364 u32 max_link_up_time;
367 struct txgbe_phy_info {
368 u32 (*get_media_type)(struct txgbe_hw *hw);
369 s32 (*identify)(struct txgbe_hw *hw);
370 s32 (*identify_sfp)(struct txgbe_hw *hw);
371 s32 (*init)(struct txgbe_hw *hw);
372 s32 (*reset)(struct txgbe_hw *hw);
373 s32 (*read_reg)(struct txgbe_hw *hw, u32 reg_addr,
374 u32 device_type, u16 *phy_data);
375 s32 (*write_reg)(struct txgbe_hw *hw, u32 reg_addr,
376 u32 device_type, u16 phy_data);
377 s32 (*read_reg_mdi)(struct txgbe_hw *hw, u32 reg_addr,
378 u32 device_type, u16 *phy_data);
379 s32 (*write_reg_mdi)(struct txgbe_hw *hw, u32 reg_addr,
380 u32 device_type, u16 phy_data);
381 s32 (*setup_link)(struct txgbe_hw *hw);
382 s32 (*setup_internal_link)(struct txgbe_hw *hw);
383 s32 (*setup_link_speed)(struct txgbe_hw *hw, u32 speed,
384 bool autoneg_wait_to_complete);
385 s32 (*check_link)(struct txgbe_hw *hw, u32 *speed, bool *link_up);
386 s32 (*read_i2c_byte)(struct txgbe_hw *hw, u8 byte_offset,
387 u8 dev_addr, u8 *data);
388 s32 (*write_i2c_byte)(struct txgbe_hw *hw, u8 byte_offset,
389 u8 dev_addr, u8 data);
390 s32 (*read_i2c_sff8472)(struct txgbe_hw *hw, u8 byte_offset,
392 s32 (*read_i2c_eeprom)(struct txgbe_hw *hw, u8 byte_offset,
394 s32 (*write_i2c_eeprom)(struct txgbe_hw *hw, u8 byte_offset,
396 s32 (*check_overtemp)(struct txgbe_hw *hw);
397 s32 (*set_phy_power)(struct txgbe_hw *hw, bool on);
398 s32 (*handle_lasi)(struct txgbe_hw *hw);
399 s32 (*read_i2c_byte_unlocked)(struct txgbe_hw *hw, u8 offset, u8 addr,
401 s32 (*write_i2c_byte_unlocked)(struct txgbe_hw *hw, u8 offset, u8 addr,
404 enum txgbe_phy_type type;
407 enum txgbe_sfp_type sfp_type;
408 bool sfp_setup_needed;
411 u32 phy_semaphore_mask;
413 u32 autoneg_advertised;
414 u32 speeds_supported;
415 enum txgbe_smart_speed smart_speed;
416 bool smart_speed_active;
417 bool multispeed_fiber;
418 bool qsfp_shared_i2c_bus;
423 struct txgbe_mbx_info {
424 void (*init_params)(struct txgbe_hw *hw);
425 s32 (*read)(struct txgbe_hw *hw, u32 *msg, u16 size, u16 vf_number);
426 s32 (*write)(struct txgbe_hw *hw, u32 *msg, u16 size, u16 vf_number);
427 s32 (*read_posted)(struct txgbe_hw *hw, u32 *msg, u16 size,
429 s32 (*write_posted)(struct txgbe_hw *hw, u32 *msg, u16 size,
431 s32 (*check_for_msg)(struct txgbe_hw *hw, u16 mbx_id);
432 s32 (*check_for_ack)(struct txgbe_hw *hw, u16 mbx_id);
433 s32 (*check_for_rst)(struct txgbe_hw *hw, u16 mbx_id);
447 struct txgbe_mac_info mac;
448 struct txgbe_addr_filter_info addr_ctrl;
449 struct txgbe_phy_info phy;
450 struct txgbe_link_info link;
451 struct txgbe_rom_info rom;
452 struct txgbe_flash_info flash;
453 struct txgbe_bus_info bus;
454 struct txgbe_mbx_info mbx;
457 u16 subsystem_device_id;
458 u16 subsystem_vendor_id;
459 bool adapter_stopped;
460 bool allow_unsupported_sfp;
461 bool need_crosstalk_fix;
467 enum txgbe_link_status {
468 TXGBE_LINK_STATUS_NONE = 0,
469 TXGBE_LINK_STATUS_KX,
470 TXGBE_LINK_STATUS_KX4
472 enum txgbe_reset_type {
478 u32 q_rx_regs[128 * 4];
479 u32 q_tx_regs[128 * 4];
482 #include "txgbe_regs.h"
483 #include "txgbe_dummy.h"
485 #endif /* _TXGBE_TYPE_H_ */