1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020
5 #ifndef _TXGBE_ETHDEV_H_
6 #define _TXGBE_ETHDEV_H_
8 #include "base/txgbe.h"
10 /* need update link, bit flag */
11 #define TXGBE_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0)
12 #define TXGBE_FLAG_MAILBOX (uint32_t)(1 << 1)
13 #define TXGBE_FLAG_PHY_INTERRUPT (uint32_t)(1 << 2)
14 #define TXGBE_FLAG_MACSEC (uint32_t)(1 << 3)
15 #define TXGBE_FLAG_NEED_LINK_CONFIG (uint32_t)(1 << 4)
18 * Defines that were not part of txgbe_type.h as they are not used by the
21 #define TXGBE_VLAN_TAG_SIZE 4
22 #define TXGBE_HKEY_MAX_INDEX 10
23 /*Default value of Max Rx Queue*/
24 #define TXGBE_MAX_RX_QUEUE_NUM 128
25 #define TXGBE_VMDQ_DCB_NB_QUEUES TXGBE_MAX_RX_QUEUE_NUM
27 #define TXGBE_QUEUE_ITR_INTERVAL_DEFAULT 500 /* 500us */
29 #define TXGBE_RSS_OFFLOAD_ALL ( \
31 ETH_RSS_NONFRAG_IPV4_TCP | \
32 ETH_RSS_NONFRAG_IPV4_UDP | \
34 ETH_RSS_NONFRAG_IPV6_TCP | \
35 ETH_RSS_NONFRAG_IPV6_UDP | \
37 ETH_RSS_IPV6_TCP_EX | \
40 #define TXGBE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
41 #define TXGBE_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET
43 /* structure for interrupt relative data */
44 struct txgbe_interrupt {
47 /* to save original mask during delayed handler */
48 uint32_t mask_misc_orig;
52 struct txgbe_uta_info {
53 uint8_t uc_filter_type;
55 uint32_t uta_shadow[TXGBE_MAX_UTA];
59 * Structure to store private data for each driver instance (for each port).
61 struct txgbe_adapter {
63 struct txgbe_interrupt intr;
64 struct txgbe_uta_info uta_info;
65 bool rx_bulk_alloc_allowed;
68 #define TXGBE_DEV_ADAPTER(dev) \
69 ((struct txgbe_adapter *)(dev)->data->dev_private)
71 #define TXGBE_DEV_HW(dev) \
72 (&((struct txgbe_adapter *)(dev)->data->dev_private)->hw)
74 #define TXGBE_DEV_INTR(dev) \
75 (&((struct txgbe_adapter *)(dev)->data->dev_private)->intr)
77 #define TXGBE_DEV_UTA_INFO(dev) \
78 (&((struct txgbe_adapter *)(dev)->data->dev_private)->uta_info)
81 * RX/TX function prototypes
83 int txgbe_dev_rx_init(struct rte_eth_dev *dev);
85 void txgbe_dev_tx_init(struct rte_eth_dev *dev);
87 void txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
88 uint8_t queue, uint8_t msix_vector);
91 txgbe_dev_link_update_share(struct rte_eth_dev *dev,
92 int wait_to_complete);
94 #define TXGBE_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
95 #define TXGBE_LINK_UP_CHECK_TIMEOUT 1000 /* ms */
96 #define TXGBE_VMDQ_NUM_UC_MAC 4096 /* Maximum nb. of UC MAC addr. */
99 * Default values for RX/TX configuration
101 #define TXGBE_DEFAULT_RX_FREE_THRESH 32
102 #define TXGBE_DEFAULT_RX_PTHRESH 8
103 #define TXGBE_DEFAULT_RX_HTHRESH 8
104 #define TXGBE_DEFAULT_RX_WTHRESH 0
106 #define TXGBE_DEFAULT_TX_FREE_THRESH 32
107 #define TXGBE_DEFAULT_TX_PTHRESH 32
108 #define TXGBE_DEFAULT_TX_HTHRESH 0
109 #define TXGBE_DEFAULT_TX_WTHRESH 0
111 int txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
112 struct rte_ether_addr *mc_addr_set,
113 uint32_t nb_mc_addr);
114 void txgbe_dev_setup_link_alarm_handler(void *param);
116 #endif /* _TXGBE_ETHDEV_H_ */