1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020
5 #ifndef _TXGBE_ETHDEV_H_
6 #define _TXGBE_ETHDEV_H_
8 #include "base/txgbe.h"
9 #include "txgbe_ptypes.h"
11 /* need update link, bit flag */
12 #define TXGBE_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0)
13 #define TXGBE_FLAG_MAILBOX (uint32_t)(1 << 1)
14 #define TXGBE_FLAG_PHY_INTERRUPT (uint32_t)(1 << 2)
15 #define TXGBE_FLAG_MACSEC (uint32_t)(1 << 3)
16 #define TXGBE_FLAG_NEED_LINK_CONFIG (uint32_t)(1 << 4)
19 * Defines that were not part of txgbe_type.h as they are not used by the
22 #define TXGBE_VFTA_SIZE 128
23 #define TXGBE_VLAN_TAG_SIZE 4
24 #define TXGBE_HKEY_MAX_INDEX 10
25 /*Default value of Max Rx Queue*/
26 #define TXGBE_MAX_RX_QUEUE_NUM 128
27 #define TXGBE_VMDQ_DCB_NB_QUEUES TXGBE_MAX_RX_QUEUE_NUM
30 #define NBBY 8 /* number of bits in a byte */
32 #define TXGBE_HWSTRIP_BITMAP_SIZE \
33 (TXGBE_MAX_RX_QUEUE_NUM / (sizeof(uint32_t) * NBBY))
35 #define TXGBE_QUEUE_ITR_INTERVAL_DEFAULT 500 /* 500us */
37 #define TXGBE_RSS_OFFLOAD_ALL ( \
39 ETH_RSS_NONFRAG_IPV4_TCP | \
40 ETH_RSS_NONFRAG_IPV4_UDP | \
42 ETH_RSS_NONFRAG_IPV6_TCP | \
43 ETH_RSS_NONFRAG_IPV6_UDP | \
45 ETH_RSS_IPV6_TCP_EX | \
48 #define TXGBE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
49 #define TXGBE_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET
51 /* structure for interrupt relative data */
52 struct txgbe_interrupt {
55 /* to save original mask during delayed handler */
56 uint32_t mask_misc_orig;
60 #define TXGBE_NB_STAT_MAPPING 32
61 #define QSM_REG_NB_BITS_PER_QMAP_FIELD 8
62 #define NB_QMAP_FIELDS_PER_QSM_REG 4
63 #define QMAP_FIELD_RESERVED_BITS_MASK 0x0f
64 struct txgbe_stat_mappings {
65 uint32_t tqsm[TXGBE_NB_STAT_MAPPING];
66 uint32_t rqsm[TXGBE_NB_STAT_MAPPING];
70 uint32_t vfta[TXGBE_VFTA_SIZE];
73 struct txgbe_hwstrip {
74 uint32_t bitmap[TXGBE_HWSTRIP_BITMAP_SIZE];
78 * VF data which used by PF host only
80 #define TXGBE_MAX_VF_MC_ENTRIES 30
82 struct txgbe_uta_info {
83 uint8_t uc_filter_type;
85 uint32_t uta_shadow[TXGBE_MAX_UTA];
88 #define TXGBE_MAX_MIRROR_RULES 4 /* Maximum nb. of mirror rules. */
90 struct txgbe_mirror_info {
91 struct rte_eth_mirror_conf mr_conf[TXGBE_MAX_MIRROR_RULES];
92 /* store PF mirror rules configuration */
95 struct txgbe_vf_info {
96 uint8_t vf_mac_addresses[RTE_ETHER_ADDR_LEN];
97 uint16_t vf_mc_hashes[TXGBE_MAX_VF_MC_ENTRIES];
98 uint16_t num_vf_mc_hashes;
102 uint16_t switch_domain_id;
108 * Structure to store private data for each driver instance (for each port).
110 struct txgbe_adapter {
112 struct txgbe_hw_stats stats;
113 struct txgbe_interrupt intr;
114 struct txgbe_stat_mappings stat_mappings;
115 struct txgbe_vfta shadow_vfta;
116 struct txgbe_hwstrip hwstrip;
117 struct txgbe_mirror_info mr_data;
118 struct txgbe_vf_info *vfdata;
119 struct txgbe_uta_info uta_info;
120 bool rx_bulk_alloc_allowed;
123 #define TXGBE_DEV_ADAPTER(dev) \
124 ((struct txgbe_adapter *)(dev)->data->dev_private)
126 #define TXGBE_DEV_HW(dev) \
127 (&((struct txgbe_adapter *)(dev)->data->dev_private)->hw)
129 #define TXGBE_DEV_STATS(dev) \
130 (&((struct txgbe_adapter *)(dev)->data->dev_private)->stats)
132 #define TXGBE_DEV_INTR(dev) \
133 (&((struct txgbe_adapter *)(dev)->data->dev_private)->intr)
135 #define TXGBE_DEV_STAT_MAPPINGS(dev) \
136 (&((struct txgbe_adapter *)(dev)->data->dev_private)->stat_mappings)
138 #define TXGBE_DEV_VFTA(dev) \
139 (&((struct txgbe_adapter *)(dev)->data->dev_private)->shadow_vfta)
141 #define TXGBE_DEV_HWSTRIP(dev) \
142 (&((struct txgbe_adapter *)(dev)->data->dev_private)->hwstrip)
144 #define TXGBE_DEV_VFDATA(dev) \
145 (&((struct txgbe_adapter *)(dev)->data->dev_private)->vfdata)
147 #define TXGBE_DEV_MR_INFO(dev) \
148 (&((struct txgbe_adapter *)(dev)->data->dev_private)->mr_data)
150 #define TXGBE_DEV_UTA_INFO(dev) \
151 (&((struct txgbe_adapter *)(dev)->data->dev_private)->uta_info)
154 * RX/TX function prototypes
156 void txgbe_dev_clear_queues(struct rte_eth_dev *dev);
158 void txgbe_dev_free_queues(struct rte_eth_dev *dev);
160 void txgbe_dev_rx_queue_release(void *rxq);
162 void txgbe_dev_tx_queue_release(void *txq);
164 int txgbe_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
165 uint16_t nb_rx_desc, unsigned int socket_id,
166 const struct rte_eth_rxconf *rx_conf,
167 struct rte_mempool *mb_pool);
169 int txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
170 uint16_t nb_tx_desc, unsigned int socket_id,
171 const struct rte_eth_txconf *tx_conf);
173 int txgbe_dev_rx_init(struct rte_eth_dev *dev);
175 void txgbe_dev_tx_init(struct rte_eth_dev *dev);
177 int txgbe_dev_rxtx_start(struct rte_eth_dev *dev);
179 void txgbe_dev_save_rx_queue(struct txgbe_hw *hw, uint16_t rx_queue_id);
180 void txgbe_dev_store_rx_queue(struct txgbe_hw *hw, uint16_t rx_queue_id);
181 void txgbe_dev_save_tx_queue(struct txgbe_hw *hw, uint16_t tx_queue_id);
182 void txgbe_dev_store_tx_queue(struct txgbe_hw *hw, uint16_t tx_queue_id);
184 int txgbe_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
186 int txgbe_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
188 int txgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
190 int txgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
192 void txgbe_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
193 struct rte_eth_rxq_info *qinfo);
195 void txgbe_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
196 struct rte_eth_txq_info *qinfo);
198 uint16_t txgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
201 uint16_t txgbe_recv_pkts_bulk_alloc(void *rx_queue, struct rte_mbuf **rx_pkts,
204 uint16_t txgbe_recv_pkts_lro_single_alloc(void *rx_queue,
205 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
206 uint16_t txgbe_recv_pkts_lro_bulk_alloc(void *rx_queue,
207 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
209 uint16_t txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
212 uint16_t txgbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts,
215 uint16_t txgbe_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
218 void txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
219 uint8_t queue, uint8_t msix_vector);
222 txgbe_dev_link_update_share(struct rte_eth_dev *dev,
223 int wait_to_complete);
224 void txgbe_pf_host_init(struct rte_eth_dev *eth_dev);
226 void txgbe_pf_host_uninit(struct rte_eth_dev *eth_dev);
228 void txgbe_pf_mbx_process(struct rte_eth_dev *eth_dev);
231 #define TXGBE_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
232 #define TXGBE_LINK_UP_CHECK_TIMEOUT 1000 /* ms */
233 #define TXGBE_VMDQ_NUM_UC_MAC 4096 /* Maximum nb. of UC MAC addr. */
236 * Default values for RX/TX configuration
238 #define TXGBE_DEFAULT_RX_FREE_THRESH 32
239 #define TXGBE_DEFAULT_RX_PTHRESH 8
240 #define TXGBE_DEFAULT_RX_HTHRESH 8
241 #define TXGBE_DEFAULT_RX_WTHRESH 0
243 #define TXGBE_DEFAULT_TX_FREE_THRESH 32
244 #define TXGBE_DEFAULT_TX_PTHRESH 32
245 #define TXGBE_DEFAULT_TX_HTHRESH 0
246 #define TXGBE_DEFAULT_TX_WTHRESH 0
248 /* store statistics names and its offset in stats structure */
249 struct rte_txgbe_xstats_name_off {
250 char name[RTE_ETH_XSTATS_NAME_SIZE];
254 const uint32_t *txgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev);
255 int txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
256 struct rte_ether_addr *mc_addr_set,
257 uint32_t nb_mc_addr);
258 void txgbe_dev_setup_link_alarm_handler(void *param);
259 void txgbe_read_stats_registers(struct txgbe_hw *hw,
260 struct txgbe_hw_stats *hw_stats);
262 void txgbe_vlan_hw_filter_enable(struct rte_eth_dev *dev);
263 void txgbe_vlan_hw_filter_disable(struct rte_eth_dev *dev);
264 void txgbe_vlan_hw_strip_config(struct rte_eth_dev *dev);
265 void txgbe_vlan_hw_strip_bitmap_set(struct rte_eth_dev *dev,
266 uint16_t queue, bool on);
267 void txgbe_config_vlan_strip_on_all_queues(struct rte_eth_dev *dev,
270 #endif /* _TXGBE_ETHDEV_H_ */