1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020
5 #ifndef _TXGBE_ETHDEV_H_
6 #define _TXGBE_ETHDEV_H_
8 #include "base/txgbe.h"
9 #include "txgbe_ptypes.h"
11 /* need update link, bit flag */
12 #define TXGBE_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0)
13 #define TXGBE_FLAG_MAILBOX (uint32_t)(1 << 1)
14 #define TXGBE_FLAG_PHY_INTERRUPT (uint32_t)(1 << 2)
15 #define TXGBE_FLAG_MACSEC (uint32_t)(1 << 3)
16 #define TXGBE_FLAG_NEED_LINK_CONFIG (uint32_t)(1 << 4)
19 * Defines that were not part of txgbe_type.h as they are not used by the
22 #define TXGBE_VLAN_TAG_SIZE 4
23 #define TXGBE_HKEY_MAX_INDEX 10
24 /*Default value of Max Rx Queue*/
25 #define TXGBE_MAX_RX_QUEUE_NUM 128
26 #define TXGBE_VMDQ_DCB_NB_QUEUES TXGBE_MAX_RX_QUEUE_NUM
28 #define TXGBE_QUEUE_ITR_INTERVAL_DEFAULT 500 /* 500us */
30 #define TXGBE_RSS_OFFLOAD_ALL ( \
32 ETH_RSS_NONFRAG_IPV4_TCP | \
33 ETH_RSS_NONFRAG_IPV4_UDP | \
35 ETH_RSS_NONFRAG_IPV6_TCP | \
36 ETH_RSS_NONFRAG_IPV6_UDP | \
38 ETH_RSS_IPV6_TCP_EX | \
41 #define TXGBE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
42 #define TXGBE_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET
44 /* structure for interrupt relative data */
45 struct txgbe_interrupt {
48 /* to save original mask during delayed handler */
49 uint32_t mask_misc_orig;
53 #define TXGBE_NB_STAT_MAPPING 32
54 #define QSM_REG_NB_BITS_PER_QMAP_FIELD 8
55 #define NB_QMAP_FIELDS_PER_QSM_REG 4
56 #define QMAP_FIELD_RESERVED_BITS_MASK 0x0f
57 struct txgbe_stat_mappings {
58 uint32_t tqsm[TXGBE_NB_STAT_MAPPING];
59 uint32_t rqsm[TXGBE_NB_STAT_MAPPING];
62 struct txgbe_uta_info {
63 uint8_t uc_filter_type;
65 uint32_t uta_shadow[TXGBE_MAX_UTA];
69 * Structure to store private data for each driver instance (for each port).
71 struct txgbe_adapter {
73 struct txgbe_hw_stats stats;
74 struct txgbe_interrupt intr;
75 struct txgbe_stat_mappings stat_mappings;
76 struct txgbe_uta_info uta_info;
77 bool rx_bulk_alloc_allowed;
80 #define TXGBE_DEV_ADAPTER(dev) \
81 ((struct txgbe_adapter *)(dev)->data->dev_private)
83 #define TXGBE_DEV_HW(dev) \
84 (&((struct txgbe_adapter *)(dev)->data->dev_private)->hw)
86 #define TXGBE_DEV_STATS(dev) \
87 (&((struct txgbe_adapter *)(dev)->data->dev_private)->stats)
89 #define TXGBE_DEV_INTR(dev) \
90 (&((struct txgbe_adapter *)(dev)->data->dev_private)->intr)
92 #define TXGBE_DEV_STAT_MAPPINGS(dev) \
93 (&((struct txgbe_adapter *)(dev)->data->dev_private)->stat_mappings)
95 #define TXGBE_DEV_UTA_INFO(dev) \
96 (&((struct txgbe_adapter *)(dev)->data->dev_private)->uta_info)
99 * RX/TX function prototypes
101 void txgbe_dev_clear_queues(struct rte_eth_dev *dev);
103 void txgbe_dev_free_queues(struct rte_eth_dev *dev);
105 void txgbe_dev_rx_queue_release(void *rxq);
107 void txgbe_dev_tx_queue_release(void *txq);
109 int txgbe_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
110 uint16_t nb_rx_desc, unsigned int socket_id,
111 const struct rte_eth_rxconf *rx_conf,
112 struct rte_mempool *mb_pool);
114 int txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
115 uint16_t nb_tx_desc, unsigned int socket_id,
116 const struct rte_eth_txconf *tx_conf);
118 int txgbe_dev_rx_init(struct rte_eth_dev *dev);
120 void txgbe_dev_tx_init(struct rte_eth_dev *dev);
122 int txgbe_dev_rxtx_start(struct rte_eth_dev *dev);
124 void txgbe_dev_save_rx_queue(struct txgbe_hw *hw, uint16_t rx_queue_id);
125 void txgbe_dev_store_rx_queue(struct txgbe_hw *hw, uint16_t rx_queue_id);
126 void txgbe_dev_save_tx_queue(struct txgbe_hw *hw, uint16_t tx_queue_id);
127 void txgbe_dev_store_tx_queue(struct txgbe_hw *hw, uint16_t tx_queue_id);
129 int txgbe_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
131 int txgbe_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
133 int txgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
135 int txgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
137 void txgbe_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
138 struct rte_eth_rxq_info *qinfo);
140 void txgbe_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
141 struct rte_eth_txq_info *qinfo);
143 uint16_t txgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
146 uint16_t txgbe_recv_pkts_bulk_alloc(void *rx_queue, struct rte_mbuf **rx_pkts,
149 uint16_t txgbe_recv_pkts_lro_single_alloc(void *rx_queue,
150 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
151 uint16_t txgbe_recv_pkts_lro_bulk_alloc(void *rx_queue,
152 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
154 uint16_t txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
157 uint16_t txgbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts,
160 uint16_t txgbe_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
163 void txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
164 uint8_t queue, uint8_t msix_vector);
167 txgbe_dev_link_update_share(struct rte_eth_dev *dev,
168 int wait_to_complete);
170 #define TXGBE_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
171 #define TXGBE_LINK_UP_CHECK_TIMEOUT 1000 /* ms */
172 #define TXGBE_VMDQ_NUM_UC_MAC 4096 /* Maximum nb. of UC MAC addr. */
175 * Default values for RX/TX configuration
177 #define TXGBE_DEFAULT_RX_FREE_THRESH 32
178 #define TXGBE_DEFAULT_RX_PTHRESH 8
179 #define TXGBE_DEFAULT_RX_HTHRESH 8
180 #define TXGBE_DEFAULT_RX_WTHRESH 0
182 #define TXGBE_DEFAULT_TX_FREE_THRESH 32
183 #define TXGBE_DEFAULT_TX_PTHRESH 32
184 #define TXGBE_DEFAULT_TX_HTHRESH 0
185 #define TXGBE_DEFAULT_TX_WTHRESH 0
187 /* store statistics names and its offset in stats structure */
188 struct rte_txgbe_xstats_name_off {
189 char name[RTE_ETH_XSTATS_NAME_SIZE];
193 const uint32_t *txgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev);
194 int txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
195 struct rte_ether_addr *mc_addr_set,
196 uint32_t nb_mc_addr);
197 void txgbe_dev_setup_link_alarm_handler(void *param);
198 void txgbe_read_stats_registers(struct txgbe_hw *hw,
199 struct txgbe_hw_stats *hw_stats);
201 #endif /* _TXGBE_ETHDEV_H_ */