1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020
11 #include <ethdev_pci.h>
13 #include "txgbe_logs.h"
14 #include "base/txgbe.h"
15 #include "txgbe_ethdev.h"
16 #include "txgbe_rxtx.h"
18 static int txgbevf_dev_info_get(struct rte_eth_dev *dev,
19 struct rte_eth_dev_info *dev_info);
20 static int txgbevf_dev_configure(struct rte_eth_dev *dev);
21 static int txgbevf_dev_link_update(struct rte_eth_dev *dev,
22 int wait_to_complete);
23 static int txgbevf_dev_close(struct rte_eth_dev *dev);
24 static void txgbevf_intr_disable(struct rte_eth_dev *dev);
25 static void txgbevf_intr_enable(struct rte_eth_dev *dev);
26 static void txgbevf_configure_msix(struct rte_eth_dev *dev);
27 static void txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index);
28 static void txgbevf_dev_interrupt_handler(void *param);
31 * The set of PCI devices this driver supports (for VF)
33 static const struct rte_pci_id pci_id_txgbevf_map[] = {
34 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_RAPTOR_VF) },
35 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_RAPTOR_VF_HV) },
36 { .vendor_id = 0, /* sentinel */ },
39 static const struct rte_eth_desc_lim rx_desc_lim = {
40 .nb_max = TXGBE_RING_DESC_MAX,
41 .nb_min = TXGBE_RING_DESC_MIN,
42 .nb_align = TXGBE_RXD_ALIGN,
45 static const struct rte_eth_desc_lim tx_desc_lim = {
46 .nb_max = TXGBE_RING_DESC_MAX,
47 .nb_min = TXGBE_RING_DESC_MIN,
48 .nb_align = TXGBE_TXD_ALIGN,
49 .nb_seg_max = TXGBE_TX_MAX_SEG,
50 .nb_mtu_seg_max = TXGBE_TX_MAX_SEG,
53 static const struct eth_dev_ops txgbevf_eth_dev_ops;
56 * Negotiate mailbox API version with the PF.
57 * After reset API version is always set to the basic one (txgbe_mbox_api_10).
58 * Then we try to negotiate starting with the most recent one.
59 * If all negotiation attempts fail, then we will proceed with
60 * the default one (txgbe_mbox_api_10).
63 txgbevf_negotiate_api(struct txgbe_hw *hw)
67 /* start with highest supported, proceed down */
68 static const int sup_ver[] = {
75 for (i = 0; i < ARRAY_SIZE(sup_ver); i++) {
76 if (txgbevf_negotiate_api_version(hw, sup_ver[i]) == 0)
82 generate_random_mac_addr(struct rte_ether_addr *mac_addr)
86 /* Set Organizationally Unique Identifier (OUI) prefix. */
87 mac_addr->addr_bytes[0] = 0x00;
88 mac_addr->addr_bytes[1] = 0x09;
89 mac_addr->addr_bytes[2] = 0xC0;
90 /* Force indication of locally assigned MAC address. */
91 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
92 /* Generate the last 3 bytes of the MAC address with a random number. */
94 memcpy(&mac_addr->addr_bytes[3], &random, 3);
98 * Virtual Function device init
101 eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev)
105 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
106 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
107 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
108 struct rte_ether_addr *perm_addr =
109 (struct rte_ether_addr *)hw->mac.perm_addr;
111 PMD_INIT_FUNC_TRACE();
113 eth_dev->dev_ops = &txgbevf_eth_dev_ops;
114 eth_dev->rx_descriptor_status = txgbe_dev_rx_descriptor_status;
115 eth_dev->tx_descriptor_status = txgbe_dev_tx_descriptor_status;
116 eth_dev->rx_pkt_burst = &txgbe_recv_pkts;
117 eth_dev->tx_pkt_burst = &txgbe_xmit_pkts;
119 /* for secondary processes, we don't initialise any further as primary
120 * has already done this work. Only check we don't need a different
123 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
124 struct txgbe_tx_queue *txq;
125 uint16_t nb_tx_queues = eth_dev->data->nb_tx_queues;
126 /* TX queue function in primary, set by last queue initialized
127 * Tx queue may not initialized by primary process
129 if (eth_dev->data->tx_queues) {
130 txq = eth_dev->data->tx_queues[nb_tx_queues - 1];
131 txgbe_set_tx_function(eth_dev, txq);
133 /* Use default TX function if we get here */
135 "No TX queues configured yet. Using default TX function.");
138 txgbe_set_rx_function(eth_dev);
143 rte_eth_copy_pci_info(eth_dev, pci_dev);
145 hw->device_id = pci_dev->id.device_id;
146 hw->vendor_id = pci_dev->id.vendor_id;
147 hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
148 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
149 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
151 /* Initialize the shared code (base driver) */
152 err = txgbe_init_shared_code(hw);
155 "Shared code init failed for txgbevf: %d", err);
159 /* init_mailbox_params */
160 hw->mbx.init_params(hw);
162 /* Disable the interrupts for VF */
163 txgbevf_intr_disable(eth_dev);
165 hw->mac.num_rar_entries = 128; /* The MAX of the underlying PF */
166 err = hw->mac.reset_hw(hw);
169 * The VF reset operation returns the TXGBE_ERR_INVALID_MAC_ADDR when
170 * the underlying PF driver has not assigned a MAC address to the VF.
171 * In this case, assign a random MAC address.
173 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) {
174 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err);
176 * This error code will be propagated to the app by
177 * rte_eth_dev_reset, so use a public error code rather than
178 * the internal-only TXGBE_ERR_RESET_FAILED
183 /* negotiate mailbox API version to use with the PF. */
184 txgbevf_negotiate_api(hw);
186 /* Get Rx/Tx queue count via mailbox, which is ready after reset_hw */
187 txgbevf_get_queues(hw, &tcs, &tc);
189 /* Allocate memory for storing MAC addresses */
190 eth_dev->data->mac_addrs = rte_zmalloc("txgbevf", RTE_ETHER_ADDR_LEN *
191 hw->mac.num_rar_entries, 0);
192 if (eth_dev->data->mac_addrs == NULL) {
194 "Failed to allocate %u bytes needed to store "
196 RTE_ETHER_ADDR_LEN * hw->mac.num_rar_entries);
200 /* Generate a random MAC address, if none was assigned by PF. */
201 if (rte_is_zero_ether_addr(perm_addr)) {
202 generate_random_mac_addr(perm_addr);
203 err = txgbe_set_rar_vf(hw, 1, perm_addr->addr_bytes, 0, 1);
205 rte_free(eth_dev->data->mac_addrs);
206 eth_dev->data->mac_addrs = NULL;
209 PMD_INIT_LOG(INFO, "\tVF MAC address not assigned by Host PF");
210 PMD_INIT_LOG(INFO, "\tAssign randomly generated MAC address "
211 "%02x:%02x:%02x:%02x:%02x:%02x",
212 perm_addr->addr_bytes[0],
213 perm_addr->addr_bytes[1],
214 perm_addr->addr_bytes[2],
215 perm_addr->addr_bytes[3],
216 perm_addr->addr_bytes[4],
217 perm_addr->addr_bytes[5]);
220 /* Copy the permanent MAC address */
221 rte_ether_addr_copy(perm_addr, ð_dev->data->mac_addrs[0]);
223 /* reset the hardware with the new settings */
224 err = hw->mac.start_hw(hw);
226 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err);
230 rte_intr_callback_register(intr_handle,
231 txgbevf_dev_interrupt_handler, eth_dev);
232 rte_intr_enable(intr_handle);
233 txgbevf_intr_enable(eth_dev);
235 PMD_INIT_LOG(DEBUG, "port %d vendorID=0x%x deviceID=0x%x mac.type=%s",
236 eth_dev->data->port_id, pci_dev->id.vendor_id,
237 pci_dev->id.device_id, "txgbe_mac_raptor_vf");
242 /* Virtual Function device uninit */
244 eth_txgbevf_dev_uninit(struct rte_eth_dev *eth_dev)
246 PMD_INIT_FUNC_TRACE();
248 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
251 txgbevf_dev_close(eth_dev);
256 static int eth_txgbevf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
257 struct rte_pci_device *pci_dev)
259 return rte_eth_dev_pci_generic_probe(pci_dev,
260 sizeof(struct txgbe_adapter), eth_txgbevf_dev_init);
263 static int eth_txgbevf_pci_remove(struct rte_pci_device *pci_dev)
265 return rte_eth_dev_pci_generic_remove(pci_dev, eth_txgbevf_dev_uninit);
269 * virtual function driver struct
271 static struct rte_pci_driver rte_txgbevf_pmd = {
272 .id_table = pci_id_txgbevf_map,
273 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
274 .probe = eth_txgbevf_pci_probe,
275 .remove = eth_txgbevf_pci_remove,
279 txgbevf_dev_info_get(struct rte_eth_dev *dev,
280 struct rte_eth_dev_info *dev_info)
282 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
283 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
285 dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;
286 dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;
287 dev_info->min_rx_bufsize = 1024;
288 dev_info->max_rx_pktlen = TXGBE_FRAME_SIZE_MAX;
289 dev_info->max_mac_addrs = hw->mac.num_rar_entries;
290 dev_info->max_hash_mac_addrs = TXGBE_VMDQ_NUM_UC_MAC;
291 dev_info->max_vfs = pci_dev->max_vfs;
292 dev_info->max_vmdq_pools = ETH_64_POOLS;
293 dev_info->rx_queue_offload_capa = txgbe_get_rx_queue_offloads(dev);
294 dev_info->rx_offload_capa = (txgbe_get_rx_port_offloads(dev) |
295 dev_info->rx_queue_offload_capa);
296 dev_info->tx_queue_offload_capa = txgbe_get_tx_queue_offloads(dev);
297 dev_info->tx_offload_capa = txgbe_get_tx_port_offloads(dev);
298 dev_info->hash_key_size = TXGBE_HKEY_MAX_INDEX * sizeof(uint32_t);
299 dev_info->reta_size = ETH_RSS_RETA_SIZE_128;
300 dev_info->flow_type_rss_offloads = TXGBE_RSS_OFFLOAD_ALL;
302 dev_info->default_rxconf = (struct rte_eth_rxconf) {
304 .pthresh = TXGBE_DEFAULT_RX_PTHRESH,
305 .hthresh = TXGBE_DEFAULT_RX_HTHRESH,
306 .wthresh = TXGBE_DEFAULT_RX_WTHRESH,
308 .rx_free_thresh = TXGBE_DEFAULT_RX_FREE_THRESH,
313 dev_info->default_txconf = (struct rte_eth_txconf) {
315 .pthresh = TXGBE_DEFAULT_TX_PTHRESH,
316 .hthresh = TXGBE_DEFAULT_TX_HTHRESH,
317 .wthresh = TXGBE_DEFAULT_TX_WTHRESH,
319 .tx_free_thresh = TXGBE_DEFAULT_TX_FREE_THRESH,
323 dev_info->rx_desc_lim = rx_desc_lim;
324 dev_info->tx_desc_lim = tx_desc_lim;
330 txgbevf_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
332 return txgbe_dev_link_update_share(dev, wait_to_complete);
336 * Virtual Function operations
339 txgbevf_intr_disable(struct rte_eth_dev *dev)
341 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
342 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
344 PMD_INIT_FUNC_TRACE();
346 /* Clear interrupt mask to stop from interrupts being generated */
347 wr32(hw, TXGBE_VFIMS, TXGBE_VFIMS_MASK);
351 /* Clear mask value. */
352 intr->mask_misc = TXGBE_VFIMS_MASK;
356 txgbevf_intr_enable(struct rte_eth_dev *dev)
358 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
359 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
361 PMD_INIT_FUNC_TRACE();
363 /* VF enable interrupt autoclean */
364 wr32(hw, TXGBE_VFIMC, TXGBE_VFIMC_MASK);
372 txgbevf_dev_configure(struct rte_eth_dev *dev)
374 struct rte_eth_conf *conf = &dev->data->dev_conf;
375 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);
377 PMD_INIT_LOG(DEBUG, "Configured Virtual Function port id: %d",
380 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
381 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
384 * VF has no ability to enable/disable HW CRC
385 * Keep the persistent behavior the same as Host PF
387 #ifndef RTE_LIBRTE_TXGBE_PF_DISABLE_STRIP_CRC
388 if (conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
389 PMD_INIT_LOG(NOTICE, "VF can't disable HW CRC Strip");
390 conf->rxmode.offloads &= ~DEV_RX_OFFLOAD_KEEP_CRC;
393 if (!(conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) {
394 PMD_INIT_LOG(NOTICE, "VF can't enable HW CRC Strip");
395 conf->rxmode.offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
400 * Initialize to TRUE. If any of Rx queues doesn't meet the bulk
401 * allocation or vector Rx preconditions we will reset it.
403 adapter->rx_bulk_alloc_allowed = true;
409 txgbevf_dev_close(struct rte_eth_dev *dev)
411 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
412 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
413 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
414 PMD_INIT_FUNC_TRACE();
415 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
418 hw->mac.reset_hw(hw);
420 txgbe_dev_free_queues(dev);
423 * Remove the VF MAC address ro ensure
424 * that the VF traffic goes to the PF
425 * after stop, close and detach of the VF
427 txgbevf_remove_mac_addr(dev, 0);
429 dev->rx_pkt_burst = NULL;
430 dev->tx_pkt_burst = NULL;
432 /* Disable the interrupts for VF */
433 txgbevf_intr_disable(dev);
435 rte_free(dev->data->mac_addrs);
436 dev->data->mac_addrs = NULL;
438 rte_intr_disable(intr_handle);
439 rte_intr_callback_unregister(intr_handle,
440 txgbevf_dev_interrupt_handler, dev);
446 txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
448 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
449 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
450 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
451 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
452 uint32_t vec = TXGBE_MISC_VEC_ID;
454 if (rte_intr_allow_others(intr_handle))
455 vec = TXGBE_RX_VEC_START;
456 intr->mask_misc &= ~(1 << vec);
457 RTE_SET_USED(queue_id);
458 wr32(hw, TXGBE_VFIMC, ~intr->mask_misc);
460 rte_intr_enable(intr_handle);
466 txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
468 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
469 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
470 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
471 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
472 uint32_t vec = TXGBE_MISC_VEC_ID;
474 if (rte_intr_allow_others(intr_handle))
475 vec = TXGBE_RX_VEC_START;
476 intr->mask_misc |= (1 << vec);
477 RTE_SET_USED(queue_id);
478 wr32(hw, TXGBE_VFIMS, intr->mask_misc);
484 txgbevf_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
485 uint8_t queue, uint8_t msix_vector)
489 if (direction == -1) {
491 msix_vector |= TXGBE_VFIVAR_VLD;
492 tmp = rd32(hw, TXGBE_VFIVARMISC);
495 wr32(hw, TXGBE_VFIVARMISC, tmp);
498 /* Workround for ICR lost */
499 idx = ((16 * (queue & 1)) + (8 * direction));
500 tmp = rd32(hw, TXGBE_VFIVAR(queue >> 1));
501 tmp &= ~(0xFF << idx);
502 tmp |= (msix_vector << idx);
503 wr32(hw, TXGBE_VFIVAR(queue >> 1), tmp);
508 txgbevf_configure_msix(struct rte_eth_dev *dev)
510 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
511 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
512 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
514 uint32_t vector_idx = TXGBE_MISC_VEC_ID;
515 uint32_t base = TXGBE_MISC_VEC_ID;
517 /* Configure VF other cause ivar */
518 txgbevf_set_ivar_map(hw, -1, 1, vector_idx);
520 /* won't configure msix register if no mapping is done
521 * between intr vector and event fd.
523 if (!rte_intr_dp_is_en(intr_handle))
526 if (rte_intr_allow_others(intr_handle)) {
527 base = TXGBE_RX_VEC_START;
528 vector_idx = TXGBE_RX_VEC_START;
531 /* Configure all RX queues of VF */
532 for (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) {
533 /* Force all queue use vector 0,
534 * as TXGBE_VF_MAXMSIVECOTR = 1
536 txgbevf_set_ivar_map(hw, 0, q_idx, vector_idx);
537 intr_handle->intr_vec[q_idx] = vector_idx;
538 if (vector_idx < base + intr_handle->nb_efd - 1)
542 /* As RX queue setting above show, all queues use the vector 0.
543 * Set only the ITR value of TXGBE_MISC_VEC_ID.
545 wr32(hw, TXGBE_ITR(TXGBE_MISC_VEC_ID),
546 TXGBE_ITR_IVAL(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT)
551 txgbevf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
552 __rte_unused uint32_t index,
553 __rte_unused uint32_t pool)
555 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
559 * On a VF, adding again the same MAC addr is not an idempotent
560 * operation. Trap this case to avoid exhausting the [very limited]
561 * set of PF resources used to store VF MAC addresses.
563 if (memcmp(hw->mac.perm_addr, mac_addr,
564 sizeof(struct rte_ether_addr)) == 0)
566 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes);
568 PMD_DRV_LOG(ERR, "Unable to add MAC address "
569 "%02x:%02x:%02x:%02x:%02x:%02x - err=%d",
570 mac_addr->addr_bytes[0],
571 mac_addr->addr_bytes[1],
572 mac_addr->addr_bytes[2],
573 mac_addr->addr_bytes[3],
574 mac_addr->addr_bytes[4],
575 mac_addr->addr_bytes[5],
581 txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index)
583 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
584 struct rte_ether_addr *perm_addr =
585 (struct rte_ether_addr *)hw->mac.perm_addr;
586 struct rte_ether_addr *mac_addr;
591 * The TXGBE_VF_SET_MACVLAN command of the txgbe-pf driver does
592 * not support the deletion of a given MAC address.
593 * Instead, it imposes to delete all MAC addresses, then to add again
594 * all MAC addresses with the exception of the one to be deleted.
596 (void)txgbevf_set_uc_addr_vf(hw, 0, NULL);
599 * Add again all MAC addresses, with the exception of the deleted one
600 * and of the permanent MAC address.
602 for (i = 0, mac_addr = dev->data->mac_addrs;
603 i < hw->mac.num_rar_entries; i++, mac_addr++) {
604 /* Skip the deleted MAC address */
607 /* Skip NULL MAC addresses */
608 if (rte_is_zero_ether_addr(mac_addr))
610 /* Skip the permanent MAC address */
611 if (memcmp(perm_addr, mac_addr,
612 sizeof(struct rte_ether_addr)) == 0)
614 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes);
617 "Adding again MAC address "
618 "%02x:%02x:%02x:%02x:%02x:%02x failed "
620 mac_addr->addr_bytes[0],
621 mac_addr->addr_bytes[1],
622 mac_addr->addr_bytes[2],
623 mac_addr->addr_bytes[3],
624 mac_addr->addr_bytes[4],
625 mac_addr->addr_bytes[5],
631 txgbevf_set_default_mac_addr(struct rte_eth_dev *dev,
632 struct rte_ether_addr *addr)
634 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
636 hw->mac.set_rar(hw, 0, (void *)addr, 0, 0);
641 static void txgbevf_mbx_process(struct rte_eth_dev *dev)
643 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
646 /* peek the message first */
647 in_msg = rd32(hw, TXGBE_VFMBX);
649 /* PF reset VF event */
650 if (in_msg == TXGBE_PF_CONTROL_MSG) {
651 /* dummy mbx read to ack pf */
652 if (txgbe_read_mbx(hw, &in_msg, 1, 0))
654 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
660 txgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev)
663 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
664 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
665 txgbevf_intr_disable(dev);
667 /* read-on-clear nic registers here */
668 eicr = rd32(hw, TXGBE_VFICR);
671 /* only one misc vector supported - mailbox */
672 eicr &= TXGBE_VFICR_MASK;
673 /* Workround for ICR lost */
674 intr->flags |= TXGBE_FLAG_MAILBOX;
680 txgbevf_dev_interrupt_action(struct rte_eth_dev *dev)
682 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
684 if (intr->flags & TXGBE_FLAG_MAILBOX) {
685 txgbevf_mbx_process(dev);
686 intr->flags &= ~TXGBE_FLAG_MAILBOX;
689 txgbevf_intr_enable(dev);
695 txgbevf_dev_interrupt_handler(void *param)
697 struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
699 txgbevf_dev_interrupt_get_status(dev);
700 txgbevf_dev_interrupt_action(dev);
704 * dev_ops for virtual function, bare necessities for basic vf
705 * operation have been implemented
707 static const struct eth_dev_ops txgbevf_eth_dev_ops = {
708 .dev_configure = txgbevf_dev_configure,
709 .link_update = txgbevf_dev_link_update,
710 .dev_infos_get = txgbevf_dev_info_get,
711 .rx_queue_intr_enable = txgbevf_dev_rx_queue_intr_enable,
712 .rx_queue_intr_disable = txgbevf_dev_rx_queue_intr_disable,
713 .mac_addr_add = txgbevf_add_mac_addr,
714 .mac_addr_remove = txgbevf_remove_mac_addr,
715 .rxq_info_get = txgbe_rxq_info_get,
716 .txq_info_get = txgbe_txq_info_get,
717 .mac_addr_set = txgbevf_set_default_mac_addr,
720 RTE_PMD_REGISTER_PCI(net_txgbe_vf, rte_txgbevf_pmd);
721 RTE_PMD_REGISTER_PCI_TABLE(net_txgbe_vf, pci_id_txgbevf_map);
722 RTE_PMD_REGISTER_KMOD_DEP(net_txgbe_vf, "* igb_uio | vfio-pci");