1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020 Beijing WangXun Technology Co., Ltd.
3 * Copyright(c) 2010-2017 Intel Corporation
12 #include <ethdev_pci.h>
13 #include <rte_alarm.h>
15 #include "txgbe_logs.h"
16 #include "base/txgbe.h"
17 #include "txgbe_ethdev.h"
18 #include "txgbe_rxtx.h"
19 #include "txgbe_regs_group.h"
21 static const struct reg_info txgbevf_regs_general[] = {
22 {TXGBE_VFRST, 1, 1, "TXGBE_VFRST"},
23 {TXGBE_VFSTATUS, 1, 1, "TXGBE_VFSTATUS"},
24 {TXGBE_VFMBCTL, 1, 1, "TXGBE_VFMAILBOX"},
25 {TXGBE_VFMBX, 16, 4, "TXGBE_VFMBX"},
26 {TXGBE_VFPBWRAP, 1, 1, "TXGBE_VFPBWRAP"},
30 static const struct reg_info txgbevf_regs_interrupt[] = {
34 static const struct reg_info txgbevf_regs_rxdma[] = {
38 static const struct reg_info txgbevf_regs_tx[] = {
43 static const struct reg_info *txgbevf_regs[] = {
45 txgbevf_regs_interrupt,
50 static int txgbevf_dev_xstats_get(struct rte_eth_dev *dev,
51 struct rte_eth_xstat *xstats, unsigned int n);
52 static int txgbevf_dev_info_get(struct rte_eth_dev *dev,
53 struct rte_eth_dev_info *dev_info);
54 static int txgbevf_dev_configure(struct rte_eth_dev *dev);
55 static int txgbevf_dev_start(struct rte_eth_dev *dev);
56 static int txgbevf_dev_link_update(struct rte_eth_dev *dev,
57 int wait_to_complete);
58 static int txgbevf_dev_stop(struct rte_eth_dev *dev);
59 static int txgbevf_dev_close(struct rte_eth_dev *dev);
60 static void txgbevf_intr_disable(struct rte_eth_dev *dev);
61 static void txgbevf_intr_enable(struct rte_eth_dev *dev);
62 static int txgbevf_dev_stats_reset(struct rte_eth_dev *dev);
63 static int txgbevf_vlan_offload_config(struct rte_eth_dev *dev, int mask);
64 static void txgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on);
65 static void txgbevf_configure_msix(struct rte_eth_dev *dev);
66 static int txgbevf_dev_promiscuous_enable(struct rte_eth_dev *dev);
67 static int txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev);
68 static void txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index);
69 static void txgbevf_dev_interrupt_handler(void *param);
72 * The set of PCI devices this driver supports (for VF)
74 static const struct rte_pci_id pci_id_txgbevf_map[] = {
75 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_SP1000_VF) },
76 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_WX1820_VF) },
77 { .vendor_id = 0, /* sentinel */ },
80 static const struct rte_eth_desc_lim rx_desc_lim = {
81 .nb_max = TXGBE_RING_DESC_MAX,
82 .nb_min = TXGBE_RING_DESC_MIN,
83 .nb_align = TXGBE_RXD_ALIGN,
86 static const struct rte_eth_desc_lim tx_desc_lim = {
87 .nb_max = TXGBE_RING_DESC_MAX,
88 .nb_min = TXGBE_RING_DESC_MIN,
89 .nb_align = TXGBE_TXD_ALIGN,
90 .nb_seg_max = TXGBE_TX_MAX_SEG,
91 .nb_mtu_seg_max = TXGBE_TX_MAX_SEG,
94 static const struct eth_dev_ops txgbevf_eth_dev_ops;
96 static const struct rte_txgbe_xstats_name_off rte_txgbevf_stats_strings[] = {
97 {"rx_multicast_packets_0",
98 offsetof(struct txgbevf_hw_stats, qp[0].vfmprc)},
99 {"rx_multicast_packets_1",
100 offsetof(struct txgbevf_hw_stats, qp[1].vfmprc)},
101 {"rx_multicast_packets_2",
102 offsetof(struct txgbevf_hw_stats, qp[2].vfmprc)},
103 {"rx_multicast_packets_3",
104 offsetof(struct txgbevf_hw_stats, qp[3].vfmprc)},
105 {"rx_multicast_packets_4",
106 offsetof(struct txgbevf_hw_stats, qp[4].vfmprc)},
107 {"rx_multicast_packets_5",
108 offsetof(struct txgbevf_hw_stats, qp[5].vfmprc)},
109 {"rx_multicast_packets_6",
110 offsetof(struct txgbevf_hw_stats, qp[6].vfmprc)},
111 {"rx_multicast_packets_7",
112 offsetof(struct txgbevf_hw_stats, qp[7].vfmprc)}
115 #define TXGBEVF_NB_XSTATS (sizeof(rte_txgbevf_stats_strings) / \
116 sizeof(rte_txgbevf_stats_strings[0]))
119 * Negotiate mailbox API version with the PF.
120 * After reset API version is always set to the basic one (txgbe_mbox_api_10).
121 * Then we try to negotiate starting with the most recent one.
122 * If all negotiation attempts fail, then we will proceed with
123 * the default one (txgbe_mbox_api_10).
126 txgbevf_negotiate_api(struct txgbe_hw *hw)
130 /* start with highest supported, proceed down */
131 static const int sup_ver[] = {
138 for (i = 0; i < ARRAY_SIZE(sup_ver); i++) {
139 if (txgbevf_negotiate_api_version(hw, sup_ver[i]) == 0)
145 generate_random_mac_addr(struct rte_ether_addr *mac_addr)
149 /* Set Organizationally Unique Identifier (OUI) prefix. */
150 mac_addr->addr_bytes[0] = 0x00;
151 mac_addr->addr_bytes[1] = 0x09;
152 mac_addr->addr_bytes[2] = 0xC0;
153 /* Force indication of locally assigned MAC address. */
154 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
155 /* Generate the last 3 bytes of the MAC address with a random number. */
157 memcpy(&mac_addr->addr_bytes[3], &random, 3);
161 * Virtual Function device init
164 eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev)
168 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
169 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
170 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
171 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(eth_dev);
172 struct txgbe_hwstrip *hwstrip = TXGBE_DEV_HWSTRIP(eth_dev);
173 struct rte_ether_addr *perm_addr =
174 (struct rte_ether_addr *)hw->mac.perm_addr;
176 PMD_INIT_FUNC_TRACE();
178 eth_dev->dev_ops = &txgbevf_eth_dev_ops;
179 eth_dev->rx_descriptor_status = txgbe_dev_rx_descriptor_status;
180 eth_dev->tx_descriptor_status = txgbe_dev_tx_descriptor_status;
181 eth_dev->rx_pkt_burst = &txgbe_recv_pkts;
182 eth_dev->tx_pkt_burst = &txgbe_xmit_pkts;
184 /* for secondary processes, we don't initialise any further as primary
185 * has already done this work. Only check we don't need a different
188 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
189 struct txgbe_tx_queue *txq;
190 uint16_t nb_tx_queues = eth_dev->data->nb_tx_queues;
191 /* TX queue function in primary, set by last queue initialized
192 * Tx queue may not initialized by primary process
194 if (eth_dev->data->tx_queues) {
195 txq = eth_dev->data->tx_queues[nb_tx_queues - 1];
196 txgbe_set_tx_function(eth_dev, txq);
198 /* Use default TX function if we get here */
200 "No TX queues configured yet. Using default TX function.");
203 txgbe_set_rx_function(eth_dev);
208 rte_eth_copy_pci_info(eth_dev, pci_dev);
210 hw->device_id = pci_dev->id.device_id;
211 hw->vendor_id = pci_dev->id.vendor_id;
212 hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
213 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
214 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
216 /* initialize the vfta */
217 memset(shadow_vfta, 0, sizeof(*shadow_vfta));
219 /* initialize the hw strip bitmap*/
220 memset(hwstrip, 0, sizeof(*hwstrip));
222 /* Initialize the shared code (base driver) */
223 err = txgbe_init_shared_code(hw);
226 "Shared code init failed for txgbevf: %d", err);
230 /* init_mailbox_params */
231 hw->mbx.init_params(hw);
233 /* Reset the hw statistics */
234 txgbevf_dev_stats_reset(eth_dev);
236 /* Disable the interrupts for VF */
237 txgbevf_intr_disable(eth_dev);
239 hw->mac.num_rar_entries = 128; /* The MAX of the underlying PF */
240 err = hw->mac.reset_hw(hw);
243 * The VF reset operation returns the TXGBE_ERR_INVALID_MAC_ADDR when
244 * the underlying PF driver has not assigned a MAC address to the VF.
245 * In this case, assign a random MAC address.
247 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) {
248 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err);
250 * This error code will be propagated to the app by
251 * rte_eth_dev_reset, so use a public error code rather than
252 * the internal-only TXGBE_ERR_RESET_FAILED
257 /* negotiate mailbox API version to use with the PF. */
258 txgbevf_negotiate_api(hw);
260 /* Get Rx/Tx queue count via mailbox, which is ready after reset_hw */
261 txgbevf_get_queues(hw, &tcs, &tc);
263 /* Allocate memory for storing MAC addresses */
264 eth_dev->data->mac_addrs = rte_zmalloc("txgbevf", RTE_ETHER_ADDR_LEN *
265 hw->mac.num_rar_entries, 0);
266 if (eth_dev->data->mac_addrs == NULL) {
268 "Failed to allocate %u bytes needed to store "
270 RTE_ETHER_ADDR_LEN * hw->mac.num_rar_entries);
274 /* Generate a random MAC address, if none was assigned by PF. */
275 if (rte_is_zero_ether_addr(perm_addr)) {
276 generate_random_mac_addr(perm_addr);
277 err = txgbe_set_rar_vf(hw, 1, perm_addr->addr_bytes, 0, 1);
279 rte_free(eth_dev->data->mac_addrs);
280 eth_dev->data->mac_addrs = NULL;
283 PMD_INIT_LOG(INFO, "\tVF MAC address not assigned by Host PF");
284 PMD_INIT_LOG(INFO, "\tAssign randomly generated MAC address "
285 "%02x:%02x:%02x:%02x:%02x:%02x",
286 perm_addr->addr_bytes[0],
287 perm_addr->addr_bytes[1],
288 perm_addr->addr_bytes[2],
289 perm_addr->addr_bytes[3],
290 perm_addr->addr_bytes[4],
291 perm_addr->addr_bytes[5]);
294 /* Copy the permanent MAC address */
295 rte_ether_addr_copy(perm_addr, ð_dev->data->mac_addrs[0]);
297 /* reset the hardware with the new settings */
298 err = hw->mac.start_hw(hw);
300 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err);
304 /* enter promiscuous mode */
305 txgbevf_dev_promiscuous_enable(eth_dev);
307 rte_intr_callback_register(intr_handle,
308 txgbevf_dev_interrupt_handler, eth_dev);
309 rte_intr_enable(intr_handle);
310 txgbevf_intr_enable(eth_dev);
312 PMD_INIT_LOG(DEBUG, "port %d vendorID=0x%x deviceID=0x%x mac.type=%s",
313 eth_dev->data->port_id, pci_dev->id.vendor_id,
314 pci_dev->id.device_id, "txgbe_mac_raptor_vf");
319 /* Virtual Function device uninit */
321 eth_txgbevf_dev_uninit(struct rte_eth_dev *eth_dev)
323 PMD_INIT_FUNC_TRACE();
325 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
328 txgbevf_dev_close(eth_dev);
333 static int eth_txgbevf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
334 struct rte_pci_device *pci_dev)
336 return rte_eth_dev_pci_generic_probe(pci_dev,
337 sizeof(struct txgbe_adapter), eth_txgbevf_dev_init);
340 static int eth_txgbevf_pci_remove(struct rte_pci_device *pci_dev)
342 return rte_eth_dev_pci_generic_remove(pci_dev, eth_txgbevf_dev_uninit);
346 * virtual function driver struct
348 static struct rte_pci_driver rte_txgbevf_pmd = {
349 .id_table = pci_id_txgbevf_map,
350 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
351 .probe = eth_txgbevf_pci_probe,
352 .remove = eth_txgbevf_pci_remove,
355 static int txgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
356 struct rte_eth_xstat_name *xstats_names, unsigned int limit)
360 if (limit < TXGBEVF_NB_XSTATS && xstats_names != NULL)
363 if (xstats_names != NULL)
364 for (i = 0; i < TXGBEVF_NB_XSTATS; i++)
365 snprintf(xstats_names[i].name,
366 sizeof(xstats_names[i].name),
367 "%s", rte_txgbevf_stats_strings[i].name);
368 return TXGBEVF_NB_XSTATS;
372 txgbevf_update_stats(struct rte_eth_dev *dev)
374 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
375 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
376 TXGBE_DEV_STATS(dev);
379 for (i = 0; i < dev->data->nb_rx_queues; i++) {
380 /* Good Rx packet, include VF loopback */
381 TXGBE_UPDCNT32(TXGBE_QPRXPKT(i),
382 hw_stats->qp[i].last_vfgprc, hw_stats->qp[i].vfgprc);
384 /* Good Rx octets, include VF loopback */
385 TXGBE_UPDCNT36(TXGBE_QPRXOCTL(i),
386 hw_stats->qp[i].last_vfgorc, hw_stats->qp[i].vfgorc);
388 /* Rx Multicst Packet */
389 TXGBE_UPDCNT32(TXGBE_QPRXMPKT(i),
390 hw_stats->qp[i].last_vfmprc, hw_stats->qp[i].vfmprc);
394 for (i = 0; i < dev->data->nb_tx_queues; i++) {
395 /* Good Tx packet, include VF loopback */
396 TXGBE_UPDCNT32(TXGBE_QPTXPKT(i),
397 hw_stats->qp[i].last_vfgptc, hw_stats->qp[i].vfgptc);
399 /* Good Tx octets, include VF loopback */
400 TXGBE_UPDCNT36(TXGBE_QPTXOCTL(i),
401 hw_stats->qp[i].last_vfgotc, hw_stats->qp[i].vfgotc);
403 hw->offset_loaded = 0;
407 txgbevf_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
410 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
411 TXGBE_DEV_STATS(dev);
414 if (n < TXGBEVF_NB_XSTATS)
415 return TXGBEVF_NB_XSTATS;
417 txgbevf_update_stats(dev);
423 for (i = 0; i < TXGBEVF_NB_XSTATS; i++) {
425 xstats[i].value = *(uint64_t *)(((char *)hw_stats) +
426 rte_txgbevf_stats_strings[i].offset);
429 return TXGBEVF_NB_XSTATS;
433 txgbevf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
435 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
436 TXGBE_DEV_STATS(dev);
439 txgbevf_update_stats(dev);
449 for (i = 0; i < 8; i++) {
450 stats->ipackets += hw_stats->qp[i].vfgprc;
451 stats->ibytes += hw_stats->qp[i].vfgorc;
452 stats->opackets += hw_stats->qp[i].vfgptc;
453 stats->obytes += hw_stats->qp[i].vfgotc;
460 txgbevf_dev_stats_reset(struct rte_eth_dev *dev)
462 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
463 TXGBE_DEV_STATS(dev);
466 /* Sync HW register to the last stats */
467 txgbevf_dev_stats_get(dev, NULL);
469 /* reset HW current stats*/
470 for (i = 0; i < 8; i++) {
471 hw_stats->qp[i].vfgprc = 0;
472 hw_stats->qp[i].vfgorc = 0;
473 hw_stats->qp[i].vfgptc = 0;
474 hw_stats->qp[i].vfgotc = 0;
481 txgbevf_dev_info_get(struct rte_eth_dev *dev,
482 struct rte_eth_dev_info *dev_info)
484 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
485 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
487 dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;
488 dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;
489 dev_info->min_rx_bufsize = 1024;
490 dev_info->max_rx_pktlen = TXGBE_FRAME_SIZE_MAX;
491 dev_info->max_mac_addrs = hw->mac.num_rar_entries;
492 dev_info->max_hash_mac_addrs = TXGBE_VMDQ_NUM_UC_MAC;
493 dev_info->max_vfs = pci_dev->max_vfs;
494 dev_info->max_vmdq_pools = ETH_64_POOLS;
495 dev_info->rx_queue_offload_capa = txgbe_get_rx_queue_offloads(dev);
496 dev_info->rx_offload_capa = (txgbe_get_rx_port_offloads(dev) |
497 dev_info->rx_queue_offload_capa);
498 dev_info->tx_queue_offload_capa = txgbe_get_tx_queue_offloads(dev);
499 dev_info->tx_offload_capa = txgbe_get_tx_port_offloads(dev);
500 dev_info->hash_key_size = TXGBE_HKEY_MAX_INDEX * sizeof(uint32_t);
501 dev_info->reta_size = ETH_RSS_RETA_SIZE_128;
502 dev_info->flow_type_rss_offloads = TXGBE_RSS_OFFLOAD_ALL;
504 dev_info->default_rxconf = (struct rte_eth_rxconf) {
506 .pthresh = TXGBE_DEFAULT_RX_PTHRESH,
507 .hthresh = TXGBE_DEFAULT_RX_HTHRESH,
508 .wthresh = TXGBE_DEFAULT_RX_WTHRESH,
510 .rx_free_thresh = TXGBE_DEFAULT_RX_FREE_THRESH,
515 dev_info->default_txconf = (struct rte_eth_txconf) {
517 .pthresh = TXGBE_DEFAULT_TX_PTHRESH,
518 .hthresh = TXGBE_DEFAULT_TX_HTHRESH,
519 .wthresh = TXGBE_DEFAULT_TX_WTHRESH,
521 .tx_free_thresh = TXGBE_DEFAULT_TX_FREE_THRESH,
525 dev_info->rx_desc_lim = rx_desc_lim;
526 dev_info->tx_desc_lim = tx_desc_lim;
532 txgbevf_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
534 return txgbe_dev_link_update_share(dev, wait_to_complete);
538 * Virtual Function operations
541 txgbevf_intr_disable(struct rte_eth_dev *dev)
543 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
544 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
546 PMD_INIT_FUNC_TRACE();
548 /* Clear interrupt mask to stop from interrupts being generated */
549 wr32(hw, TXGBE_VFIMS, TXGBE_VFIMS_MASK);
553 /* Clear mask value. */
554 intr->mask_misc = TXGBE_VFIMS_MASK;
558 txgbevf_intr_enable(struct rte_eth_dev *dev)
560 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
561 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
563 PMD_INIT_FUNC_TRACE();
565 /* VF enable interrupt autoclean */
566 wr32(hw, TXGBE_VFIMC, TXGBE_VFIMC_MASK);
574 txgbevf_dev_configure(struct rte_eth_dev *dev)
576 struct rte_eth_conf *conf = &dev->data->dev_conf;
577 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);
579 PMD_INIT_LOG(DEBUG, "Configured Virtual Function port id: %d",
582 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
583 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
586 * VF has no ability to enable/disable HW CRC
587 * Keep the persistent behavior the same as Host PF
589 #ifndef RTE_LIBRTE_TXGBE_PF_DISABLE_STRIP_CRC
590 if (conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
591 PMD_INIT_LOG(NOTICE, "VF can't disable HW CRC Strip");
592 conf->rxmode.offloads &= ~DEV_RX_OFFLOAD_KEEP_CRC;
595 if (!(conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) {
596 PMD_INIT_LOG(NOTICE, "VF can't enable HW CRC Strip");
597 conf->rxmode.offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
602 * Initialize to TRUE. If any of Rx queues doesn't meet the bulk
603 * allocation or vector Rx preconditions we will reset it.
605 adapter->rx_bulk_alloc_allowed = true;
611 txgbevf_dev_start(struct rte_eth_dev *dev)
613 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
614 uint32_t intr_vector = 0;
615 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
616 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
620 PMD_INIT_FUNC_TRACE();
622 /* Stop the link setup handler before resetting the HW. */
623 rte_eal_alarm_cancel(txgbe_dev_setup_link_alarm_handler, dev);
625 err = hw->mac.reset_hw(hw);
627 PMD_INIT_LOG(ERR, "Unable to reset vf hardware (%d)", err);
630 hw->mac.get_link_status = true;
632 /* negotiate mailbox API version to use with the PF. */
633 txgbevf_negotiate_api(hw);
635 txgbevf_dev_tx_init(dev);
637 /* This can fail when allocating mbufs for descriptor rings */
638 err = txgbevf_dev_rx_init(dev);
641 * In this case, reuses the MAC address assigned by VF
644 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) {
645 PMD_INIT_LOG(ERR, "Unable to initialize RX hardware (%d)", err);
646 txgbe_dev_clear_queues(dev);
651 txgbevf_set_vfta_all(dev, 1);
654 mask = ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK |
655 ETH_VLAN_EXTEND_MASK;
656 err = txgbevf_vlan_offload_config(dev, mask);
658 PMD_INIT_LOG(ERR, "Unable to set VLAN offload (%d)", err);
659 txgbe_dev_clear_queues(dev);
663 txgbevf_dev_rxtx_start(dev);
665 /* check and configure queue intr-vector mapping */
666 if (rte_intr_cap_multiple(intr_handle) &&
667 dev->data->dev_conf.intr_conf.rxq) {
668 /* According to datasheet, only vector 0/1/2 can be used,
669 * now only one vector is used for Rx queue
672 if (rte_intr_efd_enable(intr_handle, intr_vector))
676 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
677 intr_handle->intr_vec =
678 rte_zmalloc("intr_vec",
679 dev->data->nb_rx_queues * sizeof(int), 0);
680 if (intr_handle->intr_vec == NULL) {
681 PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
682 " intr_vec", dev->data->nb_rx_queues);
686 txgbevf_configure_msix(dev);
688 /* When a VF port is bound to VFIO-PCI, only miscellaneous interrupt
689 * is mapped to VFIO vector 0 in eth_txgbevf_dev_init( ).
690 * If previous VFIO interrupt mapping setting in eth_txgbevf_dev_init( )
691 * is not cleared, it will fail when following rte_intr_enable( ) tries
692 * to map Rx queue interrupt to other VFIO vectors.
693 * So clear uio/vfio intr/evevnfd first to avoid failure.
695 rte_intr_disable(intr_handle);
697 rte_intr_enable(intr_handle);
699 /* Re-enable interrupt for VF */
700 txgbevf_intr_enable(dev);
703 * Update link status right before return, because it may
704 * start link configuration process in a separate thread.
706 txgbevf_dev_link_update(dev, 0);
708 hw->adapter_stopped = false;
714 txgbevf_dev_stop(struct rte_eth_dev *dev)
716 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
717 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);
718 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
719 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
721 if (hw->adapter_stopped)
724 PMD_INIT_FUNC_TRACE();
726 rte_eal_alarm_cancel(txgbe_dev_setup_link_alarm_handler, dev);
728 txgbevf_intr_disable(dev);
730 hw->adapter_stopped = 1;
734 * Clear what we set, but we still keep shadow_vfta to
735 * restore after device starts
737 txgbevf_set_vfta_all(dev, 0);
739 /* Clear stored conf */
740 dev->data->scattered_rx = 0;
742 txgbe_dev_clear_queues(dev);
744 /* Clean datapath event and queue/vec mapping */
745 rte_intr_efd_disable(intr_handle);
746 if (intr_handle->intr_vec != NULL) {
747 rte_free(intr_handle->intr_vec);
748 intr_handle->intr_vec = NULL;
751 adapter->rss_reta_updated = 0;
757 txgbevf_dev_close(struct rte_eth_dev *dev)
759 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
760 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
761 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
764 PMD_INIT_FUNC_TRACE();
765 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
768 hw->mac.reset_hw(hw);
770 ret = txgbevf_dev_stop(dev);
772 txgbe_dev_free_queues(dev);
775 * Remove the VF MAC address ro ensure
776 * that the VF traffic goes to the PF
777 * after stop, close and detach of the VF
779 txgbevf_remove_mac_addr(dev, 0);
781 dev->rx_pkt_burst = NULL;
782 dev->tx_pkt_burst = NULL;
784 /* Disable the interrupts for VF */
785 txgbevf_intr_disable(dev);
787 rte_free(dev->data->mac_addrs);
788 dev->data->mac_addrs = NULL;
790 rte_intr_disable(intr_handle);
791 rte_intr_callback_unregister(intr_handle,
792 txgbevf_dev_interrupt_handler, dev);
801 txgbevf_dev_reset(struct rte_eth_dev *dev)
805 ret = eth_txgbevf_dev_uninit(dev);
809 ret = eth_txgbevf_dev_init(dev);
814 static void txgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on)
816 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
817 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(dev);
818 int i = 0, j = 0, vfta = 0, mask = 1;
820 for (i = 0; i < TXGBE_VFTA_SIZE; i++) {
821 vfta = shadow_vfta->vfta[i];
824 for (j = 0; j < 32; j++) {
826 txgbe_set_vfta(hw, (i << 5) + j, 0,
835 txgbevf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
837 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
838 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(dev);
839 uint32_t vid_idx = 0;
840 uint32_t vid_bit = 0;
843 PMD_INIT_FUNC_TRACE();
845 /* vind is not used in VF driver, set to 0, check txgbe_set_vfta_vf */
846 ret = hw->mac.set_vfta(hw, vlan_id, 0, !!on, false);
848 PMD_INIT_LOG(ERR, "Unable to set VF vlan");
851 vid_idx = (uint32_t)((vlan_id >> 5) & 0x7F);
852 vid_bit = (uint32_t)(1 << (vlan_id & 0x1F));
854 /* Save what we set and restore it after device reset */
856 shadow_vfta->vfta[vid_idx] |= vid_bit;
858 shadow_vfta->vfta[vid_idx] &= ~vid_bit;
864 txgbevf_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
866 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
869 PMD_INIT_FUNC_TRACE();
871 if (queue >= hw->mac.max_rx_queues)
874 ctrl = rd32(hw, TXGBE_RXCFG(queue));
875 txgbe_dev_save_rx_queue(hw, queue);
877 ctrl |= TXGBE_RXCFG_VLAN;
879 ctrl &= ~TXGBE_RXCFG_VLAN;
880 wr32(hw, TXGBE_RXCFG(queue), 0);
882 txgbe_dev_store_rx_queue(hw, queue);
883 wr32m(hw, TXGBE_RXCFG(queue),
884 TXGBE_RXCFG_VLAN | TXGBE_RXCFG_ENA, ctrl);
886 txgbe_vlan_hw_strip_bitmap_set(dev, queue, on);
890 txgbevf_vlan_offload_config(struct rte_eth_dev *dev, int mask)
892 struct txgbe_rx_queue *rxq;
896 /* VF function only support hw strip feature, others are not support */
897 if (mask & ETH_VLAN_STRIP_MASK) {
898 for (i = 0; i < dev->data->nb_rx_queues; i++) {
899 rxq = dev->data->rx_queues[i];
900 on = !!(rxq->offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
901 txgbevf_vlan_strip_queue_set(dev, i, on);
909 txgbevf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
911 txgbe_config_vlan_strip_on_all_queues(dev, mask);
913 txgbevf_vlan_offload_config(dev, mask);
919 txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
921 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
922 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
923 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
924 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
925 uint32_t vec = TXGBE_MISC_VEC_ID;
927 if (rte_intr_allow_others(intr_handle))
928 vec = TXGBE_RX_VEC_START;
929 intr->mask_misc &= ~(1 << vec);
930 RTE_SET_USED(queue_id);
931 wr32(hw, TXGBE_VFIMC, ~intr->mask_misc);
933 rte_intr_enable(intr_handle);
939 txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
941 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
942 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
943 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
944 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
945 uint32_t vec = TXGBE_MISC_VEC_ID;
947 if (rte_intr_allow_others(intr_handle))
948 vec = TXGBE_RX_VEC_START;
949 intr->mask_misc |= (1 << vec);
950 RTE_SET_USED(queue_id);
951 wr32(hw, TXGBE_VFIMS, intr->mask_misc);
957 txgbevf_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
958 uint8_t queue, uint8_t msix_vector)
962 if (direction == -1) {
964 msix_vector |= TXGBE_VFIVAR_VLD;
965 tmp = rd32(hw, TXGBE_VFIVARMISC);
968 wr32(hw, TXGBE_VFIVARMISC, tmp);
971 /* Workround for ICR lost */
972 idx = ((16 * (queue & 1)) + (8 * direction));
973 tmp = rd32(hw, TXGBE_VFIVAR(queue >> 1));
974 tmp &= ~(0xFF << idx);
975 tmp |= (msix_vector << idx);
976 wr32(hw, TXGBE_VFIVAR(queue >> 1), tmp);
981 txgbevf_configure_msix(struct rte_eth_dev *dev)
983 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
984 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
985 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
987 uint32_t vector_idx = TXGBE_MISC_VEC_ID;
988 uint32_t base = TXGBE_MISC_VEC_ID;
990 /* Configure VF other cause ivar */
991 txgbevf_set_ivar_map(hw, -1, 1, vector_idx);
993 /* won't configure msix register if no mapping is done
994 * between intr vector and event fd.
996 if (!rte_intr_dp_is_en(intr_handle))
999 if (rte_intr_allow_others(intr_handle)) {
1000 base = TXGBE_RX_VEC_START;
1001 vector_idx = TXGBE_RX_VEC_START;
1004 /* Configure all RX queues of VF */
1005 for (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) {
1006 /* Force all queue use vector 0,
1007 * as TXGBE_VF_MAXMSIVECOTR = 1
1009 txgbevf_set_ivar_map(hw, 0, q_idx, vector_idx);
1010 intr_handle->intr_vec[q_idx] = vector_idx;
1011 if (vector_idx < base + intr_handle->nb_efd - 1)
1015 /* As RX queue setting above show, all queues use the vector 0.
1016 * Set only the ITR value of TXGBE_MISC_VEC_ID.
1018 wr32(hw, TXGBE_ITR(TXGBE_MISC_VEC_ID),
1019 TXGBE_ITR_IVAL(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT)
1024 txgbevf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
1025 __rte_unused uint32_t index,
1026 __rte_unused uint32_t pool)
1028 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1032 * On a VF, adding again the same MAC addr is not an idempotent
1033 * operation. Trap this case to avoid exhausting the [very limited]
1034 * set of PF resources used to store VF MAC addresses.
1036 if (memcmp(hw->mac.perm_addr, mac_addr,
1037 sizeof(struct rte_ether_addr)) == 0)
1039 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes);
1041 PMD_DRV_LOG(ERR, "Unable to add MAC address "
1042 "%02x:%02x:%02x:%02x:%02x:%02x - err=%d",
1043 mac_addr->addr_bytes[0],
1044 mac_addr->addr_bytes[1],
1045 mac_addr->addr_bytes[2],
1046 mac_addr->addr_bytes[3],
1047 mac_addr->addr_bytes[4],
1048 mac_addr->addr_bytes[5],
1054 txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index)
1056 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1057 struct rte_ether_addr *perm_addr =
1058 (struct rte_ether_addr *)hw->mac.perm_addr;
1059 struct rte_ether_addr *mac_addr;
1064 * The TXGBE_VF_SET_MACVLAN command of the txgbe-pf driver does
1065 * not support the deletion of a given MAC address.
1066 * Instead, it imposes to delete all MAC addresses, then to add again
1067 * all MAC addresses with the exception of the one to be deleted.
1069 (void)txgbevf_set_uc_addr_vf(hw, 0, NULL);
1072 * Add again all MAC addresses, with the exception of the deleted one
1073 * and of the permanent MAC address.
1075 for (i = 0, mac_addr = dev->data->mac_addrs;
1076 i < hw->mac.num_rar_entries; i++, mac_addr++) {
1077 /* Skip the deleted MAC address */
1080 /* Skip NULL MAC addresses */
1081 if (rte_is_zero_ether_addr(mac_addr))
1083 /* Skip the permanent MAC address */
1084 if (memcmp(perm_addr, mac_addr,
1085 sizeof(struct rte_ether_addr)) == 0)
1087 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes);
1090 "Adding again MAC address "
1091 "%02x:%02x:%02x:%02x:%02x:%02x failed "
1093 mac_addr->addr_bytes[0],
1094 mac_addr->addr_bytes[1],
1095 mac_addr->addr_bytes[2],
1096 mac_addr->addr_bytes[3],
1097 mac_addr->addr_bytes[4],
1098 mac_addr->addr_bytes[5],
1104 txgbevf_set_default_mac_addr(struct rte_eth_dev *dev,
1105 struct rte_ether_addr *addr)
1107 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1109 hw->mac.set_rar(hw, 0, (void *)addr, 0, 0);
1115 txgbevf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1117 struct txgbe_hw *hw;
1118 uint32_t max_frame = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1119 struct rte_eth_dev_data *dev_data = dev->data;
1121 hw = TXGBE_DEV_HW(dev);
1123 if (mtu < RTE_ETHER_MIN_MTU ||
1124 max_frame > RTE_ETHER_MAX_JUMBO_FRAME_LEN)
1127 /* If device is started, refuse mtu that requires the support of
1128 * scattered packets when this feature has not been enabled before.
1130 if (dev_data->dev_started && !dev_data->scattered_rx &&
1131 (max_frame + 2 * TXGBE_VLAN_TAG_SIZE >
1132 dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {
1133 PMD_INIT_LOG(ERR, "Stop port first.");
1138 * When supported by the underlying PF driver, use the TXGBE_VF_SET_MTU
1139 * request of the version 2.0 of the mailbox API.
1140 * For now, use the TXGBE_VF_SET_LPE request of the version 1.0
1141 * of the mailbox API.
1143 if (txgbevf_rlpml_set_vf(hw, max_frame))
1146 /* update max frame size */
1147 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame;
1152 txgbevf_get_reg_length(struct rte_eth_dev *dev __rte_unused)
1156 const struct reg_info *reg_group;
1158 while ((reg_group = txgbevf_regs[g_ind++]))
1159 count += txgbe_regs_group_count(reg_group);
1165 txgbevf_get_regs(struct rte_eth_dev *dev,
1166 struct rte_dev_reg_info *regs)
1168 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1169 uint32_t *data = regs->data;
1172 const struct reg_info *reg_group;
1175 regs->length = txgbevf_get_reg_length(dev);
1176 regs->width = sizeof(uint32_t);
1180 /* Support only full register dump */
1181 if (regs->length == 0 ||
1182 regs->length == (uint32_t)txgbevf_get_reg_length(dev)) {
1183 regs->version = hw->mac.type << 24 | hw->revision_id << 16 |
1185 while ((reg_group = txgbevf_regs[g_ind++]))
1186 count += txgbe_read_regs_group(dev, &data[count],
1195 txgbevf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1197 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1200 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_PROMISC)) {
1204 case TXGBE_ERR_FEATURE_NOT_SUPPORTED:
1216 txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1218 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1221 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_NONE)) {
1225 case TXGBE_ERR_FEATURE_NOT_SUPPORTED:
1237 txgbevf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1239 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1242 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_ALLMULTI)) {
1246 case TXGBE_ERR_FEATURE_NOT_SUPPORTED:
1258 txgbevf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1260 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1263 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_MULTI)) {
1267 case TXGBE_ERR_FEATURE_NOT_SUPPORTED:
1278 static void txgbevf_mbx_process(struct rte_eth_dev *dev)
1280 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1283 /* peek the message first */
1284 in_msg = rd32(hw, TXGBE_VFMBX);
1286 /* PF reset VF event */
1287 if (in_msg == TXGBE_PF_CONTROL_MSG) {
1288 /* dummy mbx read to ack pf */
1289 if (txgbe_read_mbx(hw, &in_msg, 1, 0))
1291 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1297 txgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev)
1300 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
1301 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
1302 txgbevf_intr_disable(dev);
1304 /* read-on-clear nic registers here */
1305 eicr = rd32(hw, TXGBE_VFICR);
1308 /* only one misc vector supported - mailbox */
1309 eicr &= TXGBE_VFICR_MASK;
1310 /* Workround for ICR lost */
1311 intr->flags |= TXGBE_FLAG_MAILBOX;
1317 txgbevf_dev_interrupt_action(struct rte_eth_dev *dev)
1319 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
1321 if (intr->flags & TXGBE_FLAG_MAILBOX) {
1322 txgbevf_mbx_process(dev);
1323 intr->flags &= ~TXGBE_FLAG_MAILBOX;
1326 txgbevf_intr_enable(dev);
1332 txgbevf_dev_interrupt_handler(void *param)
1334 struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1336 txgbevf_dev_interrupt_get_status(dev);
1337 txgbevf_dev_interrupt_action(dev);
1341 * dev_ops for virtual function, bare necessities for basic vf
1342 * operation have been implemented
1344 static const struct eth_dev_ops txgbevf_eth_dev_ops = {
1345 .dev_configure = txgbevf_dev_configure,
1346 .dev_start = txgbevf_dev_start,
1347 .dev_stop = txgbevf_dev_stop,
1348 .link_update = txgbevf_dev_link_update,
1349 .stats_get = txgbevf_dev_stats_get,
1350 .xstats_get = txgbevf_dev_xstats_get,
1351 .stats_reset = txgbevf_dev_stats_reset,
1352 .xstats_reset = txgbevf_dev_stats_reset,
1353 .xstats_get_names = txgbevf_dev_xstats_get_names,
1354 .dev_close = txgbevf_dev_close,
1355 .dev_reset = txgbevf_dev_reset,
1356 .promiscuous_enable = txgbevf_dev_promiscuous_enable,
1357 .promiscuous_disable = txgbevf_dev_promiscuous_disable,
1358 .allmulticast_enable = txgbevf_dev_allmulticast_enable,
1359 .allmulticast_disable = txgbevf_dev_allmulticast_disable,
1360 .dev_infos_get = txgbevf_dev_info_get,
1361 .dev_supported_ptypes_get = txgbe_dev_supported_ptypes_get,
1362 .mtu_set = txgbevf_dev_set_mtu,
1363 .vlan_filter_set = txgbevf_vlan_filter_set,
1364 .vlan_strip_queue_set = txgbevf_vlan_strip_queue_set,
1365 .vlan_offload_set = txgbevf_vlan_offload_set,
1366 .rx_queue_setup = txgbe_dev_rx_queue_setup,
1367 .rx_queue_release = txgbe_dev_rx_queue_release,
1368 .tx_queue_setup = txgbe_dev_tx_queue_setup,
1369 .tx_queue_release = txgbe_dev_tx_queue_release,
1370 .rx_queue_intr_enable = txgbevf_dev_rx_queue_intr_enable,
1371 .rx_queue_intr_disable = txgbevf_dev_rx_queue_intr_disable,
1372 .mac_addr_add = txgbevf_add_mac_addr,
1373 .mac_addr_remove = txgbevf_remove_mac_addr,
1374 .set_mc_addr_list = txgbe_dev_set_mc_addr_list,
1375 .rxq_info_get = txgbe_rxq_info_get,
1376 .txq_info_get = txgbe_txq_info_get,
1377 .mac_addr_set = txgbevf_set_default_mac_addr,
1378 .get_reg = txgbevf_get_regs,
1379 .reta_update = txgbe_dev_rss_reta_update,
1380 .reta_query = txgbe_dev_rss_reta_query,
1381 .rss_hash_update = txgbe_dev_rss_hash_update,
1382 .rss_hash_conf_get = txgbe_dev_rss_hash_conf_get,
1383 .tx_done_cleanup = txgbe_dev_tx_done_cleanup,
1386 RTE_PMD_REGISTER_PCI(net_txgbe_vf, rte_txgbevf_pmd);
1387 RTE_PMD_REGISTER_PCI_TABLE(net_txgbe_vf, pci_id_txgbevf_map);
1388 RTE_PMD_REGISTER_KMOD_DEP(net_txgbe_vf, "* igb_uio | vfio-pci");