1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020
11 #include <ethdev_pci.h>
13 #include "txgbe_logs.h"
14 #include "base/txgbe.h"
15 #include "txgbe_ethdev.h"
16 #include "txgbe_rxtx.h"
18 static int txgbevf_dev_xstats_get(struct rte_eth_dev *dev,
19 struct rte_eth_xstat *xstats, unsigned int n);
20 static int txgbevf_dev_info_get(struct rte_eth_dev *dev,
21 struct rte_eth_dev_info *dev_info);
22 static int txgbevf_dev_configure(struct rte_eth_dev *dev);
23 static int txgbevf_dev_link_update(struct rte_eth_dev *dev,
24 int wait_to_complete);
25 static int txgbevf_dev_close(struct rte_eth_dev *dev);
26 static void txgbevf_intr_disable(struct rte_eth_dev *dev);
27 static void txgbevf_intr_enable(struct rte_eth_dev *dev);
28 static int txgbevf_dev_stats_reset(struct rte_eth_dev *dev);
29 static void txgbevf_configure_msix(struct rte_eth_dev *dev);
30 static void txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index);
31 static void txgbevf_dev_interrupt_handler(void *param);
34 * The set of PCI devices this driver supports (for VF)
36 static const struct rte_pci_id pci_id_txgbevf_map[] = {
37 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_RAPTOR_VF) },
38 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_RAPTOR_VF_HV) },
39 { .vendor_id = 0, /* sentinel */ },
42 static const struct rte_eth_desc_lim rx_desc_lim = {
43 .nb_max = TXGBE_RING_DESC_MAX,
44 .nb_min = TXGBE_RING_DESC_MIN,
45 .nb_align = TXGBE_RXD_ALIGN,
48 static const struct rte_eth_desc_lim tx_desc_lim = {
49 .nb_max = TXGBE_RING_DESC_MAX,
50 .nb_min = TXGBE_RING_DESC_MIN,
51 .nb_align = TXGBE_TXD_ALIGN,
52 .nb_seg_max = TXGBE_TX_MAX_SEG,
53 .nb_mtu_seg_max = TXGBE_TX_MAX_SEG,
56 static const struct eth_dev_ops txgbevf_eth_dev_ops;
58 static const struct rte_txgbe_xstats_name_off rte_txgbevf_stats_strings[] = {
59 {"rx_multicast_packets_0",
60 offsetof(struct txgbevf_hw_stats, qp[0].vfmprc)},
61 {"rx_multicast_packets_1",
62 offsetof(struct txgbevf_hw_stats, qp[1].vfmprc)},
63 {"rx_multicast_packets_2",
64 offsetof(struct txgbevf_hw_stats, qp[2].vfmprc)},
65 {"rx_multicast_packets_3",
66 offsetof(struct txgbevf_hw_stats, qp[3].vfmprc)},
67 {"rx_multicast_packets_4",
68 offsetof(struct txgbevf_hw_stats, qp[4].vfmprc)},
69 {"rx_multicast_packets_5",
70 offsetof(struct txgbevf_hw_stats, qp[5].vfmprc)},
71 {"rx_multicast_packets_6",
72 offsetof(struct txgbevf_hw_stats, qp[6].vfmprc)},
73 {"rx_multicast_packets_7",
74 offsetof(struct txgbevf_hw_stats, qp[7].vfmprc)}
77 #define TXGBEVF_NB_XSTATS (sizeof(rte_txgbevf_stats_strings) / \
78 sizeof(rte_txgbevf_stats_strings[0]))
81 * Negotiate mailbox API version with the PF.
82 * After reset API version is always set to the basic one (txgbe_mbox_api_10).
83 * Then we try to negotiate starting with the most recent one.
84 * If all negotiation attempts fail, then we will proceed with
85 * the default one (txgbe_mbox_api_10).
88 txgbevf_negotiate_api(struct txgbe_hw *hw)
92 /* start with highest supported, proceed down */
93 static const int sup_ver[] = {
100 for (i = 0; i < ARRAY_SIZE(sup_ver); i++) {
101 if (txgbevf_negotiate_api_version(hw, sup_ver[i]) == 0)
107 generate_random_mac_addr(struct rte_ether_addr *mac_addr)
111 /* Set Organizationally Unique Identifier (OUI) prefix. */
112 mac_addr->addr_bytes[0] = 0x00;
113 mac_addr->addr_bytes[1] = 0x09;
114 mac_addr->addr_bytes[2] = 0xC0;
115 /* Force indication of locally assigned MAC address. */
116 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
117 /* Generate the last 3 bytes of the MAC address with a random number. */
119 memcpy(&mac_addr->addr_bytes[3], &random, 3);
123 * Virtual Function device init
126 eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev)
130 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
131 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
132 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
133 struct rte_ether_addr *perm_addr =
134 (struct rte_ether_addr *)hw->mac.perm_addr;
136 PMD_INIT_FUNC_TRACE();
138 eth_dev->dev_ops = &txgbevf_eth_dev_ops;
139 eth_dev->rx_descriptor_status = txgbe_dev_rx_descriptor_status;
140 eth_dev->tx_descriptor_status = txgbe_dev_tx_descriptor_status;
141 eth_dev->rx_pkt_burst = &txgbe_recv_pkts;
142 eth_dev->tx_pkt_burst = &txgbe_xmit_pkts;
144 /* for secondary processes, we don't initialise any further as primary
145 * has already done this work. Only check we don't need a different
148 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
149 struct txgbe_tx_queue *txq;
150 uint16_t nb_tx_queues = eth_dev->data->nb_tx_queues;
151 /* TX queue function in primary, set by last queue initialized
152 * Tx queue may not initialized by primary process
154 if (eth_dev->data->tx_queues) {
155 txq = eth_dev->data->tx_queues[nb_tx_queues - 1];
156 txgbe_set_tx_function(eth_dev, txq);
158 /* Use default TX function if we get here */
160 "No TX queues configured yet. Using default TX function.");
163 txgbe_set_rx_function(eth_dev);
168 rte_eth_copy_pci_info(eth_dev, pci_dev);
170 hw->device_id = pci_dev->id.device_id;
171 hw->vendor_id = pci_dev->id.vendor_id;
172 hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
173 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
174 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
176 /* Initialize the shared code (base driver) */
177 err = txgbe_init_shared_code(hw);
180 "Shared code init failed for txgbevf: %d", err);
184 /* init_mailbox_params */
185 hw->mbx.init_params(hw);
187 /* Reset the hw statistics */
188 txgbevf_dev_stats_reset(eth_dev);
190 /* Disable the interrupts for VF */
191 txgbevf_intr_disable(eth_dev);
193 hw->mac.num_rar_entries = 128; /* The MAX of the underlying PF */
194 err = hw->mac.reset_hw(hw);
197 * The VF reset operation returns the TXGBE_ERR_INVALID_MAC_ADDR when
198 * the underlying PF driver has not assigned a MAC address to the VF.
199 * In this case, assign a random MAC address.
201 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) {
202 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err);
204 * This error code will be propagated to the app by
205 * rte_eth_dev_reset, so use a public error code rather than
206 * the internal-only TXGBE_ERR_RESET_FAILED
211 /* negotiate mailbox API version to use with the PF. */
212 txgbevf_negotiate_api(hw);
214 /* Get Rx/Tx queue count via mailbox, which is ready after reset_hw */
215 txgbevf_get_queues(hw, &tcs, &tc);
217 /* Allocate memory for storing MAC addresses */
218 eth_dev->data->mac_addrs = rte_zmalloc("txgbevf", RTE_ETHER_ADDR_LEN *
219 hw->mac.num_rar_entries, 0);
220 if (eth_dev->data->mac_addrs == NULL) {
222 "Failed to allocate %u bytes needed to store "
224 RTE_ETHER_ADDR_LEN * hw->mac.num_rar_entries);
228 /* Generate a random MAC address, if none was assigned by PF. */
229 if (rte_is_zero_ether_addr(perm_addr)) {
230 generate_random_mac_addr(perm_addr);
231 err = txgbe_set_rar_vf(hw, 1, perm_addr->addr_bytes, 0, 1);
233 rte_free(eth_dev->data->mac_addrs);
234 eth_dev->data->mac_addrs = NULL;
237 PMD_INIT_LOG(INFO, "\tVF MAC address not assigned by Host PF");
238 PMD_INIT_LOG(INFO, "\tAssign randomly generated MAC address "
239 "%02x:%02x:%02x:%02x:%02x:%02x",
240 perm_addr->addr_bytes[0],
241 perm_addr->addr_bytes[1],
242 perm_addr->addr_bytes[2],
243 perm_addr->addr_bytes[3],
244 perm_addr->addr_bytes[4],
245 perm_addr->addr_bytes[5]);
248 /* Copy the permanent MAC address */
249 rte_ether_addr_copy(perm_addr, ð_dev->data->mac_addrs[0]);
251 /* reset the hardware with the new settings */
252 err = hw->mac.start_hw(hw);
254 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err);
258 rte_intr_callback_register(intr_handle,
259 txgbevf_dev_interrupt_handler, eth_dev);
260 rte_intr_enable(intr_handle);
261 txgbevf_intr_enable(eth_dev);
263 PMD_INIT_LOG(DEBUG, "port %d vendorID=0x%x deviceID=0x%x mac.type=%s",
264 eth_dev->data->port_id, pci_dev->id.vendor_id,
265 pci_dev->id.device_id, "txgbe_mac_raptor_vf");
270 /* Virtual Function device uninit */
272 eth_txgbevf_dev_uninit(struct rte_eth_dev *eth_dev)
274 PMD_INIT_FUNC_TRACE();
276 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
279 txgbevf_dev_close(eth_dev);
284 static int eth_txgbevf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
285 struct rte_pci_device *pci_dev)
287 return rte_eth_dev_pci_generic_probe(pci_dev,
288 sizeof(struct txgbe_adapter), eth_txgbevf_dev_init);
291 static int eth_txgbevf_pci_remove(struct rte_pci_device *pci_dev)
293 return rte_eth_dev_pci_generic_remove(pci_dev, eth_txgbevf_dev_uninit);
297 * virtual function driver struct
299 static struct rte_pci_driver rte_txgbevf_pmd = {
300 .id_table = pci_id_txgbevf_map,
301 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
302 .probe = eth_txgbevf_pci_probe,
303 .remove = eth_txgbevf_pci_remove,
306 static int txgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
307 struct rte_eth_xstat_name *xstats_names, unsigned int limit)
311 if (limit < TXGBEVF_NB_XSTATS && xstats_names != NULL)
314 if (xstats_names != NULL)
315 for (i = 0; i < TXGBEVF_NB_XSTATS; i++)
316 snprintf(xstats_names[i].name,
317 sizeof(xstats_names[i].name),
318 "%s", rte_txgbevf_stats_strings[i].name);
319 return TXGBEVF_NB_XSTATS;
323 txgbevf_update_stats(struct rte_eth_dev *dev)
325 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
326 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
327 TXGBE_DEV_STATS(dev);
330 for (i = 0; i < dev->data->nb_rx_queues; i++) {
331 /* Good Rx packet, include VF loopback */
332 TXGBE_UPDCNT32(TXGBE_QPRXPKT(i),
333 hw_stats->qp[i].last_vfgprc, hw_stats->qp[i].vfgprc);
335 /* Good Rx octets, include VF loopback */
336 TXGBE_UPDCNT36(TXGBE_QPRXOCTL(i),
337 hw_stats->qp[i].last_vfgorc, hw_stats->qp[i].vfgorc);
339 /* Rx Multicst Packet */
340 TXGBE_UPDCNT32(TXGBE_QPRXMPKT(i),
341 hw_stats->qp[i].last_vfmprc, hw_stats->qp[i].vfmprc);
345 for (i = 0; i < dev->data->nb_tx_queues; i++) {
346 /* Good Tx packet, include VF loopback */
347 TXGBE_UPDCNT32(TXGBE_QPTXPKT(i),
348 hw_stats->qp[i].last_vfgptc, hw_stats->qp[i].vfgptc);
350 /* Good Tx octets, include VF loopback */
351 TXGBE_UPDCNT36(TXGBE_QPTXOCTL(i),
352 hw_stats->qp[i].last_vfgotc, hw_stats->qp[i].vfgotc);
354 hw->offset_loaded = 0;
358 txgbevf_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
361 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
362 TXGBE_DEV_STATS(dev);
365 if (n < TXGBEVF_NB_XSTATS)
366 return TXGBEVF_NB_XSTATS;
368 txgbevf_update_stats(dev);
374 for (i = 0; i < TXGBEVF_NB_XSTATS; i++) {
376 xstats[i].value = *(uint64_t *)(((char *)hw_stats) +
377 rte_txgbevf_stats_strings[i].offset);
380 return TXGBEVF_NB_XSTATS;
384 txgbevf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
386 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
387 TXGBE_DEV_STATS(dev);
390 txgbevf_update_stats(dev);
400 for (i = 0; i < 8; i++) {
401 stats->ipackets += hw_stats->qp[i].vfgprc;
402 stats->ibytes += hw_stats->qp[i].vfgorc;
403 stats->opackets += hw_stats->qp[i].vfgptc;
404 stats->obytes += hw_stats->qp[i].vfgotc;
411 txgbevf_dev_stats_reset(struct rte_eth_dev *dev)
413 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *)
414 TXGBE_DEV_STATS(dev);
417 /* Sync HW register to the last stats */
418 txgbevf_dev_stats_get(dev, NULL);
420 /* reset HW current stats*/
421 for (i = 0; i < 8; i++) {
422 hw_stats->qp[i].vfgprc = 0;
423 hw_stats->qp[i].vfgorc = 0;
424 hw_stats->qp[i].vfgptc = 0;
425 hw_stats->qp[i].vfgotc = 0;
432 txgbevf_dev_info_get(struct rte_eth_dev *dev,
433 struct rte_eth_dev_info *dev_info)
435 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
436 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
438 dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;
439 dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;
440 dev_info->min_rx_bufsize = 1024;
441 dev_info->max_rx_pktlen = TXGBE_FRAME_SIZE_MAX;
442 dev_info->max_mac_addrs = hw->mac.num_rar_entries;
443 dev_info->max_hash_mac_addrs = TXGBE_VMDQ_NUM_UC_MAC;
444 dev_info->max_vfs = pci_dev->max_vfs;
445 dev_info->max_vmdq_pools = ETH_64_POOLS;
446 dev_info->rx_queue_offload_capa = txgbe_get_rx_queue_offloads(dev);
447 dev_info->rx_offload_capa = (txgbe_get_rx_port_offloads(dev) |
448 dev_info->rx_queue_offload_capa);
449 dev_info->tx_queue_offload_capa = txgbe_get_tx_queue_offloads(dev);
450 dev_info->tx_offload_capa = txgbe_get_tx_port_offloads(dev);
451 dev_info->hash_key_size = TXGBE_HKEY_MAX_INDEX * sizeof(uint32_t);
452 dev_info->reta_size = ETH_RSS_RETA_SIZE_128;
453 dev_info->flow_type_rss_offloads = TXGBE_RSS_OFFLOAD_ALL;
455 dev_info->default_rxconf = (struct rte_eth_rxconf) {
457 .pthresh = TXGBE_DEFAULT_RX_PTHRESH,
458 .hthresh = TXGBE_DEFAULT_RX_HTHRESH,
459 .wthresh = TXGBE_DEFAULT_RX_WTHRESH,
461 .rx_free_thresh = TXGBE_DEFAULT_RX_FREE_THRESH,
466 dev_info->default_txconf = (struct rte_eth_txconf) {
468 .pthresh = TXGBE_DEFAULT_TX_PTHRESH,
469 .hthresh = TXGBE_DEFAULT_TX_HTHRESH,
470 .wthresh = TXGBE_DEFAULT_TX_WTHRESH,
472 .tx_free_thresh = TXGBE_DEFAULT_TX_FREE_THRESH,
476 dev_info->rx_desc_lim = rx_desc_lim;
477 dev_info->tx_desc_lim = tx_desc_lim;
483 txgbevf_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
485 return txgbe_dev_link_update_share(dev, wait_to_complete);
489 * Virtual Function operations
492 txgbevf_intr_disable(struct rte_eth_dev *dev)
494 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
495 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
497 PMD_INIT_FUNC_TRACE();
499 /* Clear interrupt mask to stop from interrupts being generated */
500 wr32(hw, TXGBE_VFIMS, TXGBE_VFIMS_MASK);
504 /* Clear mask value. */
505 intr->mask_misc = TXGBE_VFIMS_MASK;
509 txgbevf_intr_enable(struct rte_eth_dev *dev)
511 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
512 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
514 PMD_INIT_FUNC_TRACE();
516 /* VF enable interrupt autoclean */
517 wr32(hw, TXGBE_VFIMC, TXGBE_VFIMC_MASK);
525 txgbevf_dev_configure(struct rte_eth_dev *dev)
527 struct rte_eth_conf *conf = &dev->data->dev_conf;
528 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);
530 PMD_INIT_LOG(DEBUG, "Configured Virtual Function port id: %d",
533 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
534 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
537 * VF has no ability to enable/disable HW CRC
538 * Keep the persistent behavior the same as Host PF
540 #ifndef RTE_LIBRTE_TXGBE_PF_DISABLE_STRIP_CRC
541 if (conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
542 PMD_INIT_LOG(NOTICE, "VF can't disable HW CRC Strip");
543 conf->rxmode.offloads &= ~DEV_RX_OFFLOAD_KEEP_CRC;
546 if (!(conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) {
547 PMD_INIT_LOG(NOTICE, "VF can't enable HW CRC Strip");
548 conf->rxmode.offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
553 * Initialize to TRUE. If any of Rx queues doesn't meet the bulk
554 * allocation or vector Rx preconditions we will reset it.
556 adapter->rx_bulk_alloc_allowed = true;
562 txgbevf_dev_close(struct rte_eth_dev *dev)
564 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
565 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
566 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
567 PMD_INIT_FUNC_TRACE();
568 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
571 hw->mac.reset_hw(hw);
573 txgbe_dev_free_queues(dev);
576 * Remove the VF MAC address ro ensure
577 * that the VF traffic goes to the PF
578 * after stop, close and detach of the VF
580 txgbevf_remove_mac_addr(dev, 0);
582 dev->rx_pkt_burst = NULL;
583 dev->tx_pkt_burst = NULL;
585 /* Disable the interrupts for VF */
586 txgbevf_intr_disable(dev);
588 rte_free(dev->data->mac_addrs);
589 dev->data->mac_addrs = NULL;
591 rte_intr_disable(intr_handle);
592 rte_intr_callback_unregister(intr_handle,
593 txgbevf_dev_interrupt_handler, dev);
599 txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
601 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
602 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
603 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
604 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
605 uint32_t vec = TXGBE_MISC_VEC_ID;
607 if (rte_intr_allow_others(intr_handle))
608 vec = TXGBE_RX_VEC_START;
609 intr->mask_misc &= ~(1 << vec);
610 RTE_SET_USED(queue_id);
611 wr32(hw, TXGBE_VFIMC, ~intr->mask_misc);
613 rte_intr_enable(intr_handle);
619 txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
621 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
622 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
623 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
624 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
625 uint32_t vec = TXGBE_MISC_VEC_ID;
627 if (rte_intr_allow_others(intr_handle))
628 vec = TXGBE_RX_VEC_START;
629 intr->mask_misc |= (1 << vec);
630 RTE_SET_USED(queue_id);
631 wr32(hw, TXGBE_VFIMS, intr->mask_misc);
637 txgbevf_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
638 uint8_t queue, uint8_t msix_vector)
642 if (direction == -1) {
644 msix_vector |= TXGBE_VFIVAR_VLD;
645 tmp = rd32(hw, TXGBE_VFIVARMISC);
648 wr32(hw, TXGBE_VFIVARMISC, tmp);
651 /* Workround for ICR lost */
652 idx = ((16 * (queue & 1)) + (8 * direction));
653 tmp = rd32(hw, TXGBE_VFIVAR(queue >> 1));
654 tmp &= ~(0xFF << idx);
655 tmp |= (msix_vector << idx);
656 wr32(hw, TXGBE_VFIVAR(queue >> 1), tmp);
661 txgbevf_configure_msix(struct rte_eth_dev *dev)
663 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
664 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
665 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
667 uint32_t vector_idx = TXGBE_MISC_VEC_ID;
668 uint32_t base = TXGBE_MISC_VEC_ID;
670 /* Configure VF other cause ivar */
671 txgbevf_set_ivar_map(hw, -1, 1, vector_idx);
673 /* won't configure msix register if no mapping is done
674 * between intr vector and event fd.
676 if (!rte_intr_dp_is_en(intr_handle))
679 if (rte_intr_allow_others(intr_handle)) {
680 base = TXGBE_RX_VEC_START;
681 vector_idx = TXGBE_RX_VEC_START;
684 /* Configure all RX queues of VF */
685 for (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) {
686 /* Force all queue use vector 0,
687 * as TXGBE_VF_MAXMSIVECOTR = 1
689 txgbevf_set_ivar_map(hw, 0, q_idx, vector_idx);
690 intr_handle->intr_vec[q_idx] = vector_idx;
691 if (vector_idx < base + intr_handle->nb_efd - 1)
695 /* As RX queue setting above show, all queues use the vector 0.
696 * Set only the ITR value of TXGBE_MISC_VEC_ID.
698 wr32(hw, TXGBE_ITR(TXGBE_MISC_VEC_ID),
699 TXGBE_ITR_IVAL(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT)
704 txgbevf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
705 __rte_unused uint32_t index,
706 __rte_unused uint32_t pool)
708 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
712 * On a VF, adding again the same MAC addr is not an idempotent
713 * operation. Trap this case to avoid exhausting the [very limited]
714 * set of PF resources used to store VF MAC addresses.
716 if (memcmp(hw->mac.perm_addr, mac_addr,
717 sizeof(struct rte_ether_addr)) == 0)
719 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes);
721 PMD_DRV_LOG(ERR, "Unable to add MAC address "
722 "%02x:%02x:%02x:%02x:%02x:%02x - err=%d",
723 mac_addr->addr_bytes[0],
724 mac_addr->addr_bytes[1],
725 mac_addr->addr_bytes[2],
726 mac_addr->addr_bytes[3],
727 mac_addr->addr_bytes[4],
728 mac_addr->addr_bytes[5],
734 txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index)
736 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
737 struct rte_ether_addr *perm_addr =
738 (struct rte_ether_addr *)hw->mac.perm_addr;
739 struct rte_ether_addr *mac_addr;
744 * The TXGBE_VF_SET_MACVLAN command of the txgbe-pf driver does
745 * not support the deletion of a given MAC address.
746 * Instead, it imposes to delete all MAC addresses, then to add again
747 * all MAC addresses with the exception of the one to be deleted.
749 (void)txgbevf_set_uc_addr_vf(hw, 0, NULL);
752 * Add again all MAC addresses, with the exception of the deleted one
753 * and of the permanent MAC address.
755 for (i = 0, mac_addr = dev->data->mac_addrs;
756 i < hw->mac.num_rar_entries; i++, mac_addr++) {
757 /* Skip the deleted MAC address */
760 /* Skip NULL MAC addresses */
761 if (rte_is_zero_ether_addr(mac_addr))
763 /* Skip the permanent MAC address */
764 if (memcmp(perm_addr, mac_addr,
765 sizeof(struct rte_ether_addr)) == 0)
767 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes);
770 "Adding again MAC address "
771 "%02x:%02x:%02x:%02x:%02x:%02x failed "
773 mac_addr->addr_bytes[0],
774 mac_addr->addr_bytes[1],
775 mac_addr->addr_bytes[2],
776 mac_addr->addr_bytes[3],
777 mac_addr->addr_bytes[4],
778 mac_addr->addr_bytes[5],
784 txgbevf_set_default_mac_addr(struct rte_eth_dev *dev,
785 struct rte_ether_addr *addr)
787 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
789 hw->mac.set_rar(hw, 0, (void *)addr, 0, 0);
794 static void txgbevf_mbx_process(struct rte_eth_dev *dev)
796 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
799 /* peek the message first */
800 in_msg = rd32(hw, TXGBE_VFMBX);
802 /* PF reset VF event */
803 if (in_msg == TXGBE_PF_CONTROL_MSG) {
804 /* dummy mbx read to ack pf */
805 if (txgbe_read_mbx(hw, &in_msg, 1, 0))
807 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
813 txgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev)
816 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
817 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
818 txgbevf_intr_disable(dev);
820 /* read-on-clear nic registers here */
821 eicr = rd32(hw, TXGBE_VFICR);
824 /* only one misc vector supported - mailbox */
825 eicr &= TXGBE_VFICR_MASK;
826 /* Workround for ICR lost */
827 intr->flags |= TXGBE_FLAG_MAILBOX;
833 txgbevf_dev_interrupt_action(struct rte_eth_dev *dev)
835 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
837 if (intr->flags & TXGBE_FLAG_MAILBOX) {
838 txgbevf_mbx_process(dev);
839 intr->flags &= ~TXGBE_FLAG_MAILBOX;
842 txgbevf_intr_enable(dev);
848 txgbevf_dev_interrupt_handler(void *param)
850 struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
852 txgbevf_dev_interrupt_get_status(dev);
853 txgbevf_dev_interrupt_action(dev);
857 * dev_ops for virtual function, bare necessities for basic vf
858 * operation have been implemented
860 static const struct eth_dev_ops txgbevf_eth_dev_ops = {
861 .dev_configure = txgbevf_dev_configure,
862 .link_update = txgbevf_dev_link_update,
863 .stats_get = txgbevf_dev_stats_get,
864 .xstats_get = txgbevf_dev_xstats_get,
865 .stats_reset = txgbevf_dev_stats_reset,
866 .xstats_reset = txgbevf_dev_stats_reset,
867 .xstats_get_names = txgbevf_dev_xstats_get_names,
868 .dev_infos_get = txgbevf_dev_info_get,
869 .rx_queue_intr_enable = txgbevf_dev_rx_queue_intr_enable,
870 .rx_queue_intr_disable = txgbevf_dev_rx_queue_intr_disable,
871 .mac_addr_add = txgbevf_add_mac_addr,
872 .mac_addr_remove = txgbevf_remove_mac_addr,
873 .rxq_info_get = txgbe_rxq_info_get,
874 .txq_info_get = txgbe_txq_info_get,
875 .mac_addr_set = txgbevf_set_default_mac_addr,
878 RTE_PMD_REGISTER_PCI(net_txgbe_vf, rte_txgbevf_pmd);
879 RTE_PMD_REGISTER_PCI_TABLE(net_txgbe_vf, pci_id_txgbevf_map);
880 RTE_PMD_REGISTER_KMOD_DEP(net_txgbe_vf, "* igb_uio | vfio-pci");