1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020
13 #include <rte_interrupts.h>
15 #include <rte_debug.h>
17 #include <rte_ether.h>
18 #include <rte_ethdev_driver.h>
19 #include <rte_memcpy.h>
20 #include <rte_malloc.h>
21 #include <rte_random.h>
22 #include <rte_bus_pci.h>
24 #include "base/txgbe.h"
25 #include "txgbe_ethdev.h"
26 #include "rte_pmd_txgbe.h"
28 #define TXGBE_MAX_VFTA (128)
29 #define TXGBE_VF_MSG_SIZE_DEFAULT 1
30 #define TXGBE_VF_GET_QUEUE_MSG_SIZE 5
32 static inline uint16_t
33 dev_num_vf(struct rte_eth_dev *eth_dev)
35 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
37 return pci_dev->max_vfs;
41 int txgbe_vf_perm_addr_gen(struct rte_eth_dev *dev, uint16_t vf_num)
43 unsigned char vf_mac_addr[RTE_ETHER_ADDR_LEN];
44 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(dev);
47 for (vfn = 0; vfn < vf_num; vfn++) {
48 rte_eth_random_addr(vf_mac_addr);
49 /* keep the random address as default */
50 memcpy(vfinfo[vfn].vf_mac_addresses, vf_mac_addr,
58 txgbe_mb_intr_setup(struct rte_eth_dev *dev)
60 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
62 intr->mask_misc |= TXGBE_ICRMISC_VFMBX;
67 void txgbe_pf_host_init(struct rte_eth_dev *eth_dev)
69 struct txgbe_vf_info **vfinfo = TXGBE_DEV_VFDATA(eth_dev);
70 struct txgbe_mirror_info *mirror_info = TXGBE_DEV_MR_INFO(eth_dev);
71 struct txgbe_uta_info *uta_info = TXGBE_DEV_UTA_INFO(eth_dev);
72 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
76 PMD_INIT_FUNC_TRACE();
78 RTE_ETH_DEV_SRIOV(eth_dev).active = 0;
79 vf_num = dev_num_vf(eth_dev);
83 *vfinfo = rte_zmalloc("vf_info",
84 sizeof(struct txgbe_vf_info) * vf_num, 0);
86 rte_panic("Cannot allocate memory for private VF data\n");
88 rte_eth_switch_domain_alloc(&(*vfinfo)->switch_domain_id);
90 memset(mirror_info, 0, sizeof(struct txgbe_mirror_info));
91 memset(uta_info, 0, sizeof(struct txgbe_uta_info));
92 hw->mac.mc_filter_type = 0;
94 if (vf_num >= ETH_32_POOLS) {
96 RTE_ETH_DEV_SRIOV(eth_dev).active = ETH_64_POOLS;
97 } else if (vf_num >= ETH_16_POOLS) {
99 RTE_ETH_DEV_SRIOV(eth_dev).active = ETH_32_POOLS;
102 RTE_ETH_DEV_SRIOV(eth_dev).active = ETH_16_POOLS;
105 RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = nb_queue;
106 RTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx = vf_num;
107 RTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx =
108 (uint16_t)(vf_num * nb_queue);
110 txgbe_vf_perm_addr_gen(eth_dev, vf_num);
112 /* init_mailbox_params */
113 hw->mbx.init_params(hw);
115 /* set mb interrupt mask */
116 txgbe_mb_intr_setup(eth_dev);
119 void txgbe_pf_host_uninit(struct rte_eth_dev *eth_dev)
121 struct txgbe_vf_info **vfinfo;
125 PMD_INIT_FUNC_TRACE();
127 RTE_ETH_DEV_SRIOV(eth_dev).active = 0;
128 RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = 0;
129 RTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx = 0;
130 RTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx = 0;
132 vf_num = dev_num_vf(eth_dev);
136 vfinfo = TXGBE_DEV_VFDATA(eth_dev);
140 ret = rte_eth_switch_domain_free((*vfinfo)->switch_domain_id);
142 PMD_INIT_LOG(WARNING, "failed to free switch domain: %d", ret);
149 txgbe_add_tx_flow_control_drop_filter(struct rte_eth_dev *eth_dev)
151 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
152 struct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(eth_dev);
155 struct txgbe_ethertype_filter ethertype_filter;
157 if (!hw->mac.set_ethertype_anti_spoofing) {
158 PMD_DRV_LOG(INFO, "ether type anti-spoofing is not supported.\n");
162 i = txgbe_ethertype_filter_lookup(filter_info,
163 TXGBE_ETHERTYPE_FLOW_CTRL);
165 PMD_DRV_LOG(ERR, "A ether type filter entity for flow control already exists!\n");
169 ethertype_filter.ethertype = TXGBE_ETHERTYPE_FLOW_CTRL;
170 ethertype_filter.etqf = TXGBE_ETFLT_ENA |
172 TXGBE_ETHERTYPE_FLOW_CTRL;
173 ethertype_filter.etqs = 0;
174 ethertype_filter.conf = TRUE;
175 i = txgbe_ethertype_filter_insert(filter_info,
178 PMD_DRV_LOG(ERR, "Cannot find an unused ether type filter entity for flow control.\n");
182 wr32(hw, TXGBE_ETFLT(i),
185 TXGBE_ETHERTYPE_FLOW_CTRL));
187 vf_num = dev_num_vf(eth_dev);
188 for (i = 0; i < vf_num; i++)
189 hw->mac.set_ethertype_anti_spoofing(hw, true, i);
192 int txgbe_pf_host_configure(struct rte_eth_dev *eth_dev)
194 uint32_t vtctl, fcrth;
195 uint32_t vfre_slot, vfre_offset;
197 const uint8_t VFRE_SHIFT = 5; /* VFRE 32 bits per slot */
198 const uint8_t VFRE_MASK = (uint8_t)((1U << VFRE_SHIFT) - 1);
199 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
205 vf_num = dev_num_vf(eth_dev);
209 /* enable VMDq and set the default pool for PF */
210 vtctl = rd32(hw, TXGBE_POOLCTL);
211 vtctl &= ~TXGBE_POOLCTL_DEFPL_MASK;
212 vtctl |= TXGBE_POOLCTL_DEFPL(RTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx);
213 vtctl |= TXGBE_POOLCTL_RPLEN;
214 wr32(hw, TXGBE_POOLCTL, vtctl);
216 vfre_offset = vf_num & VFRE_MASK;
217 vfre_slot = (vf_num >> VFRE_SHIFT) > 0 ? 1 : 0;
219 /* Enable pools reserved to PF only */
220 wr32(hw, TXGBE_POOLRXENA(vfre_slot), (~0U) << vfre_offset);
221 wr32(hw, TXGBE_POOLRXENA(vfre_slot ^ 1), vfre_slot - 1);
222 wr32(hw, TXGBE_POOLTXENA(vfre_slot), (~0U) << vfre_offset);
223 wr32(hw, TXGBE_POOLTXENA(vfre_slot ^ 1), vfre_slot - 1);
225 wr32(hw, TXGBE_PSRCTL, TXGBE_PSRCTL_LBENA);
227 /* clear VMDq map to perment rar 0 */
228 hw->mac.clear_vmdq(hw, 0, BIT_MASK32);
230 /* clear VMDq map to scan rar 127 */
231 wr32(hw, TXGBE_ETHADDRIDX, hw->mac.num_rar_entries);
232 wr32(hw, TXGBE_ETHADDRASSL, 0);
233 wr32(hw, TXGBE_ETHADDRASSH, 0);
235 /* set VMDq map to default PF pool */
236 hw->mac.set_vmdq(hw, 0, RTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx);
239 * SW msut set PORTCTL.VT_Mode the same as GPIE.VT_Mode
241 gpie = rd32(hw, TXGBE_GPIE);
242 gpie |= TXGBE_GPIE_MSIX;
243 gcr_ext = rd32(hw, TXGBE_PORTCTL);
244 gcr_ext &= ~TXGBE_PORTCTL_NUMVT_MASK;
246 switch (RTE_ETH_DEV_SRIOV(eth_dev).active) {
248 gcr_ext |= TXGBE_PORTCTL_NUMVT_64;
251 gcr_ext |= TXGBE_PORTCTL_NUMVT_32;
254 gcr_ext |= TXGBE_PORTCTL_NUMVT_16;
258 wr32(hw, TXGBE_PORTCTL, gcr_ext);
259 wr32(hw, TXGBE_GPIE, gpie);
262 * enable vlan filtering and allow all vlan tags through
264 vlanctrl = rd32(hw, TXGBE_VLANCTL);
265 vlanctrl |= TXGBE_VLANCTL_VFE; /* enable vlan filters */
266 wr32(hw, TXGBE_VLANCTL, vlanctrl);
268 /* enable all vlan filters */
269 for (i = 0; i < TXGBE_MAX_VFTA; i++)
270 wr32(hw, TXGBE_VLANTBL(i), 0xFFFFFFFF);
272 /* Enable MAC Anti-Spoofing */
273 hw->mac.set_mac_anti_spoofing(hw, FALSE, vf_num);
275 /* set flow control threshold to max to avoid tx switch hang */
276 for (i = 0; i < TXGBE_DCB_TC_MAX; i++) {
277 wr32(hw, TXGBE_FCWTRLO(i), 0);
278 fcrth = rd32(hw, TXGBE_PBRXSIZE(i)) - 32;
279 wr32(hw, TXGBE_FCWTRHI(i), fcrth);
282 txgbe_add_tx_flow_control_drop_filter(eth_dev);
288 txgbe_set_rx_mode(struct rte_eth_dev *eth_dev)
290 struct rte_eth_dev_data *dev_data = eth_dev->data;
291 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
293 uint16_t vfn = dev_num_vf(eth_dev);
295 /* disable store-bad-packets */
296 wr32m(hw, TXGBE_SECRXCTL, TXGBE_SECRXCTL_SAVEBAD, 0);
298 /* Check for Promiscuous and All Multicast modes */
299 fctrl = rd32m(hw, TXGBE_PSRCTL,
300 ~(TXGBE_PSRCTL_UCP | TXGBE_PSRCTL_MCP));
301 fctrl |= TXGBE_PSRCTL_BCA |
302 TXGBE_PSRCTL_MCHFENA;
304 vmolr = rd32m(hw, TXGBE_POOLETHCTL(vfn),
305 ~(TXGBE_POOLETHCTL_UCP |
306 TXGBE_POOLETHCTL_MCP |
307 TXGBE_POOLETHCTL_UCHA |
308 TXGBE_POOLETHCTL_MCHA));
309 vmolr |= TXGBE_POOLETHCTL_BCA |
310 TXGBE_POOLETHCTL_UTA |
311 TXGBE_POOLETHCTL_VLA;
313 if (dev_data->promiscuous) {
314 fctrl |= TXGBE_PSRCTL_UCP |
316 /* pf don't want packets routing to vf, so clear UPE */
317 vmolr |= TXGBE_POOLETHCTL_MCP;
318 } else if (dev_data->all_multicast) {
319 fctrl |= TXGBE_PSRCTL_MCP;
320 vmolr |= TXGBE_POOLETHCTL_MCP;
322 vmolr |= TXGBE_POOLETHCTL_UCHA;
323 vmolr |= TXGBE_POOLETHCTL_MCHA;
326 wr32(hw, TXGBE_POOLETHCTL(vfn), vmolr);
328 wr32(hw, TXGBE_PSRCTL, fctrl);
330 txgbe_vlan_hw_strip_config(eth_dev);
334 txgbe_vf_reset_event(struct rte_eth_dev *eth_dev, uint16_t vf)
336 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
337 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
338 int rar_entry = hw->mac.num_rar_entries - (vf + 1);
339 uint32_t vmolr = rd32(hw, TXGBE_POOLETHCTL(vf));
341 vmolr |= (TXGBE_POOLETHCTL_UCHA |
342 TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_UTA);
343 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
345 wr32(hw, TXGBE_POOLTAG(vf), 0);
347 /* reset multicast table array for vf */
348 vfinfo[vf].num_vf_mc_hashes = 0;
351 txgbe_set_rx_mode(eth_dev);
353 hw->mac.clear_rar(hw, rar_entry);
357 txgbe_vf_reset_msg(struct rte_eth_dev *eth_dev, uint16_t vf)
359 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
361 uint32_t reg_offset, vf_shift;
362 const uint8_t VFRE_SHIFT = 5; /* VFRE 32 bits per slot */
363 const uint8_t VFRE_MASK = (uint8_t)((1U << VFRE_SHIFT) - 1);
364 uint8_t nb_q_per_pool;
367 vf_shift = vf & VFRE_MASK;
368 reg_offset = (vf >> VFRE_SHIFT) > 0 ? 1 : 0;
370 /* enable transmit for vf */
371 reg = rd32(hw, TXGBE_POOLTXENA(reg_offset));
372 reg |= (reg | (1 << vf_shift));
373 wr32(hw, TXGBE_POOLTXENA(reg_offset), reg);
375 /* enable all queue drop for IOV */
376 nb_q_per_pool = RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool;
377 for (i = vf * nb_q_per_pool; i < (vf + 1) * nb_q_per_pool; i++) {
380 wr32m(hw, TXGBE_QPRXDROP(i / 32), reg, reg);
383 /* enable receive for vf */
384 reg = rd32(hw, TXGBE_POOLRXENA(reg_offset));
385 reg |= (reg | (1 << vf_shift));
386 wr32(hw, TXGBE_POOLRXENA(reg_offset), reg);
388 txgbe_vf_reset_event(eth_dev, vf);
392 txgbe_disable_vf_mc_promisc(struct rte_eth_dev *eth_dev, uint32_t vf)
394 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
397 vmolr = rd32(hw, TXGBE_POOLETHCTL(vf));
399 PMD_DRV_LOG(INFO, "VF %u: disabling multicast promiscuous\n", vf);
401 vmolr &= ~TXGBE_POOLETHCTL_MCP;
403 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
409 txgbe_vf_reset(struct rte_eth_dev *eth_dev, uint16_t vf, uint32_t *msgbuf)
411 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
412 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
413 unsigned char *vf_mac = vfinfo[vf].vf_mac_addresses;
414 int rar_entry = hw->mac.num_rar_entries - (vf + 1);
415 uint8_t *new_mac = (uint8_t *)(&msgbuf[1]);
417 txgbe_vf_reset_msg(eth_dev, vf);
419 hw->mac.set_rar(hw, rar_entry, vf_mac, vf, true);
421 /* Disable multicast promiscuous at reset */
422 txgbe_disable_vf_mc_promisc(eth_dev, vf);
424 /* reply to reset with ack and vf mac address */
425 msgbuf[0] = TXGBE_VF_RESET | TXGBE_VT_MSGTYPE_ACK;
426 rte_memcpy(new_mac, vf_mac, RTE_ETHER_ADDR_LEN);
428 * Piggyback the multicast filter type so VF can compute the
431 msgbuf[3] = hw->mac.mc_filter_type;
432 txgbe_write_mbx(hw, msgbuf, TXGBE_VF_PERMADDR_MSG_LEN, vf);
438 txgbe_vf_set_mac_addr(struct rte_eth_dev *eth_dev,
439 uint32_t vf, uint32_t *msgbuf)
441 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
442 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
443 int rar_entry = hw->mac.num_rar_entries - (vf + 1);
444 uint8_t *new_mac = (uint8_t *)(&msgbuf[1]);
445 struct rte_ether_addr *ea = (struct rte_ether_addr *)new_mac;
447 if (rte_is_valid_assigned_ether_addr(ea)) {
448 rte_memcpy(vfinfo[vf].vf_mac_addresses, new_mac, 6);
449 return hw->mac.set_rar(hw, rar_entry, new_mac, vf, true);
455 txgbe_vf_set_multicast(struct rte_eth_dev *eth_dev,
456 uint32_t vf, uint32_t *msgbuf)
458 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
459 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
460 int nb_entries = (msgbuf[0] & TXGBE_VT_MSGINFO_MASK) >>
461 TXGBE_VT_MSGINFO_SHIFT;
462 uint16_t *hash_list = (uint16_t *)&msgbuf[1];
465 const uint32_t TXGBE_MTA_INDEX_MASK = 0x7F;
466 const uint32_t TXGBE_MTA_BIT_SHIFT = 5;
467 const uint32_t TXGBE_MTA_BIT_MASK = (0x1 << TXGBE_MTA_BIT_SHIFT) - 1;
470 u32 vmolr = rd32(hw, TXGBE_POOLETHCTL(vf));
472 /* Disable multicast promiscuous first */
473 txgbe_disable_vf_mc_promisc(eth_dev, vf);
475 /* only so many hash values supported */
476 nb_entries = RTE_MIN(nb_entries, TXGBE_MAX_VF_MC_ENTRIES);
478 /* store the mc entries */
479 vfinfo->num_vf_mc_hashes = (uint16_t)nb_entries;
480 for (i = 0; i < nb_entries; i++)
481 vfinfo->vf_mc_hashes[i] = hash_list[i];
483 if (nb_entries == 0) {
484 vmolr &= ~TXGBE_POOLETHCTL_MCHA;
485 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
489 for (i = 0; i < vfinfo->num_vf_mc_hashes; i++) {
490 mta_idx = (vfinfo->vf_mc_hashes[i] >> TXGBE_MTA_BIT_SHIFT)
491 & TXGBE_MTA_INDEX_MASK;
492 mta_shift = vfinfo->vf_mc_hashes[i] & TXGBE_MTA_BIT_MASK;
493 reg_val = rd32(hw, TXGBE_MCADDRTBL(mta_idx));
494 reg_val |= (1 << mta_shift);
495 wr32(hw, TXGBE_MCADDRTBL(mta_idx), reg_val);
498 vmolr |= TXGBE_POOLETHCTL_MCHA;
499 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
505 txgbe_vf_set_vlan(struct rte_eth_dev *eth_dev, uint32_t vf, uint32_t *msgbuf)
508 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
509 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
511 add = (msgbuf[0] & TXGBE_VT_MSGINFO_MASK)
512 >> TXGBE_VT_MSGINFO_SHIFT;
513 vid = TXGBE_PSRVLAN_VID(msgbuf[1]);
516 vfinfo[vf].vlan_count++;
517 else if (vfinfo[vf].vlan_count)
518 vfinfo[vf].vlan_count--;
519 return hw->mac.set_vfta(hw, vid, vf, (bool)add, false);
523 txgbe_set_vf_lpe(struct rte_eth_dev *eth_dev,
524 __rte_unused uint32_t vf, uint32_t *msgbuf)
526 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
527 uint32_t max_frame = msgbuf[1];
530 if (max_frame < RTE_ETHER_MIN_LEN ||
531 max_frame > RTE_ETHER_MAX_JUMBO_FRAME_LEN)
534 max_frs = rd32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK);
535 if (max_frs < max_frame) {
536 wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK,
537 TXGBE_FRMSZ_MAX(max_frame));
544 txgbe_negotiate_vf_api(struct rte_eth_dev *eth_dev,
545 uint32_t vf, uint32_t *msgbuf)
547 uint32_t api_version = msgbuf[1];
548 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(eth_dev);
550 switch (api_version) {
551 case txgbe_mbox_api_10:
552 case txgbe_mbox_api_11:
553 case txgbe_mbox_api_12:
554 case txgbe_mbox_api_13:
555 vfinfo[vf].api_version = (uint8_t)api_version;
561 PMD_DRV_LOG(ERR, "Negotiate invalid api version %u from VF %d\n",
568 txgbe_get_vf_queues(struct rte_eth_dev *eth_dev, uint32_t vf, uint32_t *msgbuf)
570 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(eth_dev);
571 uint32_t default_q = vf * RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool;
572 struct rte_eth_conf *eth_conf;
573 struct rte_eth_vmdq_dcb_tx_conf *vmdq_dcb_tx_conf;
581 /* Verify if the PF supports the mbox APIs version or not */
582 switch (vfinfo[vf].api_version) {
583 case txgbe_mbox_api_20:
584 case txgbe_mbox_api_11:
585 case txgbe_mbox_api_12:
586 case txgbe_mbox_api_13:
592 /* Notify VF of Rx and Tx queue number */
593 msgbuf[TXGBE_VF_RX_QUEUES] = RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool;
594 msgbuf[TXGBE_VF_TX_QUEUES] = RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool;
596 /* Notify VF of default queue */
597 msgbuf[TXGBE_VF_DEF_QUEUE] = default_q;
599 /* Notify VF of number of DCB traffic classes */
600 eth_conf = ð_dev->data->dev_conf;
601 switch (eth_conf->txmode.mq_mode) {
604 PMD_DRV_LOG(ERR, "PF must work with virtualization for VF %u"
605 ", but its tx mode = %d\n", vf,
606 eth_conf->txmode.mq_mode);
609 case ETH_MQ_TX_VMDQ_DCB:
610 vmdq_dcb_tx_conf = ð_conf->tx_adv_conf.vmdq_dcb_tx_conf;
611 switch (vmdq_dcb_tx_conf->nb_queue_pools) {
623 /* ETH_MQ_TX_VMDQ_ONLY, DCB not enabled */
624 case ETH_MQ_TX_VMDQ_ONLY:
625 hw = TXGBE_DEV_HW(eth_dev);
626 vmvir = rd32(hw, TXGBE_POOLTAG(vf));
627 vlana = vmvir & TXGBE_POOLTAG_ACT_MASK;
628 vid = vmvir & TXGBE_POOLTAG_VTAG_MASK;
630 TXGBD_POOLTAG_VTAG_UP(vmvir);
631 if (vlana == TXGBE_POOLTAG_ACT_ALWAYS &&
632 (vid != 0 || user_priority != 0))
639 PMD_DRV_LOG(ERR, "PF work with invalid mode = %d\n",
640 eth_conf->txmode.mq_mode);
643 msgbuf[TXGBE_VF_TRANS_VLAN] = num_tcs;
649 txgbe_set_vf_mc_promisc(struct rte_eth_dev *eth_dev,
650 uint32_t vf, uint32_t *msgbuf)
652 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
653 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
654 int xcast_mode = msgbuf[1]; /* msgbuf contains the flag to enable */
655 u32 vmolr, fctrl, disable, enable;
657 switch (vfinfo[vf].api_version) {
658 case txgbe_mbox_api_12:
659 /* promisc introduced in 1.3 version */
660 if (xcast_mode == TXGBEVF_XCAST_MODE_PROMISC)
664 case txgbe_mbox_api_13:
670 if (vfinfo[vf].xcast_mode == xcast_mode)
673 switch (xcast_mode) {
674 case TXGBEVF_XCAST_MODE_NONE:
675 disable = TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_MCHA |
676 TXGBE_POOLETHCTL_MCP | TXGBE_POOLETHCTL_UCP |
677 TXGBE_POOLETHCTL_VLP;
680 case TXGBEVF_XCAST_MODE_MULTI:
681 disable = TXGBE_POOLETHCTL_MCP | TXGBE_POOLETHCTL_UCP |
682 TXGBE_POOLETHCTL_VLP;
683 enable = TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_MCHA;
685 case TXGBEVF_XCAST_MODE_ALLMULTI:
686 disable = TXGBE_POOLETHCTL_UCP | TXGBE_POOLETHCTL_VLP;
687 enable = TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_MCHA |
688 TXGBE_POOLETHCTL_MCP;
690 case TXGBEVF_XCAST_MODE_PROMISC:
691 fctrl = rd32(hw, TXGBE_PSRCTL);
692 if (!(fctrl & TXGBE_PSRCTL_UCP)) {
693 /* VF promisc requires PF in promisc */
695 "Enabling VF promisc requires PF in promisc\n");
700 enable = TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_MCHA |
701 TXGBE_POOLETHCTL_MCP | TXGBE_POOLETHCTL_UCP |
702 TXGBE_POOLETHCTL_VLP;
708 vmolr = rd32(hw, TXGBE_POOLETHCTL(vf));
711 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
712 vfinfo[vf].xcast_mode = xcast_mode;
715 msgbuf[1] = xcast_mode;
721 txgbe_set_vf_macvlan_msg(struct rte_eth_dev *dev, uint32_t vf, uint32_t *msgbuf)
723 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
724 struct txgbe_vf_info *vf_info = *(TXGBE_DEV_VFDATA(dev));
725 uint8_t *new_mac = (uint8_t *)(&msgbuf[1]);
726 struct rte_ether_addr *ea = (struct rte_ether_addr *)new_mac;
727 int index = (msgbuf[0] & TXGBE_VT_MSGINFO_MASK) >>
728 TXGBE_VT_MSGINFO_SHIFT;
731 if (!rte_is_valid_assigned_ether_addr(ea)) {
732 PMD_DRV_LOG(ERR, "set invalid mac vf:%d\n", vf);
736 vf_info[vf].mac_count++;
738 hw->mac.set_rar(hw, vf_info[vf].mac_count,
741 if (vf_info[vf].mac_count) {
742 hw->mac.clear_rar(hw, vf_info[vf].mac_count);
743 vf_info[vf].mac_count = 0;
750 txgbe_rcv_msg_from_vf(struct rte_eth_dev *eth_dev, uint16_t vf)
752 uint16_t mbx_size = TXGBE_P2VMBX_SIZE;
753 uint16_t msg_size = TXGBE_VF_MSG_SIZE_DEFAULT;
754 uint32_t msgbuf[TXGBE_P2VMBX_SIZE];
756 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
757 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(eth_dev);
758 struct rte_pmd_txgbe_mb_event_param ret_param;
760 retval = txgbe_read_mbx(hw, msgbuf, mbx_size, vf);
762 PMD_DRV_LOG(ERR, "Error mbx recv msg from VF %d", vf);
766 /* do nothing with the message already been processed */
767 if (msgbuf[0] & (TXGBE_VT_MSGTYPE_ACK | TXGBE_VT_MSGTYPE_NACK))
770 /* flush the ack before we write any messages back */
774 * initialise structure to send to user application
775 * will return response from user in retval field
777 ret_param.retval = RTE_PMD_TXGBE_MB_EVENT_PROCEED;
779 ret_param.msg_type = msgbuf[0] & 0xFFFF;
780 ret_param.msg = (void *)msgbuf;
782 /* perform VF reset */
783 if (msgbuf[0] == TXGBE_VF_RESET) {
784 int ret = txgbe_vf_reset(eth_dev, vf, msgbuf);
786 vfinfo[vf].clear_to_send = true;
788 /* notify application about VF reset */
789 rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_VF_MBOX,
795 * ask user application if we allowed to perform those functions
796 * if we get ret_param.retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED
797 * then business as usual,
798 * if 0, do nothing and send ACK to VF
799 * if ret_param.retval > 1, do nothing and send NAK to VF
801 rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_VF_MBOX,
804 retval = ret_param.retval;
806 /* check & process VF to PF mailbox message */
807 switch ((msgbuf[0] & 0xFFFF)) {
808 case TXGBE_VF_SET_MAC_ADDR:
809 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
810 retval = txgbe_vf_set_mac_addr(eth_dev, vf, msgbuf);
812 case TXGBE_VF_SET_MULTICAST:
813 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
814 retval = txgbe_vf_set_multicast(eth_dev, vf, msgbuf);
816 case TXGBE_VF_SET_LPE:
817 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
818 retval = txgbe_set_vf_lpe(eth_dev, vf, msgbuf);
820 case TXGBE_VF_SET_VLAN:
821 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
822 retval = txgbe_vf_set_vlan(eth_dev, vf, msgbuf);
824 case TXGBE_VF_API_NEGOTIATE:
825 retval = txgbe_negotiate_vf_api(eth_dev, vf, msgbuf);
827 case TXGBE_VF_GET_QUEUES:
828 retval = txgbe_get_vf_queues(eth_dev, vf, msgbuf);
829 msg_size = TXGBE_VF_GET_QUEUE_MSG_SIZE;
831 case TXGBE_VF_UPDATE_XCAST_MODE:
832 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
833 retval = txgbe_set_vf_mc_promisc(eth_dev, vf, msgbuf);
835 case TXGBE_VF_SET_MACVLAN:
836 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
837 retval = txgbe_set_vf_macvlan_msg(eth_dev, vf, msgbuf);
840 PMD_DRV_LOG(DEBUG, "Unhandled Msg %8.8x", (uint32_t)msgbuf[0]);
841 retval = TXGBE_ERR_MBX;
845 /* response the VF according to the message process result */
847 msgbuf[0] |= TXGBE_VT_MSGTYPE_NACK;
849 msgbuf[0] |= TXGBE_VT_MSGTYPE_ACK;
851 msgbuf[0] |= TXGBE_VT_MSGTYPE_CTS;
853 txgbe_write_mbx(hw, msgbuf, msg_size, vf);
859 txgbe_rcv_ack_from_vf(struct rte_eth_dev *eth_dev, uint16_t vf)
861 uint32_t msg = TXGBE_VT_MSGTYPE_NACK;
862 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
863 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(eth_dev);
865 if (!vfinfo[vf].clear_to_send)
866 txgbe_write_mbx(hw, &msg, 1, vf);
869 void txgbe_pf_mbx_process(struct rte_eth_dev *eth_dev)
872 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
874 for (vf = 0; vf < dev_num_vf(eth_dev); vf++) {
875 /* check & process vf function level reset */
876 if (!txgbe_check_for_rst(hw, vf))
877 txgbe_vf_reset_event(eth_dev, vf);
879 /* check & process vf mailbox messages */
880 if (!txgbe_check_for_msg(hw, vf))
881 txgbe_rcv_msg_from_vf(eth_dev, vf);
883 /* check & process acks from vf */
884 if (!txgbe_check_for_ack(hw, vf))
885 txgbe_rcv_ack_from_vf(eth_dev, vf);