1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2020
13 #include <rte_interrupts.h>
15 #include <rte_debug.h>
17 #include <rte_ether.h>
18 #include <rte_ethdev_driver.h>
19 #include <rte_memcpy.h>
20 #include <rte_malloc.h>
21 #include <rte_random.h>
22 #include <rte_bus_pci.h>
24 #include "base/txgbe.h"
25 #include "txgbe_ethdev.h"
26 #include "rte_pmd_txgbe.h"
28 #define TXGBE_VF_MSG_SIZE_DEFAULT 1
29 #define TXGBE_VF_GET_QUEUE_MSG_SIZE 5
31 static inline uint16_t
32 dev_num_vf(struct rte_eth_dev *eth_dev)
34 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
36 return pci_dev->max_vfs;
40 int txgbe_vf_perm_addr_gen(struct rte_eth_dev *dev, uint16_t vf_num)
42 unsigned char vf_mac_addr[RTE_ETHER_ADDR_LEN];
43 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(dev);
46 for (vfn = 0; vfn < vf_num; vfn++) {
47 rte_eth_random_addr(vf_mac_addr);
48 /* keep the random address as default */
49 memcpy(vfinfo[vfn].vf_mac_addresses, vf_mac_addr,
57 txgbe_mb_intr_setup(struct rte_eth_dev *dev)
59 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
61 intr->mask_misc |= TXGBE_ICRMISC_VFMBX;
66 void txgbe_pf_host_init(struct rte_eth_dev *eth_dev)
68 struct txgbe_vf_info **vfinfo = TXGBE_DEV_VFDATA(eth_dev);
69 struct txgbe_mirror_info *mirror_info = TXGBE_DEV_MR_INFO(eth_dev);
70 struct txgbe_uta_info *uta_info = TXGBE_DEV_UTA_INFO(eth_dev);
71 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
75 PMD_INIT_FUNC_TRACE();
77 RTE_ETH_DEV_SRIOV(eth_dev).active = 0;
78 vf_num = dev_num_vf(eth_dev);
82 *vfinfo = rte_zmalloc("vf_info",
83 sizeof(struct txgbe_vf_info) * vf_num, 0);
85 rte_panic("Cannot allocate memory for private VF data\n");
87 rte_eth_switch_domain_alloc(&(*vfinfo)->switch_domain_id);
89 memset(mirror_info, 0, sizeof(struct txgbe_mirror_info));
90 memset(uta_info, 0, sizeof(struct txgbe_uta_info));
91 hw->mac.mc_filter_type = 0;
93 if (vf_num >= ETH_32_POOLS) {
95 RTE_ETH_DEV_SRIOV(eth_dev).active = ETH_64_POOLS;
96 } else if (vf_num >= ETH_16_POOLS) {
98 RTE_ETH_DEV_SRIOV(eth_dev).active = ETH_32_POOLS;
101 RTE_ETH_DEV_SRIOV(eth_dev).active = ETH_16_POOLS;
104 RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = nb_queue;
105 RTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx = vf_num;
106 RTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx =
107 (uint16_t)(vf_num * nb_queue);
109 txgbe_vf_perm_addr_gen(eth_dev, vf_num);
111 /* init_mailbox_params */
112 hw->mbx.init_params(hw);
114 /* set mb interrupt mask */
115 txgbe_mb_intr_setup(eth_dev);
118 void txgbe_pf_host_uninit(struct rte_eth_dev *eth_dev)
120 struct txgbe_vf_info **vfinfo;
124 PMD_INIT_FUNC_TRACE();
126 RTE_ETH_DEV_SRIOV(eth_dev).active = 0;
127 RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = 0;
128 RTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx = 0;
129 RTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx = 0;
131 vf_num = dev_num_vf(eth_dev);
135 vfinfo = TXGBE_DEV_VFDATA(eth_dev);
139 ret = rte_eth_switch_domain_free((*vfinfo)->switch_domain_id);
141 PMD_INIT_LOG(WARNING, "failed to free switch domain: %d", ret);
148 txgbe_set_rx_mode(struct rte_eth_dev *eth_dev)
150 struct rte_eth_dev_data *dev_data = eth_dev->data;
151 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
153 uint16_t vfn = dev_num_vf(eth_dev);
155 /* disable store-bad-packets */
156 wr32m(hw, TXGBE_SECRXCTL, TXGBE_SECRXCTL_SAVEBAD, 0);
158 /* Check for Promiscuous and All Multicast modes */
159 fctrl = rd32m(hw, TXGBE_PSRCTL,
160 ~(TXGBE_PSRCTL_UCP | TXGBE_PSRCTL_MCP));
161 fctrl |= TXGBE_PSRCTL_BCA |
162 TXGBE_PSRCTL_MCHFENA;
164 vmolr = rd32m(hw, TXGBE_POOLETHCTL(vfn),
165 ~(TXGBE_POOLETHCTL_UCP |
166 TXGBE_POOLETHCTL_MCP |
167 TXGBE_POOLETHCTL_UCHA |
168 TXGBE_POOLETHCTL_MCHA));
169 vmolr |= TXGBE_POOLETHCTL_BCA |
170 TXGBE_POOLETHCTL_UTA |
171 TXGBE_POOLETHCTL_VLA;
173 if (dev_data->promiscuous) {
174 fctrl |= TXGBE_PSRCTL_UCP |
176 /* pf don't want packets routing to vf, so clear UPE */
177 vmolr |= TXGBE_POOLETHCTL_MCP;
178 } else if (dev_data->all_multicast) {
179 fctrl |= TXGBE_PSRCTL_MCP;
180 vmolr |= TXGBE_POOLETHCTL_MCP;
182 vmolr |= TXGBE_POOLETHCTL_UCHA;
183 vmolr |= TXGBE_POOLETHCTL_MCHA;
186 wr32(hw, TXGBE_POOLETHCTL(vfn), vmolr);
188 wr32(hw, TXGBE_PSRCTL, fctrl);
190 txgbe_vlan_hw_strip_config(eth_dev);
194 txgbe_vf_reset_event(struct rte_eth_dev *eth_dev, uint16_t vf)
196 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
197 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
198 int rar_entry = hw->mac.num_rar_entries - (vf + 1);
199 uint32_t vmolr = rd32(hw, TXGBE_POOLETHCTL(vf));
201 vmolr |= (TXGBE_POOLETHCTL_UCHA |
202 TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_UTA);
203 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
205 wr32(hw, TXGBE_POOLTAG(vf), 0);
207 /* reset multicast table array for vf */
208 vfinfo[vf].num_vf_mc_hashes = 0;
211 txgbe_set_rx_mode(eth_dev);
213 hw->mac.clear_rar(hw, rar_entry);
217 txgbe_vf_reset_msg(struct rte_eth_dev *eth_dev, uint16_t vf)
219 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
221 uint32_t reg_offset, vf_shift;
222 const uint8_t VFRE_SHIFT = 5; /* VFRE 32 bits per slot */
223 const uint8_t VFRE_MASK = (uint8_t)((1U << VFRE_SHIFT) - 1);
224 uint8_t nb_q_per_pool;
227 vf_shift = vf & VFRE_MASK;
228 reg_offset = (vf >> VFRE_SHIFT) > 0 ? 1 : 0;
230 /* enable transmit for vf */
231 reg = rd32(hw, TXGBE_POOLTXENA(reg_offset));
232 reg |= (reg | (1 << vf_shift));
233 wr32(hw, TXGBE_POOLTXENA(reg_offset), reg);
235 /* enable all queue drop for IOV */
236 nb_q_per_pool = RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool;
237 for (i = vf * nb_q_per_pool; i < (vf + 1) * nb_q_per_pool; i++) {
240 wr32m(hw, TXGBE_QPRXDROP(i / 32), reg, reg);
243 /* enable receive for vf */
244 reg = rd32(hw, TXGBE_POOLRXENA(reg_offset));
245 reg |= (reg | (1 << vf_shift));
246 wr32(hw, TXGBE_POOLRXENA(reg_offset), reg);
248 txgbe_vf_reset_event(eth_dev, vf);
252 txgbe_disable_vf_mc_promisc(struct rte_eth_dev *eth_dev, uint32_t vf)
254 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
257 vmolr = rd32(hw, TXGBE_POOLETHCTL(vf));
259 PMD_DRV_LOG(INFO, "VF %u: disabling multicast promiscuous\n", vf);
261 vmolr &= ~TXGBE_POOLETHCTL_MCP;
263 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
269 txgbe_vf_reset(struct rte_eth_dev *eth_dev, uint16_t vf, uint32_t *msgbuf)
271 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
272 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
273 unsigned char *vf_mac = vfinfo[vf].vf_mac_addresses;
274 int rar_entry = hw->mac.num_rar_entries - (vf + 1);
275 uint8_t *new_mac = (uint8_t *)(&msgbuf[1]);
277 txgbe_vf_reset_msg(eth_dev, vf);
279 hw->mac.set_rar(hw, rar_entry, vf_mac, vf, true);
281 /* Disable multicast promiscuous at reset */
282 txgbe_disable_vf_mc_promisc(eth_dev, vf);
284 /* reply to reset with ack and vf mac address */
285 msgbuf[0] = TXGBE_VF_RESET | TXGBE_VT_MSGTYPE_ACK;
286 rte_memcpy(new_mac, vf_mac, RTE_ETHER_ADDR_LEN);
288 * Piggyback the multicast filter type so VF can compute the
291 msgbuf[3] = hw->mac.mc_filter_type;
292 txgbe_write_mbx(hw, msgbuf, TXGBE_VF_PERMADDR_MSG_LEN, vf);
298 txgbe_vf_set_mac_addr(struct rte_eth_dev *eth_dev,
299 uint32_t vf, uint32_t *msgbuf)
301 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
302 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
303 int rar_entry = hw->mac.num_rar_entries - (vf + 1);
304 uint8_t *new_mac = (uint8_t *)(&msgbuf[1]);
305 struct rte_ether_addr *ea = (struct rte_ether_addr *)new_mac;
307 if (rte_is_valid_assigned_ether_addr(ea)) {
308 rte_memcpy(vfinfo[vf].vf_mac_addresses, new_mac, 6);
309 return hw->mac.set_rar(hw, rar_entry, new_mac, vf, true);
315 txgbe_vf_set_multicast(struct rte_eth_dev *eth_dev,
316 uint32_t vf, uint32_t *msgbuf)
318 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
319 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
320 int nb_entries = (msgbuf[0] & TXGBE_VT_MSGINFO_MASK) >>
321 TXGBE_VT_MSGINFO_SHIFT;
322 uint16_t *hash_list = (uint16_t *)&msgbuf[1];
325 const uint32_t TXGBE_MTA_INDEX_MASK = 0x7F;
326 const uint32_t TXGBE_MTA_BIT_SHIFT = 5;
327 const uint32_t TXGBE_MTA_BIT_MASK = (0x1 << TXGBE_MTA_BIT_SHIFT) - 1;
330 u32 vmolr = rd32(hw, TXGBE_POOLETHCTL(vf));
332 /* Disable multicast promiscuous first */
333 txgbe_disable_vf_mc_promisc(eth_dev, vf);
335 /* only so many hash values supported */
336 nb_entries = RTE_MIN(nb_entries, TXGBE_MAX_VF_MC_ENTRIES);
338 /* store the mc entries */
339 vfinfo->num_vf_mc_hashes = (uint16_t)nb_entries;
340 for (i = 0; i < nb_entries; i++)
341 vfinfo->vf_mc_hashes[i] = hash_list[i];
343 if (nb_entries == 0) {
344 vmolr &= ~TXGBE_POOLETHCTL_MCHA;
345 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
349 for (i = 0; i < vfinfo->num_vf_mc_hashes; i++) {
350 mta_idx = (vfinfo->vf_mc_hashes[i] >> TXGBE_MTA_BIT_SHIFT)
351 & TXGBE_MTA_INDEX_MASK;
352 mta_shift = vfinfo->vf_mc_hashes[i] & TXGBE_MTA_BIT_MASK;
353 reg_val = rd32(hw, TXGBE_MCADDRTBL(mta_idx));
354 reg_val |= (1 << mta_shift);
355 wr32(hw, TXGBE_MCADDRTBL(mta_idx), reg_val);
358 vmolr |= TXGBE_POOLETHCTL_MCHA;
359 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
365 txgbe_vf_set_vlan(struct rte_eth_dev *eth_dev, uint32_t vf, uint32_t *msgbuf)
368 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
369 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
371 add = (msgbuf[0] & TXGBE_VT_MSGINFO_MASK)
372 >> TXGBE_VT_MSGINFO_SHIFT;
373 vid = TXGBE_PSRVLAN_VID(msgbuf[1]);
376 vfinfo[vf].vlan_count++;
377 else if (vfinfo[vf].vlan_count)
378 vfinfo[vf].vlan_count--;
379 return hw->mac.set_vfta(hw, vid, vf, (bool)add, false);
383 txgbe_set_vf_lpe(struct rte_eth_dev *eth_dev,
384 __rte_unused uint32_t vf, uint32_t *msgbuf)
386 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
387 uint32_t max_frame = msgbuf[1];
390 if (max_frame < RTE_ETHER_MIN_LEN ||
391 max_frame > RTE_ETHER_MAX_JUMBO_FRAME_LEN)
394 max_frs = rd32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK);
395 if (max_frs < max_frame) {
396 wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK,
397 TXGBE_FRMSZ_MAX(max_frame));
404 txgbe_negotiate_vf_api(struct rte_eth_dev *eth_dev,
405 uint32_t vf, uint32_t *msgbuf)
407 uint32_t api_version = msgbuf[1];
408 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(eth_dev);
410 switch (api_version) {
411 case txgbe_mbox_api_10:
412 case txgbe_mbox_api_11:
413 case txgbe_mbox_api_12:
414 case txgbe_mbox_api_13:
415 vfinfo[vf].api_version = (uint8_t)api_version;
421 PMD_DRV_LOG(ERR, "Negotiate invalid api version %u from VF %d\n",
428 txgbe_get_vf_queues(struct rte_eth_dev *eth_dev, uint32_t vf, uint32_t *msgbuf)
430 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(eth_dev);
431 uint32_t default_q = vf * RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool;
432 struct rte_eth_conf *eth_conf;
433 struct rte_eth_vmdq_dcb_tx_conf *vmdq_dcb_tx_conf;
441 /* Verify if the PF supports the mbox APIs version or not */
442 switch (vfinfo[vf].api_version) {
443 case txgbe_mbox_api_20:
444 case txgbe_mbox_api_11:
445 case txgbe_mbox_api_12:
446 case txgbe_mbox_api_13:
452 /* Notify VF of Rx and Tx queue number */
453 msgbuf[TXGBE_VF_RX_QUEUES] = RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool;
454 msgbuf[TXGBE_VF_TX_QUEUES] = RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool;
456 /* Notify VF of default queue */
457 msgbuf[TXGBE_VF_DEF_QUEUE] = default_q;
459 /* Notify VF of number of DCB traffic classes */
460 eth_conf = ð_dev->data->dev_conf;
461 switch (eth_conf->txmode.mq_mode) {
464 PMD_DRV_LOG(ERR, "PF must work with virtualization for VF %u"
465 ", but its tx mode = %d\n", vf,
466 eth_conf->txmode.mq_mode);
469 case ETH_MQ_TX_VMDQ_DCB:
470 vmdq_dcb_tx_conf = ð_conf->tx_adv_conf.vmdq_dcb_tx_conf;
471 switch (vmdq_dcb_tx_conf->nb_queue_pools) {
483 /* ETH_MQ_TX_VMDQ_ONLY, DCB not enabled */
484 case ETH_MQ_TX_VMDQ_ONLY:
485 hw = TXGBE_DEV_HW(eth_dev);
486 vmvir = rd32(hw, TXGBE_POOLTAG(vf));
487 vlana = vmvir & TXGBE_POOLTAG_ACT_MASK;
488 vid = vmvir & TXGBE_POOLTAG_VTAG_MASK;
490 TXGBD_POOLTAG_VTAG_UP(vmvir);
491 if (vlana == TXGBE_POOLTAG_ACT_ALWAYS &&
492 (vid != 0 || user_priority != 0))
499 PMD_DRV_LOG(ERR, "PF work with invalid mode = %d\n",
500 eth_conf->txmode.mq_mode);
503 msgbuf[TXGBE_VF_TRANS_VLAN] = num_tcs;
509 txgbe_set_vf_mc_promisc(struct rte_eth_dev *eth_dev,
510 uint32_t vf, uint32_t *msgbuf)
512 struct txgbe_vf_info *vfinfo = *(TXGBE_DEV_VFDATA(eth_dev));
513 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
514 int xcast_mode = msgbuf[1]; /* msgbuf contains the flag to enable */
515 u32 vmolr, fctrl, disable, enable;
517 switch (vfinfo[vf].api_version) {
518 case txgbe_mbox_api_12:
519 /* promisc introduced in 1.3 version */
520 if (xcast_mode == TXGBEVF_XCAST_MODE_PROMISC)
524 case txgbe_mbox_api_13:
530 if (vfinfo[vf].xcast_mode == xcast_mode)
533 switch (xcast_mode) {
534 case TXGBEVF_XCAST_MODE_NONE:
535 disable = TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_MCHA |
536 TXGBE_POOLETHCTL_MCP | TXGBE_POOLETHCTL_UCP |
537 TXGBE_POOLETHCTL_VLP;
540 case TXGBEVF_XCAST_MODE_MULTI:
541 disable = TXGBE_POOLETHCTL_MCP | TXGBE_POOLETHCTL_UCP |
542 TXGBE_POOLETHCTL_VLP;
543 enable = TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_MCHA;
545 case TXGBEVF_XCAST_MODE_ALLMULTI:
546 disable = TXGBE_POOLETHCTL_UCP | TXGBE_POOLETHCTL_VLP;
547 enable = TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_MCHA |
548 TXGBE_POOLETHCTL_MCP;
550 case TXGBEVF_XCAST_MODE_PROMISC:
551 fctrl = rd32(hw, TXGBE_PSRCTL);
552 if (!(fctrl & TXGBE_PSRCTL_UCP)) {
553 /* VF promisc requires PF in promisc */
555 "Enabling VF promisc requires PF in promisc\n");
560 enable = TXGBE_POOLETHCTL_BCA | TXGBE_POOLETHCTL_MCHA |
561 TXGBE_POOLETHCTL_MCP | TXGBE_POOLETHCTL_UCP |
562 TXGBE_POOLETHCTL_VLP;
568 vmolr = rd32(hw, TXGBE_POOLETHCTL(vf));
571 wr32(hw, TXGBE_POOLETHCTL(vf), vmolr);
572 vfinfo[vf].xcast_mode = xcast_mode;
575 msgbuf[1] = xcast_mode;
581 txgbe_set_vf_macvlan_msg(struct rte_eth_dev *dev, uint32_t vf, uint32_t *msgbuf)
583 struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
584 struct txgbe_vf_info *vf_info = *(TXGBE_DEV_VFDATA(dev));
585 uint8_t *new_mac = (uint8_t *)(&msgbuf[1]);
586 struct rte_ether_addr *ea = (struct rte_ether_addr *)new_mac;
587 int index = (msgbuf[0] & TXGBE_VT_MSGINFO_MASK) >>
588 TXGBE_VT_MSGINFO_SHIFT;
591 if (!rte_is_valid_assigned_ether_addr(ea)) {
592 PMD_DRV_LOG(ERR, "set invalid mac vf:%d\n", vf);
596 vf_info[vf].mac_count++;
598 hw->mac.set_rar(hw, vf_info[vf].mac_count,
601 if (vf_info[vf].mac_count) {
602 hw->mac.clear_rar(hw, vf_info[vf].mac_count);
603 vf_info[vf].mac_count = 0;
610 txgbe_rcv_msg_from_vf(struct rte_eth_dev *eth_dev, uint16_t vf)
612 uint16_t mbx_size = TXGBE_P2VMBX_SIZE;
613 uint16_t msg_size = TXGBE_VF_MSG_SIZE_DEFAULT;
614 uint32_t msgbuf[TXGBE_P2VMBX_SIZE];
616 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
617 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(eth_dev);
618 struct rte_pmd_txgbe_mb_event_param ret_param;
620 retval = txgbe_read_mbx(hw, msgbuf, mbx_size, vf);
622 PMD_DRV_LOG(ERR, "Error mbx recv msg from VF %d", vf);
626 /* do nothing with the message already been processed */
627 if (msgbuf[0] & (TXGBE_VT_MSGTYPE_ACK | TXGBE_VT_MSGTYPE_NACK))
630 /* flush the ack before we write any messages back */
634 * initialise structure to send to user application
635 * will return response from user in retval field
637 ret_param.retval = RTE_PMD_TXGBE_MB_EVENT_PROCEED;
639 ret_param.msg_type = msgbuf[0] & 0xFFFF;
640 ret_param.msg = (void *)msgbuf;
642 /* perform VF reset */
643 if (msgbuf[0] == TXGBE_VF_RESET) {
644 int ret = txgbe_vf_reset(eth_dev, vf, msgbuf);
646 vfinfo[vf].clear_to_send = true;
648 /* notify application about VF reset */
649 rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_VF_MBOX,
655 * ask user application if we allowed to perform those functions
656 * if we get ret_param.retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED
657 * then business as usual,
658 * if 0, do nothing and send ACK to VF
659 * if ret_param.retval > 1, do nothing and send NAK to VF
661 rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_VF_MBOX,
664 retval = ret_param.retval;
666 /* check & process VF to PF mailbox message */
667 switch ((msgbuf[0] & 0xFFFF)) {
668 case TXGBE_VF_SET_MAC_ADDR:
669 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
670 retval = txgbe_vf_set_mac_addr(eth_dev, vf, msgbuf);
672 case TXGBE_VF_SET_MULTICAST:
673 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
674 retval = txgbe_vf_set_multicast(eth_dev, vf, msgbuf);
676 case TXGBE_VF_SET_LPE:
677 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
678 retval = txgbe_set_vf_lpe(eth_dev, vf, msgbuf);
680 case TXGBE_VF_SET_VLAN:
681 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
682 retval = txgbe_vf_set_vlan(eth_dev, vf, msgbuf);
684 case TXGBE_VF_API_NEGOTIATE:
685 retval = txgbe_negotiate_vf_api(eth_dev, vf, msgbuf);
687 case TXGBE_VF_GET_QUEUES:
688 retval = txgbe_get_vf_queues(eth_dev, vf, msgbuf);
689 msg_size = TXGBE_VF_GET_QUEUE_MSG_SIZE;
691 case TXGBE_VF_UPDATE_XCAST_MODE:
692 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
693 retval = txgbe_set_vf_mc_promisc(eth_dev, vf, msgbuf);
695 case TXGBE_VF_SET_MACVLAN:
696 if (retval == RTE_PMD_TXGBE_MB_EVENT_PROCEED)
697 retval = txgbe_set_vf_macvlan_msg(eth_dev, vf, msgbuf);
700 PMD_DRV_LOG(DEBUG, "Unhandled Msg %8.8x", (uint32_t)msgbuf[0]);
701 retval = TXGBE_ERR_MBX;
705 /* response the VF according to the message process result */
707 msgbuf[0] |= TXGBE_VT_MSGTYPE_NACK;
709 msgbuf[0] |= TXGBE_VT_MSGTYPE_ACK;
711 msgbuf[0] |= TXGBE_VT_MSGTYPE_CTS;
713 txgbe_write_mbx(hw, msgbuf, msg_size, vf);
719 txgbe_rcv_ack_from_vf(struct rte_eth_dev *eth_dev, uint16_t vf)
721 uint32_t msg = TXGBE_VT_MSGTYPE_NACK;
722 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
723 struct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(eth_dev);
725 if (!vfinfo[vf].clear_to_send)
726 txgbe_write_mbx(hw, &msg, 1, vf);
729 void txgbe_pf_mbx_process(struct rte_eth_dev *eth_dev)
732 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
734 for (vf = 0; vf < dev_num_vf(eth_dev); vf++) {
735 /* check & process vf function level reset */
736 if (!txgbe_check_for_rst(hw, vf))
737 txgbe_vf_reset_event(eth_dev, vf);
739 /* check & process vf mailbox messages */
740 if (!txgbe_check_for_msg(hw, vf))
741 txgbe_rcv_msg_from_vf(eth_dev, vf);
743 /* check & process acks from vf */
744 if (!txgbe_check_for_ack(hw, vf))
745 txgbe_rcv_ack_from_vf(eth_dev, vf);