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34 #ifndef _VIRTIO_PCI_H_
35 #define _VIRTIO_PCI_H_
40 #include <rte_ethdev.h>
45 /* VirtIO PCI vendor/device ID. */
46 #define VIRTIO_PCI_VENDORID 0x1AF4
47 #define VIRTIO_PCI_LEGACY_DEVICEID_NET 0x1000
48 #define VIRTIO_PCI_MODERN_DEVICEID_NET 0x1041
50 /* VirtIO ABI version, this must match exactly. */
51 #define VIRTIO_PCI_ABI_VERSION 0
54 * VirtIO Header, located in BAR 0.
56 #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/
57 #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */
58 #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */
59 #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */
60 #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */
61 #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */
62 #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */
63 #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading
64 * also clears the register (8, RO) */
65 /* Only if MSIX is enabled: */
66 #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */
67 #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications
70 /* The bit of the ISR which indicates a device has an interrupt. */
71 #define VIRTIO_PCI_ISR_INTR 0x1
72 /* The bit of the ISR which indicates a device configuration change. */
73 #define VIRTIO_PCI_ISR_CONFIG 0x2
74 /* Vector value used to disable MSI for queue. */
75 #define VIRTIO_MSI_NO_VECTOR 0xFFFF
77 /* VirtIO device IDs. */
78 #define VIRTIO_ID_NETWORK 0x01
79 #define VIRTIO_ID_BLOCK 0x02
80 #define VIRTIO_ID_CONSOLE 0x03
81 #define VIRTIO_ID_ENTROPY 0x04
82 #define VIRTIO_ID_BALLOON 0x05
83 #define VIRTIO_ID_IOMEMORY 0x06
84 #define VIRTIO_ID_9P 0x09
86 /* Status byte for guest to report progress. */
87 #define VIRTIO_CONFIG_STATUS_RESET 0x00
88 #define VIRTIO_CONFIG_STATUS_ACK 0x01
89 #define VIRTIO_CONFIG_STATUS_DRIVER 0x02
90 #define VIRTIO_CONFIG_STATUS_DRIVER_OK 0x04
91 #define VIRTIO_CONFIG_STATUS_FEATURES_OK 0x08
92 #define VIRTIO_CONFIG_STATUS_FAILED 0x80
95 * Each virtqueue indirect descriptor list must be physically contiguous.
96 * To allow us to malloc(9) each list individually, limit the number
97 * supported to what will fit in one page. With 4KB pages, this is a limit
98 * of 256 descriptors. If there is ever a need for more, we can switch to
99 * contigmalloc(9) for the larger allocations, similar to what
100 * bus_dmamem_alloc(9) does.
102 * Note the sizeof(struct vring_desc) is 16 bytes.
104 #define VIRTIO_MAX_INDIRECT ((int) (PAGE_SIZE / 16))
106 /* The feature bitmap for virtio net */
107 #define VIRTIO_NET_F_CSUM 0 /* Host handles pkts w/ partial csum */
108 #define VIRTIO_NET_F_GUEST_CSUM 1 /* Guest handles pkts w/ partial csum */
109 #define VIRTIO_NET_F_MAC 5 /* Host has given MAC address. */
110 #define VIRTIO_NET_F_GUEST_TSO4 7 /* Guest can handle TSOv4 in. */
111 #define VIRTIO_NET_F_GUEST_TSO6 8 /* Guest can handle TSOv6 in. */
112 #define VIRTIO_NET_F_GUEST_ECN 9 /* Guest can handle TSO[6] w/ ECN in. */
113 #define VIRTIO_NET_F_GUEST_UFO 10 /* Guest can handle UFO in. */
114 #define VIRTIO_NET_F_HOST_TSO4 11 /* Host can handle TSOv4 in. */
115 #define VIRTIO_NET_F_HOST_TSO6 12 /* Host can handle TSOv6 in. */
116 #define VIRTIO_NET_F_HOST_ECN 13 /* Host can handle TSO[6] w/ ECN in. */
117 #define VIRTIO_NET_F_HOST_UFO 14 /* Host can handle UFO in. */
118 #define VIRTIO_NET_F_MRG_RXBUF 15 /* Host can merge receive buffers. */
119 #define VIRTIO_NET_F_STATUS 16 /* virtio_net_config.status available */
120 #define VIRTIO_NET_F_CTRL_VQ 17 /* Control channel available */
121 #define VIRTIO_NET_F_CTRL_RX 18 /* Control channel RX mode support */
122 #define VIRTIO_NET_F_CTRL_VLAN 19 /* Control channel VLAN filtering */
123 #define VIRTIO_NET_F_CTRL_RX_EXTRA 20 /* Extra RX mode control support */
124 #define VIRTIO_NET_F_GUEST_ANNOUNCE 21 /* Guest can announce device on the
126 #define VIRTIO_NET_F_MQ 22 /* Device supports Receive Flow
128 #define VIRTIO_NET_F_CTRL_MAC_ADDR 23 /* Set MAC address */
130 /* Do we get callbacks when the ring is completely used, even if we've
131 * suppressed them? */
132 #define VIRTIO_F_NOTIFY_ON_EMPTY 24
134 /* Can the device handle any descriptor layout? */
135 #define VIRTIO_F_ANY_LAYOUT 27
137 /* We support indirect buffer descriptors */
138 #define VIRTIO_RING_F_INDIRECT_DESC 28
140 #define VIRTIO_F_VERSION_1 32
141 #define VIRTIO_F_IOMMU_PLATFORM 33
144 * Some VirtIO feature bits (currently bits 28 through 31) are
145 * reserved for the transport being used (eg. virtio_ring), the
146 * rest are per-device feature bits.
148 #define VIRTIO_TRANSPORT_F_START 28
149 #define VIRTIO_TRANSPORT_F_END 34
151 /* The Guest publishes the used index for which it expects an interrupt
152 * at the end of the avail ring. Host should ignore the avail->flags field. */
153 /* The Host publishes the avail index for which it expects a kick
154 * at the end of the used ring. Guest should ignore the used->flags field. */
155 #define VIRTIO_RING_F_EVENT_IDX 29
157 #define VIRTIO_NET_S_LINK_UP 1 /* Link is up */
158 #define VIRTIO_NET_S_ANNOUNCE 2 /* Announcement is needed */
161 * Maximum number of virtqueues per device.
163 #define VIRTIO_MAX_VIRTQUEUES 8
165 /* Common configuration */
166 #define VIRTIO_PCI_CAP_COMMON_CFG 1
168 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2
170 #define VIRTIO_PCI_CAP_ISR_CFG 3
171 /* Device specific configuration */
172 #define VIRTIO_PCI_CAP_DEVICE_CFG 4
173 /* PCI configuration access */
174 #define VIRTIO_PCI_CAP_PCI_CFG 5
176 /* This is the PCI capability header: */
177 struct virtio_pci_cap {
178 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
179 uint8_t cap_next; /* Generic PCI field: next ptr. */
180 uint8_t cap_len; /* Generic PCI field: capability length */
181 uint8_t cfg_type; /* Identifies the structure. */
182 uint8_t bar; /* Where to find it. */
183 uint8_t padding[3]; /* Pad to full dword. */
184 uint32_t offset; /* Offset within bar. */
185 uint32_t length; /* Length of the structure, in bytes. */
188 struct virtio_pci_notify_cap {
189 struct virtio_pci_cap cap;
190 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */
193 /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
194 struct virtio_pci_common_cfg {
195 /* About the whole device. */
196 uint32_t device_feature_select; /* read-write */
197 uint32_t device_feature; /* read-only */
198 uint32_t guest_feature_select; /* read-write */
199 uint32_t guest_feature; /* read-write */
200 uint16_t msix_config; /* read-write */
201 uint16_t num_queues; /* read-only */
202 uint8_t device_status; /* read-write */
203 uint8_t config_generation; /* read-only */
205 /* About a specific virtqueue. */
206 uint16_t queue_select; /* read-write */
207 uint16_t queue_size; /* read-write, power of 2. */
208 uint16_t queue_msix_vector; /* read-write */
209 uint16_t queue_enable; /* read-write */
210 uint16_t queue_notify_off; /* read-only */
211 uint32_t queue_desc_lo; /* read-write */
212 uint32_t queue_desc_hi; /* read-write */
213 uint32_t queue_avail_lo; /* read-write */
214 uint32_t queue_avail_hi; /* read-write */
215 uint32_t queue_used_lo; /* read-write */
216 uint32_t queue_used_hi; /* read-write */
221 struct virtio_pci_ops {
222 void (*read_dev_cfg)(struct virtio_hw *hw, size_t offset,
224 void (*write_dev_cfg)(struct virtio_hw *hw, size_t offset,
225 const void *src, int len);
226 void (*reset)(struct virtio_hw *hw);
228 uint8_t (*get_status)(struct virtio_hw *hw);
229 void (*set_status)(struct virtio_hw *hw, uint8_t status);
231 uint64_t (*get_features)(struct virtio_hw *hw);
232 void (*set_features)(struct virtio_hw *hw, uint64_t features);
234 uint8_t (*get_isr)(struct virtio_hw *hw);
236 uint16_t (*set_config_irq)(struct virtio_hw *hw, uint16_t vec);
238 uint16_t (*get_queue_num)(struct virtio_hw *hw, uint16_t queue_id);
239 int (*setup_queue)(struct virtio_hw *hw, struct virtqueue *vq);
240 void (*del_queue)(struct virtio_hw *hw, struct virtqueue *vq);
241 void (*notify_queue)(struct virtio_hw *hw, struct virtqueue *vq);
244 struct virtio_net_config;
247 struct virtnet_ctl *cvq;
248 struct rte_pci_ioport io;
249 uint64_t req_guest_features;
250 uint64_t guest_features;
251 uint32_t max_queue_pairs;
252 uint16_t vtnet_hdr_size;
256 uint8_t use_simple_rxtx;
257 uint8_t mac_addr[ETHER_ADDR_LEN];
258 uint32_t notify_off_multiplier;
260 uint16_t *notify_base;
261 struct rte_pci_device *dev;
262 struct virtio_pci_common_cfg *common_cfg;
263 struct virtio_net_config *dev_cfg;
264 const struct virtio_pci_ops *vtpci_ops;
265 void *virtio_user_dev;
267 struct virtqueue **vqs;
271 * This structure is just a reference to read
272 * net device specific config space; it just a chodu structure
275 struct virtio_net_config {
276 /* The config defining mac address (if VIRTIO_NET_F_MAC) */
277 uint8_t mac[ETHER_ADDR_LEN];
278 /* See VIRTIO_NET_F_STATUS and VIRTIO_NET_S_* above */
280 uint16_t max_virtqueue_pairs;
281 } __attribute__((packed));
284 * How many bits to shift physical queue address written to QUEUE_PFN.
285 * 12 is historical, and due to x86 page size.
287 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
289 /* The alignment to use between consumer and producer parts of vring. */
290 #define VIRTIO_PCI_VRING_ALIGN 4096
293 vtpci_with_feature(struct virtio_hw *hw, uint64_t bit)
295 return (hw->guest_features & (1ULL << bit)) != 0;
299 * Function declaration from virtio_pci.c
301 int vtpci_init(struct rte_pci_device *, struct virtio_hw *,
302 uint32_t *dev_flags);
303 void vtpci_reset(struct virtio_hw *);
305 void vtpci_reinit_complete(struct virtio_hw *);
307 uint8_t vtpci_get_status(struct virtio_hw *);
308 void vtpci_set_status(struct virtio_hw *, uint8_t);
310 uint64_t vtpci_negotiate_features(struct virtio_hw *, uint64_t);
312 void vtpci_write_dev_config(struct virtio_hw *, size_t, const void *, int);
314 void vtpci_read_dev_config(struct virtio_hw *, size_t, void *, int);
316 uint8_t vtpci_isr(struct virtio_hw *);
318 uint16_t vtpci_irq_config(struct virtio_hw *, uint16_t);
320 #endif /* _VIRTIO_PCI_H_ */