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34 #ifndef _VIRTIO_PCI_H_
35 #define _VIRTIO_PCI_H_
40 #include <sys/types.h>
41 #include <machine/cpufunc.h>
46 #include <rte_ethdev.h>
50 /* VirtIO PCI vendor/device ID. */
51 #define VIRTIO_PCI_VENDORID 0x1AF4
52 #define VIRTIO_PCI_DEVICEID_MIN 0x1000
53 #define VIRTIO_PCI_DEVICEID_MAX 0x103F
55 /* VirtIO ABI version, this must match exactly. */
56 #define VIRTIO_PCI_ABI_VERSION 0
59 * VirtIO Header, located in BAR 0.
61 #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/
62 #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */
63 #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */
64 #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */
65 #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */
66 #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */
67 #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */
68 #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading
69 * also clears the register (8, RO) */
70 /* Only if MSIX is enabled: */
71 #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */
72 #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications
75 /* The bit of the ISR which indicates a device has an interrupt. */
76 #define VIRTIO_PCI_ISR_INTR 0x1
77 /* The bit of the ISR which indicates a device configuration change. */
78 #define VIRTIO_PCI_ISR_CONFIG 0x2
79 /* Vector value used to disable MSI for queue. */
80 #define VIRTIO_MSI_NO_VECTOR 0xFFFF
82 /* VirtIO device IDs. */
83 #define VIRTIO_ID_NETWORK 0x01
84 #define VIRTIO_ID_BLOCK 0x02
85 #define VIRTIO_ID_CONSOLE 0x03
86 #define VIRTIO_ID_ENTROPY 0x04
87 #define VIRTIO_ID_BALLOON 0x05
88 #define VIRTIO_ID_IOMEMORY 0x06
89 #define VIRTIO_ID_9P 0x09
91 /* Status byte for guest to report progress. */
92 #define VIRTIO_CONFIG_STATUS_RESET 0x00
93 #define VIRTIO_CONFIG_STATUS_ACK 0x01
94 #define VIRTIO_CONFIG_STATUS_DRIVER 0x02
95 #define VIRTIO_CONFIG_STATUS_DRIVER_OK 0x04
96 #define VIRTIO_CONFIG_STATUS_FEATURES_OK 0x08
97 #define VIRTIO_CONFIG_STATUS_FAILED 0x80
100 * Each virtqueue indirect descriptor list must be physically contiguous.
101 * To allow us to malloc(9) each list individually, limit the number
102 * supported to what will fit in one page. With 4KB pages, this is a limit
103 * of 256 descriptors. If there is ever a need for more, we can switch to
104 * contigmalloc(9) for the larger allocations, similar to what
105 * bus_dmamem_alloc(9) does.
107 * Note the sizeof(struct vring_desc) is 16 bytes.
109 #define VIRTIO_MAX_INDIRECT ((int) (PAGE_SIZE / 16))
111 /* The feature bitmap for virtio net */
112 #define VIRTIO_NET_F_CSUM 0 /* Host handles pkts w/ partial csum */
113 #define VIRTIO_NET_F_GUEST_CSUM 1 /* Guest handles pkts w/ partial csum */
114 #define VIRTIO_NET_F_MAC 5 /* Host has given MAC address. */
115 #define VIRTIO_NET_F_GUEST_TSO4 7 /* Guest can handle TSOv4 in. */
116 #define VIRTIO_NET_F_GUEST_TSO6 8 /* Guest can handle TSOv6 in. */
117 #define VIRTIO_NET_F_GUEST_ECN 9 /* Guest can handle TSO[6] w/ ECN in. */
118 #define VIRTIO_NET_F_GUEST_UFO 10 /* Guest can handle UFO in. */
119 #define VIRTIO_NET_F_HOST_TSO4 11 /* Host can handle TSOv4 in. */
120 #define VIRTIO_NET_F_HOST_TSO6 12 /* Host can handle TSOv6 in. */
121 #define VIRTIO_NET_F_HOST_ECN 13 /* Host can handle TSO[6] w/ ECN in. */
122 #define VIRTIO_NET_F_HOST_UFO 14 /* Host can handle UFO in. */
123 #define VIRTIO_NET_F_MRG_RXBUF 15 /* Host can merge receive buffers. */
124 #define VIRTIO_NET_F_STATUS 16 /* virtio_net_config.status available */
125 #define VIRTIO_NET_F_CTRL_VQ 17 /* Control channel available */
126 #define VIRTIO_NET_F_CTRL_RX 18 /* Control channel RX mode support */
127 #define VIRTIO_NET_F_CTRL_VLAN 19 /* Control channel VLAN filtering */
128 #define VIRTIO_NET_F_CTRL_RX_EXTRA 20 /* Extra RX mode control support */
129 #define VIRTIO_NET_F_GUEST_ANNOUNCE 21 /* Guest can announce device on the
131 #define VIRTIO_NET_F_MQ 22 /* Device supports Receive Flow
133 #define VIRTIO_NET_F_CTRL_MAC_ADDR 23 /* Set MAC address */
135 /* Do we get callbacks when the ring is completely used, even if we've
136 * suppressed them? */
137 #define VIRTIO_F_NOTIFY_ON_EMPTY 24
139 /* Can the device handle any descriptor layout? */
140 #define VIRTIO_F_ANY_LAYOUT 27
142 /* We support indirect buffer descriptors */
143 #define VIRTIO_RING_F_INDIRECT_DESC 28
145 #define VIRTIO_F_VERSION_1 32
148 * Some VirtIO feature bits (currently bits 28 through 31) are
149 * reserved for the transport being used (eg. virtio_ring), the
150 * rest are per-device feature bits.
152 #define VIRTIO_TRANSPORT_F_START 28
153 #define VIRTIO_TRANSPORT_F_END 32
155 /* The Guest publishes the used index for which it expects an interrupt
156 * at the end of the avail ring. Host should ignore the avail->flags field. */
157 /* The Host publishes the avail index for which it expects a kick
158 * at the end of the used ring. Guest should ignore the used->flags field. */
159 #define VIRTIO_RING_F_EVENT_IDX 29
161 #define VIRTIO_NET_S_LINK_UP 1 /* Link is up */
162 #define VIRTIO_NET_S_ANNOUNCE 2 /* Announcement is needed */
165 * Maximum number of virtqueues per device.
167 #define VIRTIO_MAX_VIRTQUEUES 8
169 /* Common configuration */
170 #define VIRTIO_PCI_CAP_COMMON_CFG 1
172 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2
174 #define VIRTIO_PCI_CAP_ISR_CFG 3
175 /* Device specific configuration */
176 #define VIRTIO_PCI_CAP_DEVICE_CFG 4
177 /* PCI configuration access */
178 #define VIRTIO_PCI_CAP_PCI_CFG 5
180 /* This is the PCI capability header: */
181 struct virtio_pci_cap {
182 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
183 uint8_t cap_next; /* Generic PCI field: next ptr. */
184 uint8_t cap_len; /* Generic PCI field: capability length */
185 uint8_t cfg_type; /* Identifies the structure. */
186 uint8_t bar; /* Where to find it. */
187 uint8_t padding[3]; /* Pad to full dword. */
188 uint32_t offset; /* Offset within bar. */
189 uint32_t length; /* Length of the structure, in bytes. */
192 struct virtio_pci_notify_cap {
193 struct virtio_pci_cap cap;
194 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */
197 /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
198 struct virtio_pci_common_cfg {
199 /* About the whole device. */
200 uint32_t device_feature_select; /* read-write */
201 uint32_t device_feature; /* read-only */
202 uint32_t guest_feature_select; /* read-write */
203 uint32_t guest_feature; /* read-write */
204 uint16_t msix_config; /* read-write */
205 uint16_t num_queues; /* read-only */
206 uint8_t device_status; /* read-write */
207 uint8_t config_generation; /* read-only */
209 /* About a specific virtqueue. */
210 uint16_t queue_select; /* read-write */
211 uint16_t queue_size; /* read-write, power of 2. */
212 uint16_t queue_msix_vector; /* read-write */
213 uint16_t queue_enable; /* read-write */
214 uint16_t queue_notify_off; /* read-only */
215 uint32_t queue_desc_lo; /* read-write */
216 uint32_t queue_desc_hi; /* read-write */
217 uint32_t queue_avail_lo; /* read-write */
218 uint32_t queue_avail_hi; /* read-write */
219 uint32_t queue_used_lo; /* read-write */
220 uint32_t queue_used_hi; /* read-write */
225 struct virtio_pci_ops {
226 void (*read_dev_cfg)(struct virtio_hw *hw, size_t offset,
228 void (*write_dev_cfg)(struct virtio_hw *hw, size_t offset,
229 const void *src, int len);
230 void (*reset)(struct virtio_hw *hw);
232 uint8_t (*get_status)(struct virtio_hw *hw);
233 void (*set_status)(struct virtio_hw *hw, uint8_t status);
235 uint64_t (*get_features)(struct virtio_hw *hw);
236 void (*set_features)(struct virtio_hw *hw, uint64_t features);
238 uint8_t (*get_isr)(struct virtio_hw *hw);
240 uint16_t (*set_config_irq)(struct virtio_hw *hw, uint16_t vec);
242 uint16_t (*get_queue_num)(struct virtio_hw *hw, uint16_t queue_id);
243 void (*setup_queue)(struct virtio_hw *hw, struct virtqueue *vq);
244 void (*del_queue)(struct virtio_hw *hw, struct virtqueue *vq);
245 void (*notify_queue)(struct virtio_hw *hw, struct virtqueue *vq);
248 struct virtio_net_config;
251 struct virtqueue *cvq;
253 uint64_t guest_features;
254 uint32_t max_tx_queues;
255 uint32_t max_rx_queues;
256 uint16_t vtnet_hdr_size;
261 uint8_t mac_addr[ETHER_ADDR_LEN];
262 uint32_t notify_off_multiplier;
264 uint16_t *notify_base;
265 struct rte_pci_device *dev;
266 struct virtio_pci_common_cfg *common_cfg;
267 struct virtio_net_config *dev_cfg;
268 const struct virtio_pci_ops *vtpci_ops;
272 * This structure is just a reference to read
273 * net device specific config space; it just a chodu structure
276 struct virtio_net_config {
277 /* The config defining mac address (if VIRTIO_NET_F_MAC) */
278 uint8_t mac[ETHER_ADDR_LEN];
279 /* See VIRTIO_NET_F_STATUS and VIRTIO_NET_S_* above */
281 uint16_t max_virtqueue_pairs;
282 } __attribute__((packed));
285 * The remaining space is defined by each driver as the per-driver
286 * configuration space.
288 #define VIRTIO_PCI_CONFIG(hw) (((hw)->use_msix) ? 24 : 20)
291 * How many bits to shift physical queue address written to QUEUE_PFN.
292 * 12 is historical, and due to x86 page size.
294 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
296 /* The alignment to use between consumer and producer parts of vring. */
297 #define VIRTIO_PCI_VRING_ALIGN 4096
302 outb_p(unsigned char data, unsigned int port)
305 outb(port, (u_char)data);
309 outw_p(unsigned short data, unsigned int port)
311 outw(port, (u_short)data);
315 outl_p(unsigned int data, unsigned int port)
317 outl(port, (u_int)data);
321 #define VIRTIO_PCI_REG_ADDR(hw, reg) \
322 (unsigned short)((hw)->io_base + (reg))
324 #define VIRTIO_READ_REG_1(hw, reg) \
325 inb((VIRTIO_PCI_REG_ADDR((hw), (reg))))
326 #define VIRTIO_WRITE_REG_1(hw, reg, value) \
327 outb_p((unsigned char)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg))))
329 #define VIRTIO_READ_REG_2(hw, reg) \
330 inw((VIRTIO_PCI_REG_ADDR((hw), (reg))))
331 #define VIRTIO_WRITE_REG_2(hw, reg, value) \
332 outw_p((unsigned short)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg))))
334 #define VIRTIO_READ_REG_4(hw, reg) \
335 inl((VIRTIO_PCI_REG_ADDR((hw), (reg))))
336 #define VIRTIO_WRITE_REG_4(hw, reg, value) \
337 outl_p((unsigned int)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg))))
340 vtpci_with_feature(struct virtio_hw *hw, uint64_t bit)
342 return (hw->guest_features & (1ULL << bit)) != 0;
346 * Function declaration from virtio_pci.c
348 int vtpci_init(struct rte_pci_device *, struct virtio_hw *);
349 void vtpci_reset(struct virtio_hw *);
351 void vtpci_reinit_complete(struct virtio_hw *);
353 uint8_t vtpci_get_status(struct virtio_hw *);
354 void vtpci_set_status(struct virtio_hw *, uint8_t);
356 uint64_t vtpci_negotiate_features(struct virtio_hw *, uint64_t);
358 void vtpci_write_dev_config(struct virtio_hw *, size_t, const void *, int);
360 void vtpci_read_dev_config(struct virtio_hw *, size_t, void *, int);
362 uint8_t vtpci_isr(struct virtio_hw *);
364 uint16_t vtpci_irq_config(struct virtio_hw *, uint16_t);
366 #endif /* _VIRTIO_PCI_H_ */