4 * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/queue.h>
43 #include <rte_byteorder.h>
44 #include <rte_common.h>
45 #include <rte_cycles.h>
47 #include <rte_interrupts.h>
49 #include <rte_debug.h>
51 #include <rte_atomic.h>
52 #include <rte_branch_prediction.h>
53 #include <rte_memory.h>
54 #include <rte_memzone.h>
56 #include <rte_alarm.h>
57 #include <rte_ether.h>
58 #include <rte_ethdev.h>
59 #include <rte_atomic.h>
60 #include <rte_string_fns.h>
61 #include <rte_malloc.h>
64 #include "base/vmxnet3_defs.h"
66 #include "vmxnet3_ring.h"
67 #include "vmxnet3_logs.h"
68 #include "vmxnet3_ethdev.h"
70 #define PROCESS_SYS_EVENTS 0
72 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
73 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
74 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
75 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
76 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
77 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
78 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
79 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
80 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
81 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
82 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
83 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
84 int wait_to_complete);
85 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
86 struct rte_eth_stats *stats);
87 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
88 struct rte_eth_dev_info *dev_info);
89 static const uint32_t *
90 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
91 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
92 uint16_t vid, int on);
93 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
94 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
95 struct ether_addr *mac_addr);
97 #if PROCESS_SYS_EVENTS == 1
98 static void vmxnet3_process_events(struct vmxnet3_hw *);
101 * The set of PCI devices this driver supports
103 #define VMWARE_PCI_VENDOR_ID 0x15AD
104 #define VMWARE_DEV_ID_VMXNET3 0x07B0
105 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
106 { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
107 { .vendor_id = 0, /* sentinel */ },
110 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
111 .dev_configure = vmxnet3_dev_configure,
112 .dev_start = vmxnet3_dev_start,
113 .dev_stop = vmxnet3_dev_stop,
114 .dev_close = vmxnet3_dev_close,
115 .promiscuous_enable = vmxnet3_dev_promiscuous_enable,
116 .promiscuous_disable = vmxnet3_dev_promiscuous_disable,
117 .allmulticast_enable = vmxnet3_dev_allmulticast_enable,
118 .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
119 .link_update = vmxnet3_dev_link_update,
120 .stats_get = vmxnet3_dev_stats_get,
121 .mac_addr_set = vmxnet3_mac_addr_set,
122 .dev_infos_get = vmxnet3_dev_info_get,
123 .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
124 .vlan_filter_set = vmxnet3_dev_vlan_filter_set,
125 .vlan_offload_set = vmxnet3_dev_vlan_offload_set,
126 .rx_queue_setup = vmxnet3_dev_rx_queue_setup,
127 .rx_queue_release = vmxnet3_dev_rx_queue_release,
128 .tx_queue_setup = vmxnet3_dev_tx_queue_setup,
129 .tx_queue_release = vmxnet3_dev_tx_queue_release,
132 static const struct rte_memzone *
133 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
134 const char *post_string, int socket_id, uint16_t align)
136 char z_name[RTE_MEMZONE_NAMESIZE];
137 const struct rte_memzone *mz;
139 snprintf(z_name, sizeof(z_name), "%s_%d_%s",
140 dev->driver->pci_drv.name, dev->data->port_id, post_string);
142 mz = rte_memzone_lookup(z_name);
146 return rte_memzone_reserve_aligned(z_name, size,
147 socket_id, 0, align);
151 * Atomically reads the link status information from global
152 * structure rte_eth_dev.
155 * - Pointer to the structure rte_eth_dev to read from.
156 * - Pointer to the buffer to be saved with the link status.
159 * - On success, zero.
160 * - On failure, negative value.
164 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
165 struct rte_eth_link *link)
167 struct rte_eth_link *dst = link;
168 struct rte_eth_link *src = &(dev->data->dev_link);
170 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
171 *(uint64_t *)src) == 0)
178 * Atomically writes the link status information into global
179 * structure rte_eth_dev.
182 * - Pointer to the structure rte_eth_dev to write to.
183 * - Pointer to the buffer to be saved with the link status.
186 * - On success, zero.
187 * - On failure, negative value.
190 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
191 struct rte_eth_link *link)
193 struct rte_eth_link *dst = &(dev->data->dev_link);
194 struct rte_eth_link *src = link;
196 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
197 *(uint64_t *)src) == 0)
204 * This function is based on vmxnet3_disable_intr()
207 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
211 PMD_INIT_FUNC_TRACE();
213 hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
214 for (i = 0; i < VMXNET3_MAX_INTRS; i++)
215 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
219 * It returns 0 on success.
222 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
224 struct rte_pci_device *pci_dev;
225 struct vmxnet3_hw *hw = eth_dev->data->dev_private;
226 uint32_t mac_hi, mac_lo, ver;
228 PMD_INIT_FUNC_TRACE();
230 eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
231 eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
232 eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
233 pci_dev = eth_dev->pci_dev;
236 * for secondary processes, we don't initialize any further as primary
237 * has already done this work.
239 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
242 rte_eth_copy_pci_info(eth_dev, pci_dev);
244 /* Vendor and Device ID need to be set before init of shared code */
245 hw->device_id = pci_dev->id.device_id;
246 hw->vendor_id = pci_dev->id.vendor_id;
247 hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
248 hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
250 hw->num_rx_queues = 1;
251 hw->num_tx_queues = 1;
252 hw->bufs_per_pkt = 1;
254 /* Check h/w version compatibility with driver. */
255 ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
256 PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
258 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
260 PMD_INIT_LOG(ERR, "Incompatible h/w version, should be 0x1");
264 /* Check UPT version compatibility with driver. */
265 ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
266 PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
268 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
270 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
274 /* Getting MAC Address */
275 mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
276 mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
277 memcpy(hw->perm_addr , &mac_lo, 4);
278 memcpy(hw->perm_addr+4, &mac_hi, 2);
280 /* Allocate memory for storing MAC addresses */
281 eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
282 VMXNET3_MAX_MAC_ADDRS, 0);
283 if (eth_dev->data->mac_addrs == NULL) {
285 "Failed to allocate %d bytes needed to store MAC addresses",
286 ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
289 /* Copy the permanent MAC address */
290 ether_addr_copy((struct ether_addr *) hw->perm_addr,
291 ð_dev->data->mac_addrs[0]);
293 PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
294 hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
295 hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
297 /* Put device in Quiesce Mode */
298 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
300 /* allow untagged pkts */
301 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
307 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
309 struct vmxnet3_hw *hw = eth_dev->data->dev_private;
311 PMD_INIT_FUNC_TRACE();
313 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
316 if (hw->adapter_stopped == 0)
317 vmxnet3_dev_close(eth_dev);
319 eth_dev->dev_ops = NULL;
320 eth_dev->rx_pkt_burst = NULL;
321 eth_dev->tx_pkt_burst = NULL;
323 rte_free(eth_dev->data->mac_addrs);
324 eth_dev->data->mac_addrs = NULL;
329 static struct eth_driver rte_vmxnet3_pmd = {
331 .name = "rte_vmxnet3_pmd",
332 .id_table = pci_id_vmxnet3_map,
333 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
335 .eth_dev_init = eth_vmxnet3_dev_init,
336 .eth_dev_uninit = eth_vmxnet3_dev_uninit,
337 .dev_private_size = sizeof(struct vmxnet3_hw),
341 * Driver initialization routine.
342 * Invoked once at EAL init time.
343 * Register itself as the [Poll Mode] Driver of Virtual PCI VMXNET3 devices.
346 rte_vmxnet3_pmd_init(const char *name __rte_unused, const char *param __rte_unused)
348 PMD_INIT_FUNC_TRACE();
350 rte_eth_driver_register(&rte_vmxnet3_pmd);
355 vmxnet3_dev_configure(struct rte_eth_dev *dev)
357 const struct rte_memzone *mz;
358 struct vmxnet3_hw *hw = dev->data->dev_private;
361 PMD_INIT_FUNC_TRACE();
363 if (dev->data->nb_rx_queues > UINT8_MAX ||
364 dev->data->nb_tx_queues > UINT8_MAX)
367 size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
368 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
370 if (size > UINT16_MAX)
373 hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
374 hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
377 * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
380 mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
381 "shared", rte_socket_id(), 8);
384 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
387 memset(mz->addr, 0, mz->len);
389 hw->shared = mz->addr;
390 hw->sharedPA = mz->phys_addr;
393 * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
396 mz = gpa_zone_reserve(dev, size, "queuedesc",
397 rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
399 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
402 memset(mz->addr, 0, mz->len);
404 hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
405 hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
407 hw->queueDescPA = mz->phys_addr;
408 hw->queue_desc_len = (uint16_t)size;
410 if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
412 /* Allocate memory structure for UPT1_RSSConf and configure */
413 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf), "rss_conf",
414 rte_socket_id(), RTE_CACHE_LINE_SIZE);
417 "ERROR: Creating rss_conf structure zone");
420 memset(mz->addr, 0, mz->len);
422 hw->rss_conf = mz->addr;
423 hw->rss_confPA = mz->phys_addr;
430 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
435 "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
436 addr[0], addr[1], addr[2],
437 addr[3], addr[4], addr[5]);
439 val = *(const uint32_t *)addr;
440 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
442 val = (addr[5] << 8) | addr[4];
443 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
447 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
449 struct rte_eth_conf port_conf = dev->data->dev_conf;
450 struct vmxnet3_hw *hw = dev->data->dev_private;
451 uint32_t mtu = dev->data->mtu;
452 Vmxnet3_DriverShared *shared = hw->shared;
453 Vmxnet3_DSDevRead *devRead = &shared->devRead;
457 shared->magic = VMXNET3_REV1_MAGIC;
458 devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
460 /* Setting up Guest OS information */
461 devRead->misc.driverInfo.gos.gosBits = sizeof(void *) == 4 ?
462 VMXNET3_GOS_BITS_32 :
464 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
465 devRead->misc.driverInfo.vmxnet3RevSpt = 1;
466 devRead->misc.driverInfo.uptVerSpt = 1;
468 devRead->misc.mtu = rte_le_to_cpu_32(mtu);
469 devRead->misc.queueDescPA = hw->queueDescPA;
470 devRead->misc.queueDescLen = hw->queue_desc_len;
471 devRead->misc.numTxQueues = hw->num_tx_queues;
472 devRead->misc.numRxQueues = hw->num_rx_queues;
475 * Set number of interrupts to 1
476 * PMD disables all the interrupts but this is MUST to activate device
477 * It needs at least one interrupt for link events to handle
478 * So we'll disable it later after device activation if needed
480 devRead->intrConf.numIntrs = 1;
481 devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
483 for (i = 0; i < hw->num_tx_queues; i++) {
484 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
485 vmxnet3_tx_queue_t *txq = dev->data->tx_queues[i];
487 tqd->ctrl.txNumDeferred = 0;
488 tqd->ctrl.txThreshold = 1;
489 tqd->conf.txRingBasePA = txq->cmd_ring.basePA;
490 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
491 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
493 tqd->conf.txRingSize = txq->cmd_ring.size;
494 tqd->conf.compRingSize = txq->comp_ring.size;
495 tqd->conf.dataRingSize = txq->data_ring.size;
496 tqd->conf.intrIdx = txq->comp_ring.intr_idx;
497 tqd->status.stopped = TRUE;
498 tqd->status.error = 0;
499 memset(&tqd->stats, 0, sizeof(tqd->stats));
502 for (i = 0; i < hw->num_rx_queues; i++) {
503 Vmxnet3_RxQueueDesc *rqd = &hw->rqd_start[i];
504 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
506 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
507 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
508 rqd->conf.compRingBasePA = rxq->comp_ring.basePA;
510 rqd->conf.rxRingSize[0] = rxq->cmd_ring[0].size;
511 rqd->conf.rxRingSize[1] = rxq->cmd_ring[1].size;
512 rqd->conf.compRingSize = rxq->comp_ring.size;
513 rqd->conf.intrIdx = rxq->comp_ring.intr_idx;
514 rqd->status.stopped = TRUE;
515 rqd->status.error = 0;
516 memset(&rqd->stats, 0, sizeof(rqd->stats));
519 /* RxMode set to 0 of VMXNET3_RXM_xxx */
520 devRead->rxFilterConf.rxMode = 0;
522 /* Setting up feature flags */
523 if (dev->data->dev_conf.rxmode.hw_ip_checksum)
524 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
526 if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
527 ret = vmxnet3_rss_configure(dev);
528 if (ret != VMXNET3_SUCCESS)
531 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
532 devRead->rssConfDesc.confVer = 1;
533 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
534 devRead->rssConfDesc.confPA = hw->rss_confPA;
537 vmxnet3_dev_vlan_offload_set(dev,
538 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
540 vmxnet3_write_mac(hw, hw->perm_addr);
542 return VMXNET3_SUCCESS;
546 * Configure device link speed and setup link.
547 * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
548 * It returns 0 on success.
551 vmxnet3_dev_start(struct rte_eth_dev *dev)
554 struct vmxnet3_hw *hw = dev->data->dev_private;
556 PMD_INIT_FUNC_TRACE();
558 ret = vmxnet3_setup_driver_shared(dev);
559 if (ret != VMXNET3_SUCCESS)
562 /* Exchange shared data with device */
563 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
564 VMXNET3_GET_ADDR_LO(hw->sharedPA));
565 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
566 VMXNET3_GET_ADDR_HI(hw->sharedPA));
568 /* Activate device by register write */
569 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
570 status = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
573 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
577 /* Disable interrupts */
578 vmxnet3_disable_intr(hw);
581 * Load RX queues with blank mbufs and update next2fill index for device
582 * Update RxMode of the device
584 ret = vmxnet3_dev_rxtx_init(dev);
585 if (ret != VMXNET3_SUCCESS) {
586 PMD_INIT_LOG(ERR, "Device receive init: UNSUCCESSFUL");
590 /* Setting proper Rx Mode and issue Rx Mode Update command */
591 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
594 * Don't need to handle events for now
596 #if PROCESS_SYS_EVENTS == 1
597 events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
598 PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
599 vmxnet3_process_events(hw);
605 * Stop device: disable rx and tx functions to allow for reconfiguring.
608 vmxnet3_dev_stop(struct rte_eth_dev *dev)
610 struct rte_eth_link link;
611 struct vmxnet3_hw *hw = dev->data->dev_private;
613 PMD_INIT_FUNC_TRACE();
615 if (hw->adapter_stopped == 1) {
616 PMD_INIT_LOG(DEBUG, "Device already closed.");
620 /* disable interrupts */
621 vmxnet3_disable_intr(hw);
623 /* quiesce the device first */
624 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
625 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
626 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
628 /* reset the device */
629 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
630 PMD_INIT_LOG(DEBUG, "Device reset.");
631 hw->adapter_stopped = 0;
633 vmxnet3_dev_clear_queues(dev);
635 /* Clear recorded link status */
636 memset(&link, 0, sizeof(link));
637 vmxnet3_dev_atomic_write_link_status(dev, &link);
641 * Reset and stop device.
644 vmxnet3_dev_close(struct rte_eth_dev *dev)
646 struct vmxnet3_hw *hw = dev->data->dev_private;
648 PMD_INIT_FUNC_TRACE();
650 vmxnet3_dev_stop(dev);
651 hw->adapter_stopped = 1;
655 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
658 struct vmxnet3_hw *hw = dev->data->dev_private;
660 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
662 RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
663 for (i = 0; i < hw->num_tx_queues; i++) {
664 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
666 stats->q_opackets[i] = txStats->ucastPktsTxOK +
667 txStats->mcastPktsTxOK +
668 txStats->bcastPktsTxOK;
669 stats->q_obytes[i] = txStats->ucastBytesTxOK +
670 txStats->mcastBytesTxOK +
671 txStats->bcastBytesTxOK;
673 stats->opackets += stats->q_opackets[i];
674 stats->obytes += stats->q_obytes[i];
675 stats->oerrors += txStats->pktsTxError +
676 txStats->pktsTxDiscard;
679 RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
680 for (i = 0; i < hw->num_rx_queues; i++) {
681 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
683 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
684 rxStats->mcastPktsRxOK +
685 rxStats->bcastPktsRxOK;
687 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
688 rxStats->mcastBytesRxOK +
689 rxStats->bcastBytesRxOK;
691 stats->ipackets += stats->q_ipackets[i];
692 stats->ibytes += stats->q_ibytes[i];
694 stats->q_errors[i] = rxStats->pktsRxError;
695 stats->ierrors += rxStats->pktsRxError;
696 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
701 vmxnet3_dev_info_get(__attribute__((unused))struct rte_eth_dev *dev,
702 struct rte_eth_dev_info *dev_info)
704 dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
705 dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
706 dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
707 dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
708 dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
710 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
711 dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
713 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
714 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
715 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
719 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
720 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
721 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
725 dev_info->rx_offload_capa =
726 DEV_RX_OFFLOAD_VLAN_STRIP |
727 DEV_RX_OFFLOAD_UDP_CKSUM |
728 DEV_RX_OFFLOAD_TCP_CKSUM;
730 dev_info->tx_offload_capa =
731 DEV_TX_OFFLOAD_VLAN_INSERT |
732 DEV_TX_OFFLOAD_TCP_CKSUM |
733 DEV_TX_OFFLOAD_UDP_CKSUM |
734 DEV_TX_OFFLOAD_TCP_TSO;
737 static const uint32_t *
738 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
740 static const uint32_t ptypes[] = {
741 RTE_PTYPE_L3_IPV4_EXT,
746 if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
752 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
754 struct vmxnet3_hw *hw = dev->data->dev_private;
756 vmxnet3_write_mac(hw, mac_addr->addr_bytes);
759 /* return 0 means link status changed, -1 means not changed */
761 vmxnet3_dev_link_update(struct rte_eth_dev *dev, __attribute__((unused)) int wait_to_complete)
763 struct vmxnet3_hw *hw = dev->data->dev_private;
764 struct rte_eth_link old, link;
767 if (dev->data->dev_started == 0)
768 return -1; /* Link status doesn't change for stopped dev */
770 memset(&link, 0, sizeof(link));
771 vmxnet3_dev_atomic_read_link_status(dev, &old);
773 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
774 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
777 link.link_status = ETH_LINK_UP;
778 link.link_duplex = ETH_LINK_FULL_DUPLEX;
779 link.link_speed = ETH_SPEED_NUM_10G;
780 link.link_autoneg = ETH_LINK_SPEED_FIXED;
783 vmxnet3_dev_atomic_write_link_status(dev, &link);
785 return (old.link_status == link.link_status) ? -1 : 0;
788 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
790 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set) {
792 struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
795 rxConf->rxMode = rxConf->rxMode | feature;
797 rxConf->rxMode = rxConf->rxMode & (~feature);
799 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
802 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
804 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
806 struct vmxnet3_hw *hw = dev->data->dev_private;
807 uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
809 memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
810 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
812 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
813 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
816 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
818 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
820 struct vmxnet3_hw *hw = dev->data->dev_private;
821 uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
823 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
824 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
825 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
826 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
829 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
831 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
833 struct vmxnet3_hw *hw = dev->data->dev_private;
835 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
838 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
840 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
842 struct vmxnet3_hw *hw = dev->data->dev_private;
844 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
847 /* Enable/disable filter on vlan */
849 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
851 struct vmxnet3_hw *hw = dev->data->dev_private;
852 struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
853 uint32_t *vf_table = rxConf->vfTable;
855 /* save state for restore */
857 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
859 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
861 /* don't change active filter if in promiscuous mode */
862 if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
865 /* set in hardware */
867 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
869 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
871 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
872 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
877 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
879 struct vmxnet3_hw *hw = dev->data->dev_private;
880 Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
881 uint32_t *vf_table = devRead->rxFilterConf.vfTable;
883 if (mask & ETH_VLAN_STRIP_MASK) {
884 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
885 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
887 devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
889 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
890 VMXNET3_CMD_UPDATE_FEATURE);
893 if (mask & ETH_VLAN_FILTER_MASK) {
894 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
895 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
897 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
899 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
900 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
904 #if PROCESS_SYS_EVENTS == 1
906 vmxnet3_process_events(struct vmxnet3_hw *hw)
908 uint32_t events = hw->shared->ecr;
911 PMD_INIT_LOG(ERR, "No events to process");
916 * ECR bits when written with 1b are cleared. Hence write
917 * events back to ECR so that the bits which were set will be reset.
919 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
921 /* Check if link state has changed */
922 if (events & VMXNET3_ECR_LINK)
924 "Process events in %s(): VMXNET3_ECR_LINK event", __func__);
926 /* Check if there is an error on xmit/recv queues */
927 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
928 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_QUEUE_STATUS);
930 if (hw->tqd_start->status.stopped)
931 PMD_INIT_LOG(ERR, "tq error 0x%x",
932 hw->tqd_start->status.error);
934 if (hw->rqd_start->status.stopped)
935 PMD_INIT_LOG(ERR, "rq error 0x%x",
936 hw->rqd_start->status.error);
938 /* Reset the device */
939 /* Have to reset the device */
942 if (events & VMXNET3_ECR_DIC)
943 PMD_INIT_LOG(ERR, "Device implementation change event.");
945 if (events & VMXNET3_ECR_DEBUG)
946 PMD_INIT_LOG(ERR, "Debug event generated by device.");
951 static struct rte_driver rte_vmxnet3_driver = {
953 .init = rte_vmxnet3_pmd_init,
956 PMD_REGISTER_DRIVER(rte_vmxnet3_driver, vmxnet3);
957 DRIVER_REGISTER_PCI_TABLE(vmxnet3, pci_id_vmxnet3_map);