drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <fcntl.h>
  42 #include <inttypes.h>
  43 #include <rte_byteorder.h>
  44 #include <rte_common.h>
  45 #include <rte_cycles.h>
  46
  47 #include <rte_interrupts.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_pci.h>
  51 #include <rte_atomic.h>
  52 #include <rte_branch_prediction.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_eal.h>
  56 #include <rte_alarm.h>
  57 #include <rte_ether.h>
  58 #include <rte_ethdev.h>
  59 #include <rte_atomic.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_malloc.h>
  62 #include <rte_dev.h>
  63
  64 #include "base/vmxnet3_defs.h"
  65
  66 #include "vmxnet3_ring.h"
  67 #include "vmxnet3_logs.h"
  68 #include "vmxnet3_ethdev.h"
  69
  70 #define PROCESS_SYS_EVENTS 0
  71
  72 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  73
  74 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  75 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  76 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  77 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  78 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  79 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  80 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  81 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  82 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  83 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  84 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  85 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  86                                    int wait_to_complete);
  87 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  88                                   struct rte_eth_stats *stats);
  89 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  90                                  struct rte_eth_dev_info *dev_info);
  91 static const uint32_t *
  92 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  93 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  94                                        uint16_t vid, int on);
  95 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  96 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  97                                  struct ether_addr *mac_addr);
  98
  99 #if PROCESS_SYS_EVENTS == 1
 100 static void vmxnet3_process_events(struct vmxnet3_hw *);
 101 #endif
 102 /*
 103  * The set of PCI devices this driver supports
 104  */
 105 #define VMWARE_PCI_VENDOR_ID 0x15AD
 106 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 107 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 108         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 109         { .vendor_id = 0, /* sentinel */ },
 110 };
 111
 112 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 113         .dev_configure        = vmxnet3_dev_configure,
 114         .dev_start            = vmxnet3_dev_start,
 115         .dev_stop             = vmxnet3_dev_stop,
 116         .dev_close            = vmxnet3_dev_close,
 117         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 118         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 119         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 120         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 121         .link_update          = vmxnet3_dev_link_update,
 122         .stats_get            = vmxnet3_dev_stats_get,
 123         .mac_addr_set         = vmxnet3_mac_addr_set,
 124         .dev_infos_get        = vmxnet3_dev_info_get,
 125         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 126         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 127         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 128         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 129         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 130         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 131         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 132 };
 133
 134 static const struct rte_memzone *
 135 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 136                  const char *post_string, int socket_id,
 137                  uint16_t align, bool reuse)
 138 {
 139         char z_name[RTE_MEMZONE_NAMESIZE];
 140         const struct rte_memzone *mz;
 141
 142         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 143                  dev->data->drv_name, dev->data->port_id, post_string);
 144
 145         mz = rte_memzone_lookup(z_name);
 146         if (!reuse) {
 147                 if (mz)
 148                         rte_memzone_free(mz);
 149                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 150                                                    0, align);
 151         }
 152
 153         if (mz)
 154                 return mz;
 155
 156         return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
 157 }
 158
 159 /**
 160  * Atomically reads the link status information from global
 161  * structure rte_eth_dev.
 162  *
 163  * @param dev
 164  *   - Pointer to the structure rte_eth_dev to read from.
 165  *   - Pointer to the buffer to be saved with the link status.
 166  *
 167  * @return
 168  *   - On success, zero.
 169  *   - On failure, negative value.
 170  */
 171
 172 static int
 173 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 174                                     struct rte_eth_link *link)
 175 {
 176         struct rte_eth_link *dst = link;
 177         struct rte_eth_link *src = &(dev->data->dev_link);
 178
 179         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 180                                 *(uint64_t *)src) == 0)
 181                 return -1;
 182
 183         return 0;
 184 }
 185
 186 /**
 187  * Atomically writes the link status information into global
 188  * structure rte_eth_dev.
 189  *
 190  * @param dev
 191  *   - Pointer to the structure rte_eth_dev to write to.
 192  *   - Pointer to the buffer to be saved with the link status.
 193  *
 194  * @return
 195  *   - On success, zero.
 196  *   - On failure, negative value.
 197  */
 198 static int
 199 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 200                                      struct rte_eth_link *link)
 201 {
 202         struct rte_eth_link *dst = &(dev->data->dev_link);
 203         struct rte_eth_link *src = link;
 204
 205         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 206                                 *(uint64_t *)src) == 0)
 207                 return -1;
 208
 209         return 0;
 210 }
 211
 212 /*
 213  * This function is based on vmxnet3_disable_intr()
 214  */
 215 static void
 216 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 217 {
 218         int i;
 219
 220         PMD_INIT_FUNC_TRACE();
 221
 222         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 223         for (i = 0; i < VMXNET3_MAX_INTRS; i++)
 224                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 225 }
 226
 227 /*
 228  * Gets tx data ring descriptor size.
 229  */
 230 static uint16_t
 231 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
 232 {
 233         uint16 txdata_desc_size;
 234
 235         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 236                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
 237         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 238
 239         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
 240                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
 241                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
 242                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
 243 }
 244
 245 /*
 246  * It returns 0 on success.
 247  */
 248 static int
 249 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 250 {
 251         struct rte_pci_device *pci_dev;
 252         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 253         uint32_t mac_hi, mac_lo, ver;
 254
 255         PMD_INIT_FUNC_TRACE();
 256
 257         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 258         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 259         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 260         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 261         pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
 262
 263         /*
 264          * for secondary processes, we don't initialize any further as primary
 265          * has already done this work.
 266          */
 267         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 268                 return 0;
 269
 270         rte_eth_copy_pci_info(eth_dev, pci_dev);
 271         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
 272
 273         /* Vendor and Device ID need to be set before init of shared code */
 274         hw->device_id = pci_dev->id.device_id;
 275         hw->vendor_id = pci_dev->id.vendor_id;
 276         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 277         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 278
 279         hw->num_rx_queues = 1;
 280         hw->num_tx_queues = 1;
 281         hw->bufs_per_pkt = 1;
 282
 283         /* Check h/w version compatibility with driver. */
 284         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 285         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 286
 287         if (ver & (1 << VMXNET3_REV_2)) {
 288                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 289                                        1 << VMXNET3_REV_2);
 290                 hw->version = VMXNET3_REV_2 + 1;
 291         } else if (ver & (1 << VMXNET3_REV_1)) {
 292                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 293                                        1 << VMXNET3_REV_1);
 294                 hw->version = VMXNET3_REV_1 + 1;
 295         } else {
 296                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
 297                 return -EIO;
 298         }
 299
 300         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
 301
 302         /* Check UPT version compatibility with driver. */
 303         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 304         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 305         if (ver & 0x1)
 306                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 307         else {
 308                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 309                 return -EIO;
 310         }
 311
 312         /* Getting MAC Address */
 313         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 314         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 315         memcpy(hw->perm_addr, &mac_lo, 4);
 316         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 317
 318         /* Allocate memory for storing MAC addresses */
 319         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 320                                                VMXNET3_MAX_MAC_ADDRS, 0);
 321         if (eth_dev->data->mac_addrs == NULL) {
 322                 PMD_INIT_LOG(ERR,
 323                              "Failed to allocate %d bytes needed to store MAC addresses",
 324                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 325                 return -ENOMEM;
 326         }
 327         /* Copy the permanent MAC address */
 328         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 329                         &eth_dev->data->mac_addrs[0]);
 330
 331         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 332                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 333                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 334
 335         /* Put device in Quiesce Mode */
 336         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 337
 338         /* allow untagged pkts */
 339         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 340
 341         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 342                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
 343
 344         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 345                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
 346         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
 347                    hw->rxdata_desc_size);
 348
 349         return 0;
 350 }
 351
 352 static int
 353 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 354 {
 355         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 356
 357         PMD_INIT_FUNC_TRACE();
 358
 359         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 360                 return 0;
 361
 362         if (hw->adapter_stopped == 0)
 363                 vmxnet3_dev_close(eth_dev);
 364
 365         eth_dev->dev_ops = NULL;
 366         eth_dev->rx_pkt_burst = NULL;
 367         eth_dev->tx_pkt_burst = NULL;
 368         eth_dev->tx_pkt_prepare = NULL;
 369
 370         rte_free(eth_dev->data->mac_addrs);
 371         eth_dev->data->mac_addrs = NULL;
 372
 373         return 0;
 374 }
 375
 376 static struct eth_driver rte_vmxnet3_pmd = {
 377         .pci_drv = {
 378                 .id_table = pci_id_vmxnet3_map,
 379                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 380                 .probe = rte_eth_dev_pci_probe,
 381                 .remove = rte_eth_dev_pci_remove,
 382         },
 383         .eth_dev_init = eth_vmxnet3_dev_init,
 384         .eth_dev_uninit = eth_vmxnet3_dev_uninit,
 385         .dev_private_size = sizeof(struct vmxnet3_hw),
 386 };
 387
 388 static int
 389 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 390 {
 391         const struct rte_memzone *mz;
 392         struct vmxnet3_hw *hw = dev->data->dev_private;
 393         size_t size;
 394
 395         PMD_INIT_FUNC_TRACE();
 396
 397         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 398             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 399                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 400                 return -EINVAL;
 401         }
 402
 403         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 404                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 405                 return -EINVAL;
 406         }
 407
 408         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 409                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 410
 411         if (size > UINT16_MAX)
 412                 return -EINVAL;
 413
 414         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 415         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 416
 417         /*
 418          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 419          * on current socket
 420          */
 421         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 422                               "shared", rte_socket_id(), 8, 1);
 423
 424         if (mz == NULL) {
 425                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 426                 return -ENOMEM;
 427         }
 428         memset(mz->addr, 0, mz->len);
 429
 430         hw->shared = mz->addr;
 431         hw->sharedPA = mz->phys_addr;
 432
 433         /*
 434          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 435          * on current socket.
 436          *
 437          * We cannot reuse this memzone from previous allocation as its size
 438          * depends on the number of tx and rx queues, which could be different
 439          * from one config to another.
 440          */
 441         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 442                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 443         if (mz == NULL) {
 444                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 445                 return -ENOMEM;
 446         }
 447         memset(mz->addr, 0, mz->len);
 448
 449         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 450         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 451
 452         hw->queueDescPA = mz->phys_addr;
 453         hw->queue_desc_len = (uint16_t)size;
 454
 455         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 456                 /* Allocate memory structure for UPT1_RSSConf and configure */
 457                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 458                                       "rss_conf", rte_socket_id(),
 459                                       RTE_CACHE_LINE_SIZE, 1);
 460                 if (mz == NULL) {
 461                         PMD_INIT_LOG(ERR,
 462                                      "ERROR: Creating rss_conf structure zone");
 463                         return -ENOMEM;
 464                 }
 465                 memset(mz->addr, 0, mz->len);
 466
 467                 hw->rss_conf = mz->addr;
 468                 hw->rss_confPA = mz->phys_addr;
 469         }
 470
 471         return 0;
 472 }
 473
 474 static void
 475 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 476 {
 477         uint32_t val;
 478
 479         PMD_INIT_LOG(DEBUG,
 480                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 481                      addr[0], addr[1], addr[2],
 482                      addr[3], addr[4], addr[5]);
 483
 484         val = *(const uint32_t *)addr;
 485         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 486
 487         val = (addr[5] << 8) | addr[4];
 488         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 489 }
 490
 491 static int
 492 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 493 {
 494         struct vmxnet3_hw *hw = dev->data->dev_private;
 495         Vmxnet3_DriverShared *shared = hw->shared;
 496         Vmxnet3_CmdInfo *cmdInfo;
 497         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
 498         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
 499         uint32_t num, i, j, size;
 500
 501         if (hw->memRegsPA == 0) {
 502                 const struct rte_memzone *mz;
 503
 504                 size = sizeof(Vmxnet3_MemRegs) +
 505                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
 506                         sizeof(Vmxnet3_MemoryRegion);
 507
 508                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
 509                                       1);
 510                 if (mz == NULL) {
 511                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
 512                         return -ENOMEM;
 513                 }
 514                 memset(mz->addr, 0, mz->len);
 515                 hw->memRegs = mz->addr;
 516                 hw->memRegsPA = mz->phys_addr;
 517         }
 518
 519         num = hw->num_rx_queues;
 520
 521         for (i = 0; i < num; i++) {
 522                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
 523
 524                 mp[i] = rxq->mp;
 525                 index[i] = 1 << i;
 526         }
 527
 528         /*
 529          * The same mempool could be used by multiple queues. In such a case,
 530          * remove duplicate mempool entries. Only one entry is kept with
 531          * bitmask indicating queues that are using this mempool.
 532          */
 533         for (i = 1; i < num; i++) {
 534                 for (j = 0; j < i; j++) {
 535                         if (mp[i] == mp[j]) {
 536                                 mp[i] = NULL;
 537                                 index[j] |= 1 << i;
 538                                 break;
 539                         }
 540                 }
 541         }
 542
 543         j = 0;
 544         for (i = 0; i < num; i++) {
 545                 if (mp[i] == NULL)
 546                         continue;
 547
 548                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
 549
 550                 mr->startPA =
 551                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->phys_addr;
 552                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
 553                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
 554                 mr->txQueueBits = index[i];
 555                 mr->rxQueueBits = index[i];
 556
 557                 PMD_INIT_LOG(INFO,
 558                              "index: %u startPA: %" PRIu64 " length: %u, "
 559                              "rxBits: %x",
 560                              j, mr->startPA, mr->length, mr->rxQueueBits);
 561                 j++;
 562         }
 563         hw->memRegs->numRegs = j;
 564         PMD_INIT_LOG(INFO, "numRegs: %u", j);
 565
 566         size = sizeof(Vmxnet3_MemRegs) +
 567                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
 568
 569         cmdInfo = &shared->cu.cmdInfo;
 570         cmdInfo->varConf.confVer = 1;
 571         cmdInfo->varConf.confLen = size;
 572         cmdInfo->varConf.confPA = hw->memRegsPA;
 573
 574         return 0;
 575 }
 576
 577 static int
 578 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 579 {
 580         struct rte_eth_conf port_conf = dev->data->dev_conf;
 581         struct vmxnet3_hw *hw = dev->data->dev_private;
 582         uint32_t mtu = dev->data->mtu;
 583         Vmxnet3_DriverShared *shared = hw->shared;
 584         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 585         uint32_t i;
 586         int ret;
 587
 588         shared->magic = VMXNET3_REV1_MAGIC;
 589         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 590
 591         /* Setting up Guest OS information */
 592         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 593                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 594         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 595         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 596         devRead->misc.driverInfo.uptVerSpt     = 1;
 597
 598         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 599         devRead->misc.queueDescPA  = hw->queueDescPA;
 600         devRead->misc.queueDescLen = hw->queue_desc_len;
 601         devRead->misc.numTxQueues  = hw->num_tx_queues;
 602         devRead->misc.numRxQueues  = hw->num_rx_queues;
 603
 604         /*
 605          * Set number of interrupts to 1
 606          * PMD disables all the interrupts but this is MUST to activate device
 607          * It needs at least one interrupt for link events to handle
 608          * So we'll disable it later after device activation if needed
 609          */
 610         devRead->intrConf.numIntrs = 1;
 611         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 612
 613         for (i = 0; i < hw->num_tx_queues; i++) {
 614                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 615                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 616
 617                 tqd->ctrl.txNumDeferred  = 0;
 618                 tqd->ctrl.txThreshold    = 1;
 619                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 620                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 621                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 622
 623                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 624                 tqd->conf.compRingSize = txq->comp_ring.size;
 625                 tqd->conf.dataRingSize = txq->data_ring.size;
 626                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
 627                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 628                 tqd->status.stopped    = TRUE;
 629                 tqd->status.error      = 0;
 630                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 631         }
 632
 633         for (i = 0; i < hw->num_rx_queues; i++) {
 634                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 635                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 636
 637                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 638                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 639                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 640
 641                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 642                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 643                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 644                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 645                 if (VMXNET3_VERSION_GE_3(hw)) {
 646                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
 647                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
 648                 }
 649                 rqd->status.stopped       = TRUE;
 650                 rqd->status.error         = 0;
 651                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 652         }
 653
 654         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 655         devRead->rxFilterConf.rxMode = 0;
 656
 657         /* Setting up feature flags */
 658         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 659                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 660
 661         if (dev->data->dev_conf.rxmode.enable_lro) {
 662                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 663                 devRead->misc.maxNumRxSG = 0;
 664         }
 665
 666         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 667                 ret = vmxnet3_rss_configure(dev);
 668                 if (ret != VMXNET3_SUCCESS)
 669                         return ret;
 670
 671                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 672                 devRead->rssConfDesc.confVer = 1;
 673                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 674                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 675         }
 676
 677         vmxnet3_dev_vlan_offload_set(dev,
 678                                      ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 679
 680         vmxnet3_write_mac(hw, hw->perm_addr);
 681
 682         return VMXNET3_SUCCESS;
 683 }
 684
 685 /*
 686  * Configure device link speed and setup link.
 687  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 688  * It returns 0 on success.
 689  */
 690 static int
 691 vmxnet3_dev_start(struct rte_eth_dev *dev)
 692 {
 693         int ret;
 694         struct vmxnet3_hw *hw = dev->data->dev_private;
 695
 696         PMD_INIT_FUNC_TRACE();
 697
 698         ret = vmxnet3_setup_driver_shared(dev);
 699         if (ret != VMXNET3_SUCCESS)
 700                 return ret;
 701
 702         /* Exchange shared data with device */
 703         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 704                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 705         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 706                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 707
 708         /* Activate device by register write */
 709         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 710         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 711
 712         if (ret != 0) {
 713                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 714                 return -EINVAL;
 715         }
 716
 717         /* Setup memory region for rx buffers */
 718         ret = vmxnet3_dev_setup_memreg(dev);
 719         if (ret == 0) {
 720                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 721                                        VMXNET3_CMD_REGISTER_MEMREGS);
 722                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 723                 if (ret != 0)
 724                         PMD_INIT_LOG(DEBUG,
 725                                      "Failed in setup memory region cmd\n");
 726                 ret = 0;
 727         } else {
 728                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
 729         }
 730
 731         /* Disable interrupts */
 732         vmxnet3_disable_intr(hw);
 733
 734         /*
 735          * Load RX queues with blank mbufs and update next2fill index for device
 736          * Update RxMode of the device
 737          */
 738         ret = vmxnet3_dev_rxtx_init(dev);
 739         if (ret != VMXNET3_SUCCESS) {
 740                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 741                 return ret;
 742         }
 743
 744         hw->adapter_stopped = FALSE;
 745
 746         /* Setting proper Rx Mode and issue Rx Mode Update command */
 747         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 748
 749         /*
 750          * Don't need to handle events for now
 751          */
 752 #if PROCESS_SYS_EVENTS == 1
 753         events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
 754         PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
 755         vmxnet3_process_events(hw);
 756 #endif
 757         return VMXNET3_SUCCESS;
 758 }
 759
 760 /*
 761  * Stop device: disable rx and tx functions to allow for reconfiguring.
 762  */
 763 static void
 764 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 765 {
 766         struct rte_eth_link link;
 767         struct vmxnet3_hw *hw = dev->data->dev_private;
 768
 769         PMD_INIT_FUNC_TRACE();
 770
 771         if (hw->adapter_stopped == 1) {
 772                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 773                 return;
 774         }
 775
 776         /* disable interrupts */
 777         vmxnet3_disable_intr(hw);
 778
 779         /* quiesce the device first */
 780         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 781         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 782         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 783
 784         /* reset the device */
 785         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 786         PMD_INIT_LOG(DEBUG, "Device reset.");
 787         hw->adapter_stopped = 0;
 788
 789         vmxnet3_dev_clear_queues(dev);
 790
 791         /* Clear recorded link status */
 792         memset(&link, 0, sizeof(link));
 793         vmxnet3_dev_atomic_write_link_status(dev, &link);
 794 }
 795
 796 /*
 797  * Reset and stop device.
 798  */
 799 static void
 800 vmxnet3_dev_close(struct rte_eth_dev *dev)
 801 {
 802         struct vmxnet3_hw *hw = dev->data->dev_private;
 803
 804         PMD_INIT_FUNC_TRACE();
 805
 806         vmxnet3_dev_stop(dev);
 807         hw->adapter_stopped = 1;
 808 }
 809
 810 static void
 811 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 812 {
 813         unsigned int i;
 814         struct vmxnet3_hw *hw = dev->data->dev_private;
 815
 816         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 817
 818         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 819         for (i = 0; i < hw->num_tx_queues; i++) {
 820                 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
 821
 822                 stats->q_opackets[i] = txStats->ucastPktsTxOK +
 823                                         txStats->mcastPktsTxOK +
 824                                         txStats->bcastPktsTxOK;
 825                 stats->q_obytes[i] = txStats->ucastBytesTxOK +
 826                                         txStats->mcastBytesTxOK +
 827                                         txStats->bcastBytesTxOK;
 828
 829                 stats->opackets += stats->q_opackets[i];
 830                 stats->obytes += stats->q_obytes[i];
 831                 stats->oerrors += txStats->pktsTxError + txStats->pktsTxDiscard;
 832         }
 833
 834         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
 835         for (i = 0; i < hw->num_rx_queues; i++) {
 836                 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
 837
 838                 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
 839                                         rxStats->mcastPktsRxOK +
 840                                         rxStats->bcastPktsRxOK;
 841
 842                 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
 843                                         rxStats->mcastBytesRxOK +
 844                                         rxStats->bcastBytesRxOK;
 845
 846                 stats->ipackets += stats->q_ipackets[i];
 847                 stats->ibytes += stats->q_ibytes[i];
 848
 849                 stats->q_errors[i] = rxStats->pktsRxError;
 850                 stats->ierrors += rxStats->pktsRxError;
 851                 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
 852         }
 853 }
 854
 855 static void
 856 vmxnet3_dev_info_get(struct rte_eth_dev *dev,
 857                      struct rte_eth_dev_info *dev_info)
 858 {
 859         dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
 860
 861         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
 862         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
 863         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
 864         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
 865         dev_info->speed_capa = ETH_LINK_SPEED_10G;
 866         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
 867
 868         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
 869         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
 870
 871         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 872                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
 873                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
 874                 .nb_align = 1,
 875         };
 876
 877         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 878                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
 879                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
 880                 .nb_align = 1,
 881                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
 882                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
 883         };
 884
 885         dev_info->rx_offload_capa =
 886                 DEV_RX_OFFLOAD_VLAN_STRIP |
 887                 DEV_RX_OFFLOAD_UDP_CKSUM |
 888                 DEV_RX_OFFLOAD_TCP_CKSUM |
 889                 DEV_RX_OFFLOAD_TCP_LRO;
 890
 891         dev_info->tx_offload_capa =
 892                 DEV_TX_OFFLOAD_VLAN_INSERT |
 893                 DEV_TX_OFFLOAD_TCP_CKSUM |
 894                 DEV_TX_OFFLOAD_UDP_CKSUM |
 895                 DEV_TX_OFFLOAD_TCP_TSO;
 896 }
 897
 898 static const uint32_t *
 899 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 900 {
 901         static const uint32_t ptypes[] = {
 902                 RTE_PTYPE_L3_IPV4_EXT,
 903                 RTE_PTYPE_L3_IPV4,
 904                 RTE_PTYPE_UNKNOWN
 905         };
 906
 907         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
 908                 return ptypes;
 909         return NULL;
 910 }
 911
 912 static void
 913 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
 914 {
 915         struct vmxnet3_hw *hw = dev->data->dev_private;
 916
 917         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
 918 }
 919
 920 /* return 0 means link status changed, -1 means not changed */
 921 static int
 922 vmxnet3_dev_link_update(struct rte_eth_dev *dev,
 923                         __rte_unused int wait_to_complete)
 924 {
 925         struct vmxnet3_hw *hw = dev->data->dev_private;
 926         struct rte_eth_link old, link;
 927         uint32_t ret;
 928
 929         /* Link status doesn't change for stopped dev */
 930         if (dev->data->dev_started == 0)
 931                 return -1;
 932
 933         memset(&link, 0, sizeof(link));
 934         vmxnet3_dev_atomic_read_link_status(dev, &old);
 935
 936         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 937         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 938
 939         if (ret & 0x1) {
 940                 link.link_status = ETH_LINK_UP;
 941                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 942                 link.link_speed = ETH_SPEED_NUM_10G;
 943                 link.link_autoneg = ETH_LINK_SPEED_FIXED;
 944         }
 945
 946         vmxnet3_dev_atomic_write_link_status(dev, &link);
 947
 948         return (old.link_status == link.link_status) ? -1 : 0;
 949 }
 950
 951 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
 952 static void
 953 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
 954 {
 955         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 956
 957         if (set)
 958                 rxConf->rxMode = rxConf->rxMode | feature;
 959         else
 960                 rxConf->rxMode = rxConf->rxMode & (~feature);
 961
 962         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
 963 }
 964
 965 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 966 static void
 967 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
 968 {
 969         struct vmxnet3_hw *hw = dev->data->dev_private;
 970         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 971
 972         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
 973         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
 974
 975         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 976                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 977 }
 978
 979 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 980 static void
 981 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
 982 {
 983         struct vmxnet3_hw *hw = dev->data->dev_private;
 984         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 985
 986         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 987         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
 988         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 989                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 990 }
 991
 992 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 993 static void
 994 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
 995 {
 996         struct vmxnet3_hw *hw = dev->data->dev_private;
 997
 998         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
 999 }
1000
1001 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1002 static void
1003 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1004 {
1005         struct vmxnet3_hw *hw = dev->data->dev_private;
1006
1007         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1008 }
1009
1010 /* Enable/disable filter on vlan */
1011 static int
1012 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1013 {
1014         struct vmxnet3_hw *hw = dev->data->dev_private;
1015         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1016         uint32_t *vf_table = rxConf->vfTable;
1017
1018         /* save state for restore */
1019         if (on)
1020                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1021         else
1022                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1023
1024         /* don't change active filter if in promiscuous mode */
1025         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1026                 return 0;
1027
1028         /* set in hardware */
1029         if (on)
1030                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1031         else
1032                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1033
1034         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1035                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1036         return 0;
1037 }
1038
1039 static void
1040 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1041 {
1042         struct vmxnet3_hw *hw = dev->data->dev_private;
1043         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1044         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1045
1046         if (mask & ETH_VLAN_STRIP_MASK) {
1047                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1048                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1049                 else
1050                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1051
1052                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1053                                        VMXNET3_CMD_UPDATE_FEATURE);
1054         }
1055
1056         if (mask & ETH_VLAN_FILTER_MASK) {
1057                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1058                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1059                 else
1060                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1061
1062                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1063                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1064         }
1065 }
1066
1067 #if PROCESS_SYS_EVENTS == 1
1068 static void
1069 vmxnet3_process_events(struct vmxnet3_hw *hw)
1070 {
1071         uint32_t events = hw->shared->ecr;
1072
1073         if (!events) {
1074                 PMD_INIT_LOG(ERR, "No events to process");
1075                 return;
1076         }
1077
1078         /*
1079          * ECR bits when written with 1b are cleared. Hence write
1080          * events back to ECR so that the bits which were set will be reset.
1081          */
1082         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1083
1084         /* Check if link state has changed */
1085         if (events & VMXNET3_ECR_LINK)
1086                 PMD_INIT_LOG(ERR,
1087                              "Process events in %s(): VMXNET3_ECR_LINK event",
1088                              __func__);
1089
1090         /* Check if there is an error on xmit/recv queues */
1091         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1092                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1093                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1094
1095                 if (hw->tqd_start->status.stopped)
1096                         PMD_INIT_LOG(ERR, "tq error 0x%x",
1097                                      hw->tqd_start->status.error);
1098
1099                 if (hw->rqd_start->status.stopped)
1100                         PMD_INIT_LOG(ERR, "rq error 0x%x",
1101                                      hw->rqd_start->status.error);
1102
1103                 /* Reset the device */
1104                 /* Have to reset the device */
1105         }
1106
1107         if (events & VMXNET3_ECR_DIC)
1108                 PMD_INIT_LOG(ERR, "Device implementation change event.");
1109
1110         if (events & VMXNET3_ECR_DEBUG)
1111                 PMD_INIT_LOG(ERR, "Debug event generated by device.");
1112 }
1113 #endif
1114
1115 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd.pci_drv);
1116 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1117 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio");