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34 #include <sys/queue.h>
43 #include <rte_byteorder.h>
44 #include <rte_common.h>
45 #include <rte_cycles.h>
47 #include <rte_interrupts.h>
49 #include <rte_debug.h>
51 #include <rte_atomic.h>
52 #include <rte_branch_prediction.h>
53 #include <rte_memory.h>
54 #include <rte_memzone.h>
56 #include <rte_alarm.h>
57 #include <rte_ether.h>
58 #include <rte_ethdev.h>
59 #include <rte_atomic.h>
60 #include <rte_string_fns.h>
61 #include <rte_malloc.h>
64 #include "base/vmxnet3_defs.h"
66 #include "vmxnet3_ring.h"
67 #include "vmxnet3_logs.h"
68 #include "vmxnet3_ethdev.h"
70 #define PROCESS_SYS_EVENTS 0
72 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
73 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
74 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
75 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
76 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
77 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
78 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
79 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
80 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
81 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
82 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
83 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
84 int wait_to_complete);
85 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
86 struct rte_eth_stats *stats);
87 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
88 struct rte_eth_dev_info *dev_info);
89 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
90 uint16_t vid, int on);
91 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
92 static void vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev,
95 #if PROCESS_SYS_EVENTS == 1
96 static void vmxnet3_process_events(struct vmxnet3_hw *);
99 * The set of PCI devices this driver supports
101 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
103 #define RTE_PCI_DEV_ID_DECL_VMXNET3(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
104 #include "rte_pci_dev_ids.h"
106 { .vendor_id = 0, /* sentinel */ },
109 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
110 .dev_configure = vmxnet3_dev_configure,
111 .dev_start = vmxnet3_dev_start,
112 .dev_stop = vmxnet3_dev_stop,
113 .dev_close = vmxnet3_dev_close,
114 .promiscuous_enable = vmxnet3_dev_promiscuous_enable,
115 .promiscuous_disable = vmxnet3_dev_promiscuous_disable,
116 .allmulticast_enable = vmxnet3_dev_allmulticast_enable,
117 .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
118 .link_update = vmxnet3_dev_link_update,
119 .stats_get = vmxnet3_dev_stats_get,
120 .dev_infos_get = vmxnet3_dev_info_get,
121 .vlan_filter_set = vmxnet3_dev_vlan_filter_set,
122 .vlan_offload_set = vmxnet3_dev_vlan_offload_set,
123 .rx_queue_setup = vmxnet3_dev_rx_queue_setup,
124 .rx_queue_release = vmxnet3_dev_rx_queue_release,
125 .tx_queue_setup = vmxnet3_dev_tx_queue_setup,
126 .tx_queue_release = vmxnet3_dev_tx_queue_release,
129 static const struct rte_memzone *
130 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
131 const char *post_string, int socket_id, uint16_t align)
133 char z_name[RTE_MEMZONE_NAMESIZE];
134 const struct rte_memzone *mz;
136 snprintf(z_name, sizeof(z_name), "%s_%d_%s",
137 dev->driver->pci_drv.name, dev->data->port_id, post_string);
139 mz = rte_memzone_lookup(z_name);
143 return rte_memzone_reserve_aligned(z_name, size,
144 socket_id, 0, align);
148 * Atomically reads the link status information from global
149 * structure rte_eth_dev.
152 * - Pointer to the structure rte_eth_dev to read from.
153 * - Pointer to the buffer to be saved with the link status.
156 * - On success, zero.
157 * - On failure, negative value.
161 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
162 struct rte_eth_link *link)
164 struct rte_eth_link *dst = link;
165 struct rte_eth_link *src = &(dev->data->dev_link);
167 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
168 *(uint64_t *)src) == 0)
175 * Atomically writes the link status information into global
176 * structure rte_eth_dev.
179 * - Pointer to the structure rte_eth_dev to write to.
180 * - Pointer to the buffer to be saved with the link status.
183 * - On success, zero.
184 * - On failure, negative value.
187 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
188 struct rte_eth_link *link)
190 struct rte_eth_link *dst = &(dev->data->dev_link);
191 struct rte_eth_link *src = link;
193 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
194 *(uint64_t *)src) == 0)
201 * This function is based on vmxnet3_disable_intr()
204 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
208 PMD_INIT_FUNC_TRACE();
210 hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
211 for (i = 0; i < VMXNET3_MAX_INTRS; i++)
212 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
216 * It returns 0 on success.
219 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
221 struct rte_pci_device *pci_dev;
222 struct vmxnet3_hw *hw = eth_dev->data->dev_private;
223 uint32_t mac_hi, mac_lo, ver;
225 PMD_INIT_FUNC_TRACE();
227 eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
228 eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
229 eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
230 pci_dev = eth_dev->pci_dev;
233 * for secondary processes, we don't initialize any further as primary
234 * has already done this work.
236 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
239 rte_eth_copy_pci_info(eth_dev, pci_dev);
241 /* Vendor and Device ID need to be set before init of shared code */
242 hw->device_id = pci_dev->id.device_id;
243 hw->vendor_id = pci_dev->id.vendor_id;
244 hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
245 hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
247 hw->num_rx_queues = 1;
248 hw->num_tx_queues = 1;
249 hw->bufs_per_pkt = 1;
251 /* Check h/w version compatibility with driver. */
252 ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
253 PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
255 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
257 PMD_INIT_LOG(ERR, "Incompatible h/w version, should be 0x1");
261 /* Check UPT version compatibility with driver. */
262 ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
263 PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
265 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
267 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
271 /* Getting MAC Address */
272 mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
273 mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
274 memcpy(hw->perm_addr , &mac_lo, 4);
275 memcpy(hw->perm_addr+4, &mac_hi, 2);
277 /* Allocate memory for storing MAC addresses */
278 eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
279 VMXNET3_MAX_MAC_ADDRS, 0);
280 if (eth_dev->data->mac_addrs == NULL) {
282 "Failed to allocate %d bytes needed to store MAC addresses",
283 ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
286 /* Copy the permanent MAC address */
287 ether_addr_copy((struct ether_addr *) hw->perm_addr,
288 ð_dev->data->mac_addrs[0]);
290 PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
291 hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
292 hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
294 /* Put device in Quiesce Mode */
295 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
301 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
303 struct vmxnet3_hw *hw = eth_dev->data->dev_private;
305 PMD_INIT_FUNC_TRACE();
307 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
310 if (hw->adapter_stopped == 0)
311 vmxnet3_dev_close(eth_dev);
313 eth_dev->dev_ops = NULL;
314 eth_dev->rx_pkt_burst = NULL;
315 eth_dev->tx_pkt_burst = NULL;
317 rte_free(eth_dev->data->mac_addrs);
318 eth_dev->data->mac_addrs = NULL;
323 static struct eth_driver rte_vmxnet3_pmd = {
325 .name = "rte_vmxnet3_pmd",
326 .id_table = pci_id_vmxnet3_map,
327 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
329 .eth_dev_init = eth_vmxnet3_dev_init,
330 .eth_dev_uninit = eth_vmxnet3_dev_uninit,
331 .dev_private_size = sizeof(struct vmxnet3_hw),
335 * Driver initialization routine.
336 * Invoked once at EAL init time.
337 * Register itself as the [Poll Mode] Driver of Virtual PCI VMXNET3 devices.
340 rte_vmxnet3_pmd_init(const char *name __rte_unused, const char *param __rte_unused)
342 PMD_INIT_FUNC_TRACE();
344 rte_eth_driver_register(&rte_vmxnet3_pmd);
349 vmxnet3_dev_configure(struct rte_eth_dev *dev)
351 const struct rte_memzone *mz;
352 struct vmxnet3_hw *hw = dev->data->dev_private;
355 PMD_INIT_FUNC_TRACE();
357 if (dev->data->nb_rx_queues > UINT8_MAX ||
358 dev->data->nb_tx_queues > UINT8_MAX)
361 size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
362 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
364 if (size > UINT16_MAX)
367 hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
368 hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
371 * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
374 mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
375 "shared", rte_socket_id(), 8);
378 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
381 memset(mz->addr, 0, mz->len);
383 hw->shared = mz->addr;
384 hw->sharedPA = mz->phys_addr;
387 * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
390 mz = gpa_zone_reserve(dev, size, "queuedesc",
391 rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
393 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
396 memset(mz->addr, 0, mz->len);
398 hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
399 hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
401 hw->queueDescPA = mz->phys_addr;
402 hw->queue_desc_len = (uint16_t)size;
404 if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
406 /* Allocate memory structure for UPT1_RSSConf and configure */
407 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf), "rss_conf",
408 rte_socket_id(), RTE_CACHE_LINE_SIZE);
411 "ERROR: Creating rss_conf structure zone");
414 memset(mz->addr, 0, mz->len);
416 hw->rss_conf = mz->addr;
417 hw->rss_confPA = mz->phys_addr;
424 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
426 struct rte_eth_conf port_conf = dev->data->dev_conf;
427 struct vmxnet3_hw *hw = dev->data->dev_private;
428 Vmxnet3_DriverShared *shared = hw->shared;
429 Vmxnet3_DSDevRead *devRead = &shared->devRead;
434 shared->magic = VMXNET3_REV1_MAGIC;
435 devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
437 /* Setting up Guest OS information */
438 devRead->misc.driverInfo.gos.gosBits = sizeof(void *) == 4 ?
439 VMXNET3_GOS_BITS_32 :
441 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
442 devRead->misc.driverInfo.vmxnet3RevSpt = 1;
443 devRead->misc.driverInfo.uptVerSpt = 1;
445 devRead->misc.mtu = rte_le_to_cpu_32(dev->data->mtu);
446 devRead->misc.queueDescPA = hw->queueDescPA;
447 devRead->misc.queueDescLen = hw->queue_desc_len;
448 devRead->misc.numTxQueues = hw->num_tx_queues;
449 devRead->misc.numRxQueues = hw->num_rx_queues;
452 * Set number of interrupts to 1
453 * PMD disables all the interrupts but this is MUST to activate device
454 * It needs at least one interrupt for link events to handle
455 * So we'll disable it later after device activation if needed
457 devRead->intrConf.numIntrs = 1;
458 devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
460 for (i = 0; i < hw->num_tx_queues; i++) {
461 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
462 vmxnet3_tx_queue_t *txq = dev->data->tx_queues[i];
464 tqd->ctrl.txNumDeferred = 0;
465 tqd->ctrl.txThreshold = 1;
466 tqd->conf.txRingBasePA = txq->cmd_ring.basePA;
467 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
468 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
470 tqd->conf.txRingSize = txq->cmd_ring.size;
471 tqd->conf.compRingSize = txq->comp_ring.size;
472 tqd->conf.dataRingSize = txq->data_ring.size;
473 tqd->conf.intrIdx = txq->comp_ring.intr_idx;
474 tqd->status.stopped = TRUE;
475 tqd->status.error = 0;
476 memset(&tqd->stats, 0, sizeof(tqd->stats));
479 for (i = 0; i < hw->num_rx_queues; i++) {
480 Vmxnet3_RxQueueDesc *rqd = &hw->rqd_start[i];
481 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
483 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
484 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
485 rqd->conf.compRingBasePA = rxq->comp_ring.basePA;
487 rqd->conf.rxRingSize[0] = rxq->cmd_ring[0].size;
488 rqd->conf.rxRingSize[1] = rxq->cmd_ring[1].size;
489 rqd->conf.compRingSize = rxq->comp_ring.size;
490 rqd->conf.intrIdx = rxq->comp_ring.intr_idx;
491 rqd->status.stopped = TRUE;
492 rqd->status.error = 0;
493 memset(&rqd->stats, 0, sizeof(rqd->stats));
496 /* RxMode set to 0 of VMXNET3_RXM_xxx */
497 devRead->rxFilterConf.rxMode = 0;
499 /* Setting up feature flags */
500 if (dev->data->dev_conf.rxmode.hw_ip_checksum)
501 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
503 if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
504 ret = vmxnet3_rss_configure(dev);
505 if (ret != VMXNET3_SUCCESS)
508 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
509 devRead->rssConfDesc.confVer = 1;
510 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
511 devRead->rssConfDesc.confPA = hw->rss_confPA;
515 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
516 mask |= ETH_VLAN_STRIP_MASK;
518 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
519 mask |= ETH_VLAN_FILTER_MASK;
521 vmxnet3_dev_vlan_offload_set_clear(dev, mask, 1);
524 "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
525 hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
526 hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
528 /* Write MAC Address back to device */
529 mac_ptr = (uint32_t *)hw->perm_addr;
531 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
533 val = (hw->perm_addr[5] << 8) | hw->perm_addr[4];
534 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
536 return VMXNET3_SUCCESS;
540 * Configure device link speed and setup link.
541 * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
542 * It returns 0 on success.
545 vmxnet3_dev_start(struct rte_eth_dev *dev)
548 struct vmxnet3_hw *hw = dev->data->dev_private;
550 PMD_INIT_FUNC_TRACE();
552 ret = vmxnet3_setup_driver_shared(dev);
553 if (ret != VMXNET3_SUCCESS)
556 /* Exchange shared data with device */
557 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
558 VMXNET3_GET_ADDR_LO(hw->sharedPA));
559 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
560 VMXNET3_GET_ADDR_HI(hw->sharedPA));
562 /* Activate device by register write */
563 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
564 status = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
567 PMD_INIT_LOG(ERR, "Device activation in %s(): UNSUCCESSFUL", __func__);
571 /* Disable interrupts */
572 vmxnet3_disable_intr(hw);
575 * Load RX queues with blank mbufs and update next2fill index for device
576 * Update RxMode of the device
578 ret = vmxnet3_dev_rxtx_init(dev);
579 if (ret != VMXNET3_SUCCESS) {
580 PMD_INIT_LOG(ERR, "Device receive init in %s: UNSUCCESSFUL", __func__);
584 /* Setting proper Rx Mode and issue Rx Mode Update command */
585 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
588 * Don't need to handle events for now
590 #if PROCESS_SYS_EVENTS == 1
591 events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
592 PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
593 vmxnet3_process_events(hw);
599 * Stop device: disable rx and tx functions to allow for reconfiguring.
602 vmxnet3_dev_stop(struct rte_eth_dev *dev)
604 struct rte_eth_link link;
605 struct vmxnet3_hw *hw = dev->data->dev_private;
607 PMD_INIT_FUNC_TRACE();
609 if (hw->adapter_stopped == 1) {
610 PMD_INIT_LOG(DEBUG, "Device already closed.");
614 /* disable interrupts */
615 vmxnet3_disable_intr(hw);
617 /* quiesce the device first */
618 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
619 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
620 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
622 /* reset the device */
623 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
624 PMD_INIT_LOG(DEBUG, "Device reset.");
625 hw->adapter_stopped = 0;
627 vmxnet3_dev_clear_queues(dev);
629 /* Clear recorded link status */
630 memset(&link, 0, sizeof(link));
631 vmxnet3_dev_atomic_write_link_status(dev, &link);
635 * Reset and stop device.
638 vmxnet3_dev_close(struct rte_eth_dev *dev)
640 struct vmxnet3_hw *hw = dev->data->dev_private;
642 PMD_INIT_FUNC_TRACE();
644 vmxnet3_dev_stop(dev);
645 hw->adapter_stopped = 1;
649 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
652 struct vmxnet3_hw *hw = dev->data->dev_private;
654 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
656 RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
657 for (i = 0; i < hw->num_tx_queues; i++) {
658 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
660 stats->q_opackets[i] = txStats->ucastPktsTxOK +
661 txStats->mcastPktsTxOK +
662 txStats->bcastPktsTxOK;
663 stats->q_obytes[i] = txStats->ucastBytesTxOK +
664 txStats->mcastBytesTxOK +
665 txStats->bcastBytesTxOK;
667 stats->opackets += stats->q_opackets[i];
668 stats->obytes += stats->q_obytes[i];
669 stats->oerrors += txStats->pktsTxError +
670 txStats->pktsTxDiscard;
673 RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
674 for (i = 0; i < hw->num_rx_queues; i++) {
675 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
677 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
678 rxStats->mcastPktsRxOK +
679 rxStats->bcastPktsRxOK;
681 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
682 rxStats->mcastBytesRxOK +
683 rxStats->bcastBytesRxOK;
685 stats->ipackets += stats->q_ipackets[i];
686 stats->ibytes += stats->q_ibytes[i];
688 stats->q_errors[i] = rxStats->pktsRxError;
689 stats->ierrors += rxStats->pktsRxError;
690 stats->imcasts += rxStats->mcastPktsRxOK;
691 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
696 vmxnet3_dev_info_get(__attribute__((unused))struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
698 dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
699 dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
700 dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
701 dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
702 dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
704 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
705 ETH_TXQ_FLAGS_NOOFFLOADS;
706 dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
708 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
709 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
710 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
714 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
715 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
716 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
721 /* return 0 means link status changed, -1 means not changed */
723 vmxnet3_dev_link_update(struct rte_eth_dev *dev, __attribute__((unused)) int wait_to_complete)
725 struct vmxnet3_hw *hw = dev->data->dev_private;
726 struct rte_eth_link old, link;
729 if (dev->data->dev_started == 0)
730 return -1; /* Link status doesn't change for stopped dev */
732 memset(&link, 0, sizeof(link));
733 vmxnet3_dev_atomic_read_link_status(dev, &old);
735 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
736 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
739 link.link_status = 1;
740 link.link_duplex = ETH_LINK_FULL_DUPLEX;
741 link.link_speed = ETH_LINK_SPEED_10000;
744 vmxnet3_dev_atomic_write_link_status(dev, &link);
746 return (old.link_status == link.link_status) ? -1 : 0;
749 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
751 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set) {
753 struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
756 rxConf->rxMode = rxConf->rxMode | feature;
758 rxConf->rxMode = rxConf->rxMode & (~feature);
760 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
763 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
765 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
767 struct vmxnet3_hw *hw = dev->data->dev_private;
768 uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
770 memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
771 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
773 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
774 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
777 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
779 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
781 struct vmxnet3_hw *hw = dev->data->dev_private;
782 uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
784 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
785 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
786 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
787 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
790 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
792 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
794 struct vmxnet3_hw *hw = dev->data->dev_private;
796 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
799 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
801 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
803 struct vmxnet3_hw *hw = dev->data->dev_private;
805 vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
808 /* Enable/disable filter on vlan */
810 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
812 struct vmxnet3_hw *hw = dev->data->dev_private;
813 struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
814 uint32_t *vf_table = rxConf->vfTable;
816 /* save state for restore */
818 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
820 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
822 /* don't change active filter if in promiscious mode */
823 if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
826 /* set in hardware */
828 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
830 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
832 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
833 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
838 vmxnet3_dev_vlan_offload_set_clear(struct rte_eth_dev *dev,
841 struct vmxnet3_hw *hw = dev->data->dev_private;
842 Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
843 uint32_t *vf_table = devRead->rxFilterConf.vfTable;
845 if (mask & ETH_VLAN_STRIP_MASK)
846 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
848 devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
850 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
851 VMXNET3_CMD_UPDATE_FEATURE);
853 if (mask & ETH_VLAN_FILTER_MASK) {
855 memset(hw->shadow_vfta, 0,
856 VMXNET3_VFT_TABLE_SIZE);
857 /* allow untagged pkts */
858 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
860 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
862 /* allow any pkts -- no filtering */
864 memset(hw->shadow_vfta, 0xff, VMXNET3_VFT_TABLE_SIZE);
865 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
868 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
869 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
873 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
875 vmxnet3_dev_vlan_offload_set_clear(dev, mask, 0);
878 #if PROCESS_SYS_EVENTS == 1
880 vmxnet3_process_events(struct vmxnet3_hw *hw)
882 uint32_t events = hw->shared->ecr;
885 PMD_INIT_LOG(ERR, "No events to process in %s()", __func__);
890 * ECR bits when written with 1b are cleared. Hence write
891 * events back to ECR so that the bits which were set will be reset.
893 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
895 /* Check if link state has changed */
896 if (events & VMXNET3_ECR_LINK)
898 "Process events in %s(): VMXNET3_ECR_LINK event", __func__);
900 /* Check if there is an error on xmit/recv queues */
901 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
902 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_QUEUE_STATUS);
904 if (hw->tqd_start->status.stopped)
905 PMD_INIT_LOG(ERR, "tq error 0x%x",
906 hw->tqd_start->status.error);
908 if (hw->rqd_start->status.stopped)
909 PMD_INIT_LOG(ERR, "rq error 0x%x",
910 hw->rqd_start->status.error);
912 /* Reset the device */
913 /* Have to reset the device */
916 if (events & VMXNET3_ECR_DIC)
917 PMD_INIT_LOG(ERR, "Device implementation change event.");
919 if (events & VMXNET3_ECR_DEBUG)
920 PMD_INIT_LOG(ERR, "Debug event generated by device.");
925 static struct rte_driver rte_vmxnet3_driver = {
927 .init = rte_vmxnet3_pmd_init,
930 PMD_REGISTER_DRIVER(rte_vmxnet3_driver);