drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <fcntl.h>
  42 #include <inttypes.h>
  43 #include <rte_byteorder.h>
  44 #include <rte_common.h>
  45 #include <rte_cycles.h>
  46
  47 #include <rte_interrupts.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_pci.h>
  51 #include <rte_atomic.h>
  52 #include <rte_branch_prediction.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_eal.h>
  56 #include <rte_alarm.h>
  57 #include <rte_ether.h>
  58 #include <rte_ethdev.h>
  59 #include <rte_atomic.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_malloc.h>
  62 #include <rte_dev.h>
  63
  64 #include "base/vmxnet3_defs.h"
  65
  66 #include "vmxnet3_ring.h"
  67 #include "vmxnet3_logs.h"
  68 #include "vmxnet3_ethdev.h"
  69
  70 #define PROCESS_SYS_EVENTS 0
  71
  72 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  73
  74 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  75 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  76 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  77 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  78 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  79 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  80 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  81 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  82 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  83 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  84 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  85 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  86                                    int wait_to_complete);
  87 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  88                                   struct rte_eth_stats *stats);
  89 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  90                                  struct rte_eth_dev_info *dev_info);
  91 static const uint32_t *
  92 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  93 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  94                                        uint16_t vid, int on);
  95 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  96 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  97                                  struct ether_addr *mac_addr);
  98
  99 #if PROCESS_SYS_EVENTS == 1
 100 static void vmxnet3_process_events(struct vmxnet3_hw *);
 101 #endif
 102 /*
 103  * The set of PCI devices this driver supports
 104  */
 105 #define VMWARE_PCI_VENDOR_ID 0x15AD
 106 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 107 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 108         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 109         { .vendor_id = 0, /* sentinel */ },
 110 };
 111
 112 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 113         .dev_configure        = vmxnet3_dev_configure,
 114         .dev_start            = vmxnet3_dev_start,
 115         .dev_stop             = vmxnet3_dev_stop,
 116         .dev_close            = vmxnet3_dev_close,
 117         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 118         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 119         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 120         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 121         .link_update          = vmxnet3_dev_link_update,
 122         .stats_get            = vmxnet3_dev_stats_get,
 123         .mac_addr_set         = vmxnet3_mac_addr_set,
 124         .dev_infos_get        = vmxnet3_dev_info_get,
 125         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 126         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 127         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 128         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 129         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 130         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 131         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 132 };
 133
 134 static const struct rte_memzone *
 135 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 136                  const char *post_string, int socket_id,
 137                  uint16_t align, bool reuse)
 138 {
 139         char z_name[RTE_MEMZONE_NAMESIZE];
 140         const struct rte_memzone *mz;
 141
 142         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 143                  dev->data->drv_name, dev->data->port_id, post_string);
 144
 145         mz = rte_memzone_lookup(z_name);
 146         if (!reuse) {
 147                 if (mz)
 148                         rte_memzone_free(mz);
 149                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 150                                                    0, align);
 151         }
 152
 153         if (mz)
 154                 return mz;
 155
 156         return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
 157 }
 158
 159 /**
 160  * Atomically reads the link status information from global
 161  * structure rte_eth_dev.
 162  *
 163  * @param dev
 164  *   - Pointer to the structure rte_eth_dev to read from.
 165  *   - Pointer to the buffer to be saved with the link status.
 166  *
 167  * @return
 168  *   - On success, zero.
 169  *   - On failure, negative value.
 170  */
 171
 172 static int
 173 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 174                                     struct rte_eth_link *link)
 175 {
 176         struct rte_eth_link *dst = link;
 177         struct rte_eth_link *src = &(dev->data->dev_link);
 178
 179         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 180                                 *(uint64_t *)src) == 0)
 181                 return -1;
 182
 183         return 0;
 184 }
 185
 186 /**
 187  * Atomically writes the link status information into global
 188  * structure rte_eth_dev.
 189  *
 190  * @param dev
 191  *   - Pointer to the structure rte_eth_dev to write to.
 192  *   - Pointer to the buffer to be saved with the link status.
 193  *
 194  * @return
 195  *   - On success, zero.
 196  *   - On failure, negative value.
 197  */
 198 static int
 199 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 200                                      struct rte_eth_link *link)
 201 {
 202         struct rte_eth_link *dst = &(dev->data->dev_link);
 203         struct rte_eth_link *src = link;
 204
 205         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 206                                 *(uint64_t *)src) == 0)
 207                 return -1;
 208
 209         return 0;
 210 }
 211
 212 /*
 213  * This function is based on vmxnet3_disable_intr()
 214  */
 215 static void
 216 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 217 {
 218         int i;
 219
 220         PMD_INIT_FUNC_TRACE();
 221
 222         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 223         for (i = 0; i < VMXNET3_MAX_INTRS; i++)
 224                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 225 }
 226
 227 /*
 228  * Gets tx data ring descriptor size.
 229  */
 230 static uint16_t
 231 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
 232 {
 233         uint16 txdata_desc_size;
 234
 235         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 236                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
 237         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 238
 239         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
 240                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
 241                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
 242                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
 243 }
 244
 245 /*
 246  * It returns 0 on success.
 247  */
 248 static int
 249 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 250 {
 251         struct rte_pci_device *pci_dev;
 252         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 253         uint32_t mac_hi, mac_lo, ver;
 254
 255         PMD_INIT_FUNC_TRACE();
 256
 257         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 258         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 259         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 260         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 261         pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
 262
 263         /*
 264          * for secondary processes, we don't initialize any further as primary
 265          * has already done this work.
 266          */
 267         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 268                 return 0;
 269
 270         rte_eth_copy_pci_info(eth_dev, pci_dev);
 271         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
 272
 273         /* Vendor and Device ID need to be set before init of shared code */
 274         hw->device_id = pci_dev->id.device_id;
 275         hw->vendor_id = pci_dev->id.vendor_id;
 276         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 277         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 278
 279         hw->num_rx_queues = 1;
 280         hw->num_tx_queues = 1;
 281         hw->bufs_per_pkt = 1;
 282
 283         /* Check h/w version compatibility with driver. */
 284         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 285         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 286
 287         if (ver & (1 << VMXNET3_REV_2)) {
 288                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 289                                        1 << VMXNET3_REV_2);
 290                 hw->version = VMXNET3_REV_2 + 1;
 291         } else if (ver & (1 << VMXNET3_REV_1)) {
 292                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 293                                        1 << VMXNET3_REV_1);
 294                 hw->version = VMXNET3_REV_1 + 1;
 295         } else {
 296                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
 297                 return -EIO;
 298         }
 299
 300         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
 301
 302         /* Check UPT version compatibility with driver. */
 303         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 304         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 305         if (ver & 0x1)
 306                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 307         else {
 308                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 309                 return -EIO;
 310         }
 311
 312         /* Getting MAC Address */
 313         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 314         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 315         memcpy(hw->perm_addr, &mac_lo, 4);
 316         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 317
 318         /* Allocate memory for storing MAC addresses */
 319         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 320                                                VMXNET3_MAX_MAC_ADDRS, 0);
 321         if (eth_dev->data->mac_addrs == NULL) {
 322                 PMD_INIT_LOG(ERR,
 323                              "Failed to allocate %d bytes needed to store MAC addresses",
 324                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 325                 return -ENOMEM;
 326         }
 327         /* Copy the permanent MAC address */
 328         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 329                         &eth_dev->data->mac_addrs[0]);
 330
 331         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 332                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 333                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 334
 335         /* Put device in Quiesce Mode */
 336         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 337
 338         /* allow untagged pkts */
 339         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 340
 341         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 342                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
 343
 344         return 0;
 345 }
 346
 347 static int
 348 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 349 {
 350         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 351
 352         PMD_INIT_FUNC_TRACE();
 353
 354         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 355                 return 0;
 356
 357         if (hw->adapter_stopped == 0)
 358                 vmxnet3_dev_close(eth_dev);
 359
 360         eth_dev->dev_ops = NULL;
 361         eth_dev->rx_pkt_burst = NULL;
 362         eth_dev->tx_pkt_burst = NULL;
 363         eth_dev->tx_pkt_prepare = NULL;
 364
 365         rte_free(eth_dev->data->mac_addrs);
 366         eth_dev->data->mac_addrs = NULL;
 367
 368         return 0;
 369 }
 370
 371 static struct eth_driver rte_vmxnet3_pmd = {
 372         .pci_drv = {
 373                 .id_table = pci_id_vmxnet3_map,
 374                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 375                 .probe = rte_eth_dev_pci_probe,
 376                 .remove = rte_eth_dev_pci_remove,
 377         },
 378         .eth_dev_init = eth_vmxnet3_dev_init,
 379         .eth_dev_uninit = eth_vmxnet3_dev_uninit,
 380         .dev_private_size = sizeof(struct vmxnet3_hw),
 381 };
 382
 383 static int
 384 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 385 {
 386         const struct rte_memzone *mz;
 387         struct vmxnet3_hw *hw = dev->data->dev_private;
 388         size_t size;
 389
 390         PMD_INIT_FUNC_TRACE();
 391
 392         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 393             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 394                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 395                 return -EINVAL;
 396         }
 397
 398         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 399                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 400                 return -EINVAL;
 401         }
 402
 403         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 404                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 405
 406         if (size > UINT16_MAX)
 407                 return -EINVAL;
 408
 409         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 410         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 411
 412         /*
 413          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 414          * on current socket
 415          */
 416         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 417                               "shared", rte_socket_id(), 8, 1);
 418
 419         if (mz == NULL) {
 420                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 421                 return -ENOMEM;
 422         }
 423         memset(mz->addr, 0, mz->len);
 424
 425         hw->shared = mz->addr;
 426         hw->sharedPA = mz->phys_addr;
 427
 428         /*
 429          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 430          * on current socket.
 431          *
 432          * We cannot reuse this memzone from previous allocation as its size
 433          * depends on the number of tx and rx queues, which could be different
 434          * from one config to another.
 435          */
 436         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 437                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 438         if (mz == NULL) {
 439                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 440                 return -ENOMEM;
 441         }
 442         memset(mz->addr, 0, mz->len);
 443
 444         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 445         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 446
 447         hw->queueDescPA = mz->phys_addr;
 448         hw->queue_desc_len = (uint16_t)size;
 449
 450         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 451                 /* Allocate memory structure for UPT1_RSSConf and configure */
 452                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 453                                       "rss_conf", rte_socket_id(),
 454                                       RTE_CACHE_LINE_SIZE, 1);
 455                 if (mz == NULL) {
 456                         PMD_INIT_LOG(ERR,
 457                                      "ERROR: Creating rss_conf structure zone");
 458                         return -ENOMEM;
 459                 }
 460                 memset(mz->addr, 0, mz->len);
 461
 462                 hw->rss_conf = mz->addr;
 463                 hw->rss_confPA = mz->phys_addr;
 464         }
 465
 466         return 0;
 467 }
 468
 469 static void
 470 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 471 {
 472         uint32_t val;
 473
 474         PMD_INIT_LOG(DEBUG,
 475                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 476                      addr[0], addr[1], addr[2],
 477                      addr[3], addr[4], addr[5]);
 478
 479         val = *(const uint32_t *)addr;
 480         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 481
 482         val = (addr[5] << 8) | addr[4];
 483         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 484 }
 485
 486 static int
 487 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 488 {
 489         struct rte_eth_conf port_conf = dev->data->dev_conf;
 490         struct vmxnet3_hw *hw = dev->data->dev_private;
 491         uint32_t mtu = dev->data->mtu;
 492         Vmxnet3_DriverShared *shared = hw->shared;
 493         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 494         uint32_t i;
 495         int ret;
 496
 497         shared->magic = VMXNET3_REV1_MAGIC;
 498         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 499
 500         /* Setting up Guest OS information */
 501         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 502                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 503         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 504         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 505         devRead->misc.driverInfo.uptVerSpt     = 1;
 506
 507         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 508         devRead->misc.queueDescPA  = hw->queueDescPA;
 509         devRead->misc.queueDescLen = hw->queue_desc_len;
 510         devRead->misc.numTxQueues  = hw->num_tx_queues;
 511         devRead->misc.numRxQueues  = hw->num_rx_queues;
 512
 513         /*
 514          * Set number of interrupts to 1
 515          * PMD disables all the interrupts but this is MUST to activate device
 516          * It needs at least one interrupt for link events to handle
 517          * So we'll disable it later after device activation if needed
 518          */
 519         devRead->intrConf.numIntrs = 1;
 520         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 521
 522         for (i = 0; i < hw->num_tx_queues; i++) {
 523                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 524                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 525
 526                 tqd->ctrl.txNumDeferred  = 0;
 527                 tqd->ctrl.txThreshold    = 1;
 528                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 529                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 530                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 531
 532                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 533                 tqd->conf.compRingSize = txq->comp_ring.size;
 534                 tqd->conf.dataRingSize = txq->data_ring.size;
 535                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
 536                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 537                 tqd->status.stopped    = TRUE;
 538                 tqd->status.error      = 0;
 539                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 540         }
 541
 542         for (i = 0; i < hw->num_rx_queues; i++) {
 543                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 544                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 545
 546                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 547                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 548                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 549
 550                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 551                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 552                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 553                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 554                 rqd->status.stopped       = TRUE;
 555                 rqd->status.error         = 0;
 556                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 557         }
 558
 559         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 560         devRead->rxFilterConf.rxMode = 0;
 561
 562         /* Setting up feature flags */
 563         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 564                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 565
 566         if (dev->data->dev_conf.rxmode.enable_lro) {
 567                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 568                 devRead->misc.maxNumRxSG = 0;
 569         }
 570
 571         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 572                 ret = vmxnet3_rss_configure(dev);
 573                 if (ret != VMXNET3_SUCCESS)
 574                         return ret;
 575
 576                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 577                 devRead->rssConfDesc.confVer = 1;
 578                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 579                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 580         }
 581
 582         vmxnet3_dev_vlan_offload_set(dev,
 583                                      ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 584
 585         vmxnet3_write_mac(hw, hw->perm_addr);
 586
 587         return VMXNET3_SUCCESS;
 588 }
 589
 590 /*
 591  * Configure device link speed and setup link.
 592  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 593  * It returns 0 on success.
 594  */
 595 static int
 596 vmxnet3_dev_start(struct rte_eth_dev *dev)
 597 {
 598         int ret;
 599         struct vmxnet3_hw *hw = dev->data->dev_private;
 600
 601         PMD_INIT_FUNC_TRACE();
 602
 603         ret = vmxnet3_setup_driver_shared(dev);
 604         if (ret != VMXNET3_SUCCESS)
 605                 return ret;
 606
 607         /* Exchange shared data with device */
 608         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 609                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 610         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 611                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 612
 613         /* Activate device by register write */
 614         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 615         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 616
 617         if (ret != 0) {
 618                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 619                 return -EINVAL;
 620         }
 621
 622         /* Disable interrupts */
 623         vmxnet3_disable_intr(hw);
 624
 625         /*
 626          * Load RX queues with blank mbufs and update next2fill index for device
 627          * Update RxMode of the device
 628          */
 629         ret = vmxnet3_dev_rxtx_init(dev);
 630         if (ret != VMXNET3_SUCCESS) {
 631                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 632                 return ret;
 633         }
 634
 635         /* Setting proper Rx Mode and issue Rx Mode Update command */
 636         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 637
 638         /*
 639          * Don't need to handle events for now
 640          */
 641 #if PROCESS_SYS_EVENTS == 1
 642         events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
 643         PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
 644         vmxnet3_process_events(hw);
 645 #endif
 646         return VMXNET3_SUCCESS;
 647 }
 648
 649 /*
 650  * Stop device: disable rx and tx functions to allow for reconfiguring.
 651  */
 652 static void
 653 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 654 {
 655         struct rte_eth_link link;
 656         struct vmxnet3_hw *hw = dev->data->dev_private;
 657
 658         PMD_INIT_FUNC_TRACE();
 659
 660         if (hw->adapter_stopped == 1) {
 661                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 662                 return;
 663         }
 664
 665         /* disable interrupts */
 666         vmxnet3_disable_intr(hw);
 667
 668         /* quiesce the device first */
 669         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 670         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 671         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 672
 673         /* reset the device */
 674         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 675         PMD_INIT_LOG(DEBUG, "Device reset.");
 676         hw->adapter_stopped = 0;
 677
 678         vmxnet3_dev_clear_queues(dev);
 679
 680         /* Clear recorded link status */
 681         memset(&link, 0, sizeof(link));
 682         vmxnet3_dev_atomic_write_link_status(dev, &link);
 683 }
 684
 685 /*
 686  * Reset and stop device.
 687  */
 688 static void
 689 vmxnet3_dev_close(struct rte_eth_dev *dev)
 690 {
 691         struct vmxnet3_hw *hw = dev->data->dev_private;
 692
 693         PMD_INIT_FUNC_TRACE();
 694
 695         vmxnet3_dev_stop(dev);
 696         hw->adapter_stopped = 1;
 697 }
 698
 699 static void
 700 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 701 {
 702         unsigned int i;
 703         struct vmxnet3_hw *hw = dev->data->dev_private;
 704
 705         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 706
 707         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 708         for (i = 0; i < hw->num_tx_queues; i++) {
 709                 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
 710
 711                 stats->q_opackets[i] = txStats->ucastPktsTxOK +
 712                                         txStats->mcastPktsTxOK +
 713                                         txStats->bcastPktsTxOK;
 714                 stats->q_obytes[i] = txStats->ucastBytesTxOK +
 715                                         txStats->mcastBytesTxOK +
 716                                         txStats->bcastBytesTxOK;
 717
 718                 stats->opackets += stats->q_opackets[i];
 719                 stats->obytes += stats->q_obytes[i];
 720                 stats->oerrors += txStats->pktsTxError + txStats->pktsTxDiscard;
 721         }
 722
 723         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
 724         for (i = 0; i < hw->num_rx_queues; i++) {
 725                 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
 726
 727                 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
 728                                         rxStats->mcastPktsRxOK +
 729                                         rxStats->bcastPktsRxOK;
 730
 731                 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
 732                                         rxStats->mcastBytesRxOK +
 733                                         rxStats->bcastBytesRxOK;
 734
 735                 stats->ipackets += stats->q_ipackets[i];
 736                 stats->ibytes += stats->q_ibytes[i];
 737
 738                 stats->q_errors[i] = rxStats->pktsRxError;
 739                 stats->ierrors += rxStats->pktsRxError;
 740                 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
 741         }
 742 }
 743
 744 static void
 745 vmxnet3_dev_info_get(struct rte_eth_dev *dev,
 746                      struct rte_eth_dev_info *dev_info)
 747 {
 748         dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
 749
 750         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
 751         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
 752         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
 753         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
 754         dev_info->speed_capa = ETH_LINK_SPEED_10G;
 755         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
 756
 757         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
 758         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
 759
 760         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 761                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
 762                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
 763                 .nb_align = 1,
 764         };
 765
 766         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 767                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
 768                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
 769                 .nb_align = 1,
 770                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
 771                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
 772         };
 773
 774         dev_info->rx_offload_capa =
 775                 DEV_RX_OFFLOAD_VLAN_STRIP |
 776                 DEV_RX_OFFLOAD_UDP_CKSUM |
 777                 DEV_RX_OFFLOAD_TCP_CKSUM |
 778                 DEV_RX_OFFLOAD_TCP_LRO;
 779
 780         dev_info->tx_offload_capa =
 781                 DEV_TX_OFFLOAD_VLAN_INSERT |
 782                 DEV_TX_OFFLOAD_TCP_CKSUM |
 783                 DEV_TX_OFFLOAD_UDP_CKSUM |
 784                 DEV_TX_OFFLOAD_TCP_TSO;
 785 }
 786
 787 static const uint32_t *
 788 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 789 {
 790         static const uint32_t ptypes[] = {
 791                 RTE_PTYPE_L3_IPV4_EXT,
 792                 RTE_PTYPE_L3_IPV4,
 793                 RTE_PTYPE_UNKNOWN
 794         };
 795
 796         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
 797                 return ptypes;
 798         return NULL;
 799 }
 800
 801 static void
 802 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
 803 {
 804         struct vmxnet3_hw *hw = dev->data->dev_private;
 805
 806         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
 807 }
 808
 809 /* return 0 means link status changed, -1 means not changed */
 810 static int
 811 vmxnet3_dev_link_update(struct rte_eth_dev *dev,
 812                         __rte_unused int wait_to_complete)
 813 {
 814         struct vmxnet3_hw *hw = dev->data->dev_private;
 815         struct rte_eth_link old, link;
 816         uint32_t ret;
 817
 818         /* Link status doesn't change for stopped dev */
 819         if (dev->data->dev_started == 0)
 820                 return -1;
 821
 822         memset(&link, 0, sizeof(link));
 823         vmxnet3_dev_atomic_read_link_status(dev, &old);
 824
 825         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 826         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 827
 828         if (ret & 0x1) {
 829                 link.link_status = ETH_LINK_UP;
 830                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 831                 link.link_speed = ETH_SPEED_NUM_10G;
 832                 link.link_autoneg = ETH_LINK_SPEED_FIXED;
 833         }
 834
 835         vmxnet3_dev_atomic_write_link_status(dev, &link);
 836
 837         return (old.link_status == link.link_status) ? -1 : 0;
 838 }
 839
 840 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
 841 static void
 842 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
 843 {
 844         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 845
 846         if (set)
 847                 rxConf->rxMode = rxConf->rxMode | feature;
 848         else
 849                 rxConf->rxMode = rxConf->rxMode & (~feature);
 850
 851         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
 852 }
 853
 854 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 855 static void
 856 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
 857 {
 858         struct vmxnet3_hw *hw = dev->data->dev_private;
 859         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 860
 861         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
 862         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
 863
 864         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 865                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 866 }
 867
 868 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 869 static void
 870 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
 871 {
 872         struct vmxnet3_hw *hw = dev->data->dev_private;
 873         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 874
 875         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 876         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
 877         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 878                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 879 }
 880
 881 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 882 static void
 883 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
 884 {
 885         struct vmxnet3_hw *hw = dev->data->dev_private;
 886
 887         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
 888 }
 889
 890 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 891 static void
 892 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
 893 {
 894         struct vmxnet3_hw *hw = dev->data->dev_private;
 895
 896         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
 897 }
 898
 899 /* Enable/disable filter on vlan */
 900 static int
 901 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
 902 {
 903         struct vmxnet3_hw *hw = dev->data->dev_private;
 904         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 905         uint32_t *vf_table = rxConf->vfTable;
 906
 907         /* save state for restore */
 908         if (on)
 909                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 910         else
 911                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 912
 913         /* don't change active filter if in promiscuous mode */
 914         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
 915                 return 0;
 916
 917         /* set in hardware */
 918         if (on)
 919                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
 920         else
 921                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
 922
 923         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 924                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 925         return 0;
 926 }
 927
 928 static void
 929 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 930 {
 931         struct vmxnet3_hw *hw = dev->data->dev_private;
 932         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
 933         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
 934
 935         if (mask & ETH_VLAN_STRIP_MASK) {
 936                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
 937                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
 938                 else
 939                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
 940
 941                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 942                                        VMXNET3_CMD_UPDATE_FEATURE);
 943         }
 944
 945         if (mask & ETH_VLAN_FILTER_MASK) {
 946                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
 947                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 948                 else
 949                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
 950
 951                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 952                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 953         }
 954 }
 955
 956 #if PROCESS_SYS_EVENTS == 1
 957 static void
 958 vmxnet3_process_events(struct vmxnet3_hw *hw)
 959 {
 960         uint32_t events = hw->shared->ecr;
 961
 962         if (!events) {
 963                 PMD_INIT_LOG(ERR, "No events to process");
 964                 return;
 965         }
 966
 967         /*
 968          * ECR bits when written with 1b are cleared. Hence write
 969          * events back to ECR so that the bits which were set will be reset.
 970          */
 971         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
 972
 973         /* Check if link state has changed */
 974         if (events & VMXNET3_ECR_LINK)
 975                 PMD_INIT_LOG(ERR,
 976                              "Process events in %s(): VMXNET3_ECR_LINK event",
 977                              __func__);
 978
 979         /* Check if there is an error on xmit/recv queues */
 980         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 981                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 982                                        VMXNET3_CMD_GET_QUEUE_STATUS);
 983
 984                 if (hw->tqd_start->status.stopped)
 985                         PMD_INIT_LOG(ERR, "tq error 0x%x",
 986                                      hw->tqd_start->status.error);
 987
 988                 if (hw->rqd_start->status.stopped)
 989                         PMD_INIT_LOG(ERR, "rq error 0x%x",
 990                                      hw->rqd_start->status.error);
 991
 992                 /* Reset the device */
 993                 /* Have to reset the device */
 994         }
 995
 996         if (events & VMXNET3_ECR_DIC)
 997                 PMD_INIT_LOG(ERR, "Device implementation change event.");
 998
 999         if (events & VMXNET3_ECR_DEBUG)
1000                 PMD_INIT_LOG(ERR, "Debug event generated by device.");
1001 }
1002 #endif
1003
1004 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd.pci_drv);
1005 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1006 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio");