vmxnet3: support multi-segment transmit
[dpdk.git] / drivers / net / vmxnet3 / vmxnet3_rxtx.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
5  *   All rights reserved.
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9  *   are met:
10  *
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15  *       the documentation and/or other materials provided with the
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18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
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23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include <sys/queue.h>
35
36 #include <stdio.h>
37 #include <stdlib.h>
38 #include <string.h>
39 #include <errno.h>
40 #include <stdint.h>
41 #include <stdarg.h>
42 #include <unistd.h>
43 #include <inttypes.h>
44
45 #include <rte_byteorder.h>
46 #include <rte_common.h>
47 #include <rte_cycles.h>
48 #include <rte_log.h>
49 #include <rte_debug.h>
50 #include <rte_interrupts.h>
51 #include <rte_pci.h>
52 #include <rte_memory.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
55 #include <rte_eal.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_ring.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
63 #include <rte_mbuf.h>
64 #include <rte_ether.h>
65 #include <rte_ethdev.h>
66 #include <rte_prefetch.h>
67 #include <rte_ip.h>
68 #include <rte_udp.h>
69 #include <rte_tcp.h>
70 #include <rte_sctp.h>
71 #include <rte_string_fns.h>
72 #include <rte_errno.h>
73
74 #include "base/vmxnet3_defs.h"
75 #include "vmxnet3_ring.h"
76
77 #include "vmxnet3_logs.h"
78 #include "vmxnet3_ethdev.h"
79
80 #define RTE_MBUF_DATA_DMA_ADDR(mb) \
81         (uint64_t) ((mb)->buf_physaddr + (mb)->data_off)
82
83 #define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \
84         (uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)
85
86 static uint32_t rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};
87
88 static inline int vmxnet3_post_rx_bufs(vmxnet3_rx_queue_t* , uint8_t);
89 static inline void vmxnet3_tq_tx_complete(vmxnet3_tx_queue_t *);
90 #ifdef RTE_LIBRTE_VMXNET3_DEBUG_DRIVER_NOT_USED
91 static void vmxnet3_rxq_dump(struct vmxnet3_rx_queue *);
92 static void vmxnet3_txq_dump(struct vmxnet3_tx_queue *);
93 #endif
94
95 static inline struct rte_mbuf *
96 rte_rxmbuf_alloc(struct rte_mempool *mp)
97 {
98         struct rte_mbuf *m;
99
100         m = __rte_mbuf_raw_alloc(mp);
101         __rte_mbuf_sanity_check_raw(m, 0);
102         return m;
103 }
104
105 #ifdef RTE_LIBRTE_VMXNET3_DEBUG_DRIVER_NOT_USED
106 static void
107 vmxnet3_rxq_dump(struct vmxnet3_rx_queue *rxq)
108 {
109         uint32_t avail = 0;
110
111         if (rxq == NULL)
112                 return;
113
114         PMD_RX_LOG(DEBUG,
115                    "RXQ: cmd0 base : 0x%p cmd1 base : 0x%p comp ring base : 0x%p.",
116                    rxq->cmd_ring[0].base, rxq->cmd_ring[1].base, rxq->comp_ring.base);
117         PMD_RX_LOG(DEBUG,
118                    "RXQ: cmd0 basePA : 0x%lx cmd1 basePA : 0x%lx comp ring basePA : 0x%lx.",
119                    (unsigned long)rxq->cmd_ring[0].basePA,
120                    (unsigned long)rxq->cmd_ring[1].basePA,
121                    (unsigned long)rxq->comp_ring.basePA);
122
123         avail = vmxnet3_cmd_ring_desc_avail(&rxq->cmd_ring[0]);
124         PMD_RX_LOG(DEBUG,
125                    "RXQ:cmd0: size=%u; free=%u; next2proc=%u; queued=%u",
126                    (uint32_t)rxq->cmd_ring[0].size, avail,
127                    rxq->comp_ring.next2proc,
128                    rxq->cmd_ring[0].size - avail);
129
130         avail = vmxnet3_cmd_ring_desc_avail(&rxq->cmd_ring[1]);
131         PMD_RX_LOG(DEBUG, "RXQ:cmd1 size=%u; free=%u; next2proc=%u; queued=%u",
132                    (uint32_t)rxq->cmd_ring[1].size, avail, rxq->comp_ring.next2proc,
133                    rxq->cmd_ring[1].size - avail);
134
135 }
136
137 static void
138 vmxnet3_txq_dump(struct vmxnet3_tx_queue *txq)
139 {
140         uint32_t avail = 0;
141
142         if (txq == NULL)
143                 return;
144
145         PMD_TX_LOG(DEBUG, "TXQ: cmd base : 0x%p comp ring base : 0x%p data ring base : 0x%p.",
146                    txq->cmd_ring.base, txq->comp_ring.base, txq->data_ring.base);
147         PMD_TX_LOG(DEBUG, "TXQ: cmd basePA : 0x%lx comp ring basePA : 0x%lx data ring basePA : 0x%lx.",
148                    (unsigned long)txq->cmd_ring.basePA,
149                    (unsigned long)txq->comp_ring.basePA,
150                    (unsigned long)txq->data_ring.basePA);
151
152         avail = vmxnet3_cmd_ring_desc_avail(&txq->cmd_ring);
153         PMD_TX_LOG(DEBUG, "TXQ: size=%u; free=%u; next2proc=%u; queued=%u",
154                    (uint32_t)txq->cmd_ring.size, avail,
155                    txq->comp_ring.next2proc, txq->cmd_ring.size - avail);
156 }
157 #endif
158
159 static inline void
160 vmxnet3_cmd_ring_release_mbufs(vmxnet3_cmd_ring_t *ring)
161 {
162         while (ring->next2comp != ring->next2fill) {
163                 /* No need to worry about tx desc ownership, device is quiesced by now. */
164                 vmxnet3_buf_info_t *buf_info = ring->buf_info + ring->next2comp;
165
166                 if (buf_info->m) {
167                         rte_pktmbuf_free(buf_info->m);
168                         buf_info->m = NULL;
169                         buf_info->bufPA = 0;
170                         buf_info->len = 0;
171                 }
172                 vmxnet3_cmd_ring_adv_next2comp(ring);
173         }
174 }
175
176 static void
177 vmxnet3_cmd_ring_release(vmxnet3_cmd_ring_t *ring)
178 {
179         vmxnet3_cmd_ring_release_mbufs(ring);
180         rte_free(ring->buf_info);
181         ring->buf_info = NULL;
182 }
183
184
185 void
186 vmxnet3_dev_tx_queue_release(void *txq)
187 {
188         vmxnet3_tx_queue_t *tq = txq;
189
190         if (tq != NULL) {
191                 /* Release the cmd_ring */
192                 vmxnet3_cmd_ring_release(&tq->cmd_ring);
193         }
194 }
195
196 void
197 vmxnet3_dev_rx_queue_release(void *rxq)
198 {
199         int i;
200         vmxnet3_rx_queue_t *rq = rxq;
201
202         if (rq != NULL) {
203                 /* Release both the cmd_rings */
204                 for (i = 0; i < VMXNET3_RX_CMDRING_SIZE; i++)
205                         vmxnet3_cmd_ring_release(&rq->cmd_ring[i]);
206         }
207 }
208
209 static void
210 vmxnet3_dev_tx_queue_reset(void *txq)
211 {
212         vmxnet3_tx_queue_t *tq = txq;
213         struct vmxnet3_cmd_ring *ring = &tq->cmd_ring;
214         struct vmxnet3_comp_ring *comp_ring = &tq->comp_ring;
215         struct vmxnet3_data_ring *data_ring = &tq->data_ring;
216         int size;
217
218         if (tq != NULL) {
219                 /* Release the cmd_ring mbufs */
220                 vmxnet3_cmd_ring_release_mbufs(&tq->cmd_ring);
221         }
222
223         /* Tx vmxnet rings structure initialization*/
224         ring->next2fill = 0;
225         ring->next2comp = 0;
226         ring->gen = VMXNET3_INIT_GEN;
227         comp_ring->next2proc = 0;
228         comp_ring->gen = VMXNET3_INIT_GEN;
229
230         size = sizeof(struct Vmxnet3_TxDesc) * ring->size;
231         size += sizeof(struct Vmxnet3_TxCompDesc) * comp_ring->size;
232         size += sizeof(struct Vmxnet3_TxDataDesc) * data_ring->size;
233
234         memset(ring->base, 0, size);
235 }
236
237 static void
238 vmxnet3_dev_rx_queue_reset(void *rxq)
239 {
240         int i;
241         vmxnet3_rx_queue_t *rq = rxq;
242         struct vmxnet3_cmd_ring *ring0, *ring1;
243         struct vmxnet3_comp_ring *comp_ring;
244         int size;
245
246         if (rq != NULL) {
247                 /* Release both the cmd_rings mbufs */
248                 for (i = 0; i < VMXNET3_RX_CMDRING_SIZE; i++)
249                         vmxnet3_cmd_ring_release_mbufs(&rq->cmd_ring[i]);
250         }
251
252         ring0 = &rq->cmd_ring[0];
253         ring1 = &rq->cmd_ring[1];
254         comp_ring = &rq->comp_ring;
255
256         /* Rx vmxnet rings structure initialization */
257         ring0->next2fill = 0;
258         ring1->next2fill = 0;
259         ring0->next2comp = 0;
260         ring1->next2comp = 0;
261         ring0->gen = VMXNET3_INIT_GEN;
262         ring1->gen = VMXNET3_INIT_GEN;
263         comp_ring->next2proc = 0;
264         comp_ring->gen = VMXNET3_INIT_GEN;
265
266         size = sizeof(struct Vmxnet3_RxDesc) * (ring0->size + ring1->size);
267         size += sizeof(struct Vmxnet3_RxCompDesc) * comp_ring->size;
268
269         memset(ring0->base, 0, size);
270 }
271
272 void
273 vmxnet3_dev_clear_queues(struct rte_eth_dev *dev)
274 {
275         unsigned i;
276
277         PMD_INIT_FUNC_TRACE();
278
279         for (i = 0; i < dev->data->nb_tx_queues; i++) {
280                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
281
282                 if (txq != NULL) {
283                         txq->stopped = TRUE;
284                         vmxnet3_dev_tx_queue_reset(txq);
285                 }
286         }
287
288         for (i = 0; i < dev->data->nb_rx_queues; i++) {
289                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
290
291                 if (rxq != NULL) {
292                         rxq->stopped = TRUE;
293                         vmxnet3_dev_rx_queue_reset(rxq);
294                 }
295         }
296 }
297
298 static inline void
299 vmxnet3_tq_tx_complete(vmxnet3_tx_queue_t *txq)
300 {
301         int completed = 0;
302         struct rte_mbuf *mbuf;
303         vmxnet3_comp_ring_t *comp_ring = &txq->comp_ring;
304         struct Vmxnet3_TxCompDesc *tcd = (struct Vmxnet3_TxCompDesc *)
305                 (comp_ring->base + comp_ring->next2proc);
306
307         while (tcd->gen == comp_ring->gen) {
308                 /* Release cmd_ring descriptor and free mbuf */
309 #ifdef RTE_LIBRTE_VMXNET3_DEBUG_DRIVER
310                 VMXNET3_ASSERT(txq->cmd_ring.base[tcd->txdIdx].txd.eop == 1);
311 #endif
312                 while (txq->cmd_ring.next2comp != tcd->txdIdx) {
313                         mbuf = txq->cmd_ring.buf_info[txq->cmd_ring.next2comp].m;
314                         txq->cmd_ring.buf_info[txq->cmd_ring.next2comp].m = NULL;
315                         rte_pktmbuf_free_seg(mbuf);
316
317                         /* Mark the txd for which tcd was generated as completed */
318                         vmxnet3_cmd_ring_adv_next2comp(&txq->cmd_ring);
319                         completed++;
320                 }
321
322                 vmxnet3_comp_ring_adv_next2proc(comp_ring);
323                 tcd = (struct Vmxnet3_TxCompDesc *)(comp_ring->base +
324                                                     comp_ring->next2proc);
325         }
326
327         PMD_TX_LOG(DEBUG, "Processed %d tx comps & command descs.", completed);
328 }
329
330 uint16_t
331 vmxnet3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
332                   uint16_t nb_pkts)
333 {
334         uint16_t nb_tx;
335         vmxnet3_tx_queue_t *txq = tx_queue;
336         struct vmxnet3_hw *hw = txq->hw;
337
338         if (unlikely(txq->stopped)) {
339                 PMD_TX_LOG(DEBUG, "Tx queue is stopped.");
340                 return 0;
341         }
342
343         /* Free up the comp_descriptors aggressively */
344         vmxnet3_tq_tx_complete(txq);
345
346         nb_tx = 0;
347         while (nb_tx < nb_pkts) {
348                 Vmxnet3_GenericDesc *gdesc;
349                 vmxnet3_buf_info_t *tbi;
350                 uint32_t first2fill, avail, dw2;
351                 struct rte_mbuf *txm = tx_pkts[nb_tx];
352                 struct rte_mbuf *m_seg = txm;
353
354                 /* Is this packet execessively fragmented, then drop */
355                 if (unlikely(txm->nb_segs > VMXNET3_MAX_TXD_PER_PKT)) {
356                         ++txq->stats.drop_too_many_segs;
357                         ++txq->stats.drop_total;
358                         rte_pktmbuf_free(txm);
359                         ++nb_tx;
360                         continue;
361                 }
362
363                 /* Is command ring full? */
364                 avail = vmxnet3_cmd_ring_desc_avail(&txq->cmd_ring);
365                 if (txm->nb_segs > avail) {
366                         ++txq->stats.tx_ring_full;
367                         break;
368                 }
369
370                 /* use the previous gen bit for the SOP desc */
371                 dw2 = (txq->cmd_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
372                 first2fill = txq->cmd_ring.next2fill;
373                 do {
374                         /* Remember the transmit buffer for cleanup */
375                         tbi = txq->cmd_ring.buf_info + txq->cmd_ring.next2fill;
376                         tbi->m = m_seg;
377
378                         /* NB: the following assumes that VMXNET3 maximum
379                            transmit buffer size (16K) is greater than
380                            maximum sizeof mbuf segment size. */
381                         gdesc = txq->cmd_ring.base + txq->cmd_ring.next2fill;
382                         gdesc->txd.addr = RTE_MBUF_DATA_DMA_ADDR(m_seg);
383                         gdesc->dword[2] = dw2 | m_seg->data_len;
384                         gdesc->dword[3] = 0;
385
386                         /* move to the next2fill descriptor */
387                         vmxnet3_cmd_ring_adv_next2fill(&txq->cmd_ring);
388
389                         /* use the right gen for non-SOP desc */
390                         dw2 = txq->cmd_ring.gen << VMXNET3_TXD_GEN_SHIFT;
391                 } while ((m_seg = m_seg->next) != NULL);
392
393                 /* Update the EOP descriptor */
394                 gdesc->dword[3] |= VMXNET3_TXD_EOP | VMXNET3_TXD_CQ;
395
396                 /* Add VLAN tag if present */
397                 gdesc = txq->cmd_ring.base + first2fill;
398                 if (txm->ol_flags & PKT_TX_VLAN_PKT) {
399                         gdesc->txd.ti = 1;
400                         gdesc->txd.tci = txm->vlan_tci;
401                 }
402
403                 /* TODO: Add transmit checksum offload here */
404
405                 /* flip the GEN bit on the SOP */
406                 rte_compiler_barrier();
407                 gdesc->dword[2] ^= VMXNET3_TXD_GEN;
408
409                 txq->shared->ctrl.txNumDeferred++;
410                 nb_tx++;
411         }
412
413         PMD_TX_LOG(DEBUG, "vmxnet3 txThreshold: %u", txq->shared->ctrl.txThreshold);
414
415         if (txq->shared->ctrl.txNumDeferred >= txq->shared->ctrl.txThreshold) {
416
417                 txq->shared->ctrl.txNumDeferred = 0;
418                 /* Notify vSwitch that packets are available. */
419                 VMXNET3_WRITE_BAR0_REG(hw, (VMXNET3_REG_TXPROD + txq->queue_id * VMXNET3_REG_ALIGN),
420                                        txq->cmd_ring.next2fill);
421         }
422
423         return nb_tx;
424 }
425
426 /*
427  *  Allocates mbufs and clusters. Post rx descriptors with buffer details
428  *  so that device can receive packets in those buffers.
429  *      Ring layout:
430  *      Among the two rings, 1st ring contains buffers of type 0 and type1.
431  *      bufs_per_pkt is set such that for non-LRO cases all the buffers required
432  *      by a frame will fit in 1st ring (1st buf of type0 and rest of type1).
433  *      2nd ring contains buffers of type 1 alone. Second ring mostly be used
434  *      only for LRO.
435  *
436  */
437 static inline int
438 vmxnet3_post_rx_bufs(vmxnet3_rx_queue_t *rxq, uint8_t ring_id)
439 {
440         int err = 0;
441         uint32_t i = 0, val = 0;
442         struct vmxnet3_cmd_ring *ring = &rxq->cmd_ring[ring_id];
443
444         if (ring_id == 0) {
445                 /* Usually: One HEAD type buf per packet
446                  * val = (ring->next2fill % rxq->hw->bufs_per_pkt) ?
447                  * VMXNET3_RXD_BTYPE_BODY : VMXNET3_RXD_BTYPE_HEAD;
448                  */
449
450                 /* We use single packet buffer so all heads here */
451                 val = VMXNET3_RXD_BTYPE_HEAD;
452         } else {
453                 /* All BODY type buffers for 2nd ring */
454                 val = VMXNET3_RXD_BTYPE_BODY;
455         }
456
457         while (vmxnet3_cmd_ring_desc_avail(ring) > 0) {
458                 struct Vmxnet3_RxDesc *rxd;
459                 struct rte_mbuf *mbuf;
460                 vmxnet3_buf_info_t *buf_info = &ring->buf_info[ring->next2fill];
461
462                 rxd = (struct Vmxnet3_RxDesc *)(ring->base + ring->next2fill);
463
464                 /* Allocate blank mbuf for the current Rx Descriptor */
465                 mbuf = rte_rxmbuf_alloc(rxq->mp);
466                 if (unlikely(mbuf == NULL)) {
467                         PMD_RX_LOG(ERR, "Error allocating mbuf in %s", __func__);
468                         rxq->stats.rx_buf_alloc_failure++;
469                         err = ENOMEM;
470                         break;
471                 }
472
473                 /*
474                  * Load mbuf pointer into buf_info[ring_size]
475                  * buf_info structure is equivalent to cookie for virtio-virtqueue
476                  */
477                 buf_info->m = mbuf;
478                 buf_info->len = (uint16_t)(mbuf->buf_len -
479                                            RTE_PKTMBUF_HEADROOM);
480                 buf_info->bufPA = RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mbuf);
481
482                 /* Load Rx Descriptor with the buffer's GPA */
483                 rxd->addr = buf_info->bufPA;
484
485                 /* After this point rxd->addr MUST not be NULL */
486                 rxd->btype = val;
487                 rxd->len = buf_info->len;
488                 /* Flip gen bit at the end to change ownership */
489                 rxd->gen = ring->gen;
490
491                 vmxnet3_cmd_ring_adv_next2fill(ring);
492                 i++;
493         }
494
495         /* Return error only if no buffers are posted at present */
496         if (vmxnet3_cmd_ring_desc_avail(ring) >= (ring->size - 1))
497                 return -err;
498         else
499                 return i;
500 }
501
502 /*
503  * Process the Rx Completion Ring of given vmxnet3_rx_queue
504  * for nb_pkts burst and return the number of packets received
505  */
506 uint16_t
507 vmxnet3_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
508 {
509         uint16_t nb_rx;
510         uint32_t nb_rxd, idx;
511         uint8_t ring_idx;
512         vmxnet3_rx_queue_t *rxq;
513         Vmxnet3_RxCompDesc *rcd;
514         vmxnet3_buf_info_t *rbi;
515         Vmxnet3_RxDesc *rxd;
516         struct rte_mbuf *rxm = NULL;
517         struct vmxnet3_hw *hw;
518
519         nb_rx = 0;
520         ring_idx = 0;
521         nb_rxd = 0;
522         idx = 0;
523
524         rxq = rx_queue;
525         hw = rxq->hw;
526
527         rcd = &rxq->comp_ring.base[rxq->comp_ring.next2proc].rcd;
528
529         if (unlikely(rxq->stopped)) {
530                 PMD_RX_LOG(DEBUG, "Rx queue is stopped.");
531                 return 0;
532         }
533
534         while (rcd->gen == rxq->comp_ring.gen) {
535                 if (nb_rx >= nb_pkts)
536                         break;
537
538                 idx = rcd->rxdIdx;
539                 ring_idx = (uint8_t)((rcd->rqID == rxq->qid1) ? 0 : 1);
540                 rxd = (Vmxnet3_RxDesc *)rxq->cmd_ring[ring_idx].base + idx;
541                 rbi = rxq->cmd_ring[ring_idx].buf_info + idx;
542
543                 if (unlikely(rcd->sop != 1 || rcd->eop != 1)) {
544                         rte_pktmbuf_free_seg(rbi->m);
545                         PMD_RX_LOG(DEBUG, "Packet spread across multiple buffers\n)");
546                         goto rcd_done;
547                 }
548
549                 PMD_RX_LOG(DEBUG, "rxd idx: %d ring idx: %d.", idx, ring_idx);
550
551 #ifdef RTE_LIBRTE_VMXNET3_DEBUG_DRIVER
552                 VMXNET3_ASSERT(rcd->len <= rxd->len);
553                 VMXNET3_ASSERT(rbi->m);
554 #endif
555                 if (unlikely(rcd->len == 0)) {
556                         PMD_RX_LOG(DEBUG, "Rx buf was skipped. rxring[%d][%d]\n)",
557                                    ring_idx, idx);
558 #ifdef RTE_LIBRTE_VMXNET3_DEBUG_DRIVER
559                         VMXNET3_ASSERT(rcd->sop && rcd->eop);
560 #endif
561                         rte_pktmbuf_free_seg(rbi->m);
562                         goto rcd_done;
563                 }
564
565                 /* Assuming a packet is coming in a single packet buffer */
566                 if (unlikely(rxd->btype != VMXNET3_RXD_BTYPE_HEAD)) {
567                         PMD_RX_LOG(DEBUG,
568                                    "Alert : Misbehaving device, incorrect "
569                                    " buffer type used. iPacket dropped.");
570                         rte_pktmbuf_free_seg(rbi->m);
571                         goto rcd_done;
572                 }
573 #ifdef RTE_LIBRTE_VMXNET3_DEBUG_DRIVER
574                 VMXNET3_ASSERT(rxd->btype == VMXNET3_RXD_BTYPE_HEAD);
575 #endif
576                 /* Get the packet buffer pointer from buf_info */
577                 rxm = rbi->m;
578
579                 /* Clear descriptor associated buf_info to be reused */
580                 rbi->m = NULL;
581                 rbi->bufPA = 0;
582
583                 /* Update the index that we received a packet */
584                 rxq->cmd_ring[ring_idx].next2comp = idx;
585
586                 /* For RCD with EOP set, check if there is frame error */
587                 if (unlikely(rcd->err)) {
588                         rxq->stats.drop_total++;
589                         rxq->stats.drop_err++;
590
591                         if (!rcd->fcs) {
592                                 rxq->stats.drop_fcs++;
593                                 PMD_RX_LOG(ERR, "Recv packet dropped due to frame err.");
594                         }
595                         PMD_RX_LOG(ERR, "Error in received packet rcd#:%d rxd:%d",
596                                    (int)(rcd - (struct Vmxnet3_RxCompDesc *)
597                                          rxq->comp_ring.base), rcd->rxdIdx);
598                         rte_pktmbuf_free_seg(rxm);
599                         goto rcd_done;
600                 }
601
602                 /* Check for hardware stripped VLAN tag */
603                 if (rcd->ts) {
604                         PMD_RX_LOG(DEBUG, "Received packet with vlan ID: %d.",
605                                    rcd->tci);
606                         rxm->ol_flags = PKT_RX_VLAN_PKT;
607                         /* Copy vlan tag in packet buffer */
608                         rxm->vlan_tci = rte_le_to_cpu_16((uint16_t)rcd->tci);
609                 } else {
610                         rxm->ol_flags = 0;
611                         rxm->vlan_tci = 0;
612                 }
613
614                 /* Initialize newly received packet buffer */
615                 rxm->port = rxq->port_id;
616                 rxm->nb_segs = 1;
617                 rxm->next = NULL;
618                 rxm->pkt_len = (uint16_t)rcd->len;
619                 rxm->data_len = (uint16_t)rcd->len;
620                 rxm->data_off = RTE_PKTMBUF_HEADROOM;
621
622                 /* Check packet type, checksum errors, etc. Only support IPv4 for now. */
623                 if (rcd->v4) {
624                         struct ether_hdr *eth = rte_pktmbuf_mtod(rxm, struct ether_hdr *);
625                         struct ipv4_hdr *ip = (struct ipv4_hdr *)(eth + 1);
626
627                         if (((ip->version_ihl & 0xf) << 2) > (int)sizeof(struct ipv4_hdr))
628                                 rxm->ol_flags |= PKT_RX_IPV4_HDR_EXT;
629                         else
630                                 rxm->ol_flags |= PKT_RX_IPV4_HDR;
631
632                         if (!rcd->cnc) {
633                                 if (!rcd->ipc)
634                                         rxm->ol_flags |= PKT_RX_IP_CKSUM_BAD;
635
636                                 if ((rcd->tcp || rcd->udp) && !rcd->tuc)
637                                         rxm->ol_flags |= PKT_RX_L4_CKSUM_BAD;
638                         }
639                 }
640
641                 rx_pkts[nb_rx++] = rxm;
642 rcd_done:
643                 rxq->cmd_ring[ring_idx].next2comp = idx;
644                 VMXNET3_INC_RING_IDX_ONLY(rxq->cmd_ring[ring_idx].next2comp, rxq->cmd_ring[ring_idx].size);
645
646                 /* It's time to allocate some new buf and renew descriptors */
647                 vmxnet3_post_rx_bufs(rxq, ring_idx);
648                 if (unlikely(rxq->shared->ctrl.updateRxProd)) {
649                         VMXNET3_WRITE_BAR0_REG(hw, rxprod_reg[ring_idx] + (rxq->queue_id * VMXNET3_REG_ALIGN),
650                                                rxq->cmd_ring[ring_idx].next2fill);
651                 }
652
653                 /* Advance to the next descriptor in comp_ring */
654                 vmxnet3_comp_ring_adv_next2proc(&rxq->comp_ring);
655
656                 rcd = &rxq->comp_ring.base[rxq->comp_ring.next2proc].rcd;
657                 nb_rxd++;
658                 if (nb_rxd > rxq->cmd_ring[0].size) {
659                         PMD_RX_LOG(ERR,
660                                    "Used up quota of receiving packets,"
661                                    " relinquish control.");
662                         break;
663                 }
664         }
665
666         return nb_rx;
667 }
668
669 /*
670  * Create memzone for device rings. malloc can't be used as the physical address is
671  * needed. If the memzone is already created, then this function returns a ptr
672  * to the old one.
673  */
674 static const struct rte_memzone *
675 ring_dma_zone_reserve(struct rte_eth_dev *dev, const char *ring_name,
676                       uint16_t queue_id, uint32_t ring_size, int socket_id)
677 {
678         char z_name[RTE_MEMZONE_NAMESIZE];
679         const struct rte_memzone *mz;
680
681         snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
682                         dev->driver->pci_drv.name, ring_name,
683                         dev->data->port_id, queue_id);
684
685         mz = rte_memzone_lookup(z_name);
686         if (mz)
687                 return mz;
688
689         return rte_memzone_reserve_aligned(z_name, ring_size,
690                         socket_id, 0, VMXNET3_RING_BA_ALIGN);
691 }
692
693 int
694 vmxnet3_dev_tx_queue_setup(struct rte_eth_dev *dev,
695                            uint16_t queue_idx,
696                            uint16_t nb_desc,
697                            unsigned int socket_id,
698                            __attribute__((unused)) const struct rte_eth_txconf *tx_conf)
699 {
700         struct vmxnet3_hw *hw = dev->data->dev_private;
701         const struct rte_memzone *mz;
702         struct vmxnet3_tx_queue *txq;
703         struct vmxnet3_cmd_ring *ring;
704         struct vmxnet3_comp_ring *comp_ring;
705         struct vmxnet3_data_ring *data_ring;
706         int size;
707
708         PMD_INIT_FUNC_TRACE();
709
710         if ((tx_conf->txq_flags & ETH_TXQ_FLAGS_NOXSUMS) !=
711             ETH_TXQ_FLAGS_NOXSUMS) {
712                 PMD_INIT_LOG(ERR, "TX no support for checksum offload yet");
713                 return -EINVAL;
714         }
715
716         txq = rte_zmalloc("ethdev_tx_queue", sizeof(struct vmxnet3_tx_queue), RTE_CACHE_LINE_SIZE);
717         if (txq == NULL) {
718                 PMD_INIT_LOG(ERR, "Can not allocate tx queue structure");
719                 return -ENOMEM;
720         }
721
722         txq->queue_id = queue_idx;
723         txq->port_id = dev->data->port_id;
724         txq->shared = &hw->tqd_start[queue_idx];
725         txq->hw = hw;
726         txq->qid = queue_idx;
727         txq->stopped = TRUE;
728
729         ring = &txq->cmd_ring;
730         comp_ring = &txq->comp_ring;
731         data_ring = &txq->data_ring;
732
733         /* Tx vmxnet ring length should be between 512-4096 */
734         if (nb_desc < VMXNET3_DEF_TX_RING_SIZE) {
735                 PMD_INIT_LOG(ERR, "VMXNET3 Tx Ring Size Min: %u",
736                              VMXNET3_DEF_TX_RING_SIZE);
737                 return -EINVAL;
738         } else if (nb_desc > VMXNET3_TX_RING_MAX_SIZE) {
739                 PMD_INIT_LOG(ERR, "VMXNET3 Tx Ring Size Max: %u",
740                              VMXNET3_TX_RING_MAX_SIZE);
741                 return -EINVAL;
742         } else {
743                 ring->size = nb_desc;
744                 ring->size &= ~VMXNET3_RING_SIZE_MASK;
745         }
746         comp_ring->size = data_ring->size = ring->size;
747
748         /* Tx vmxnet rings structure initialization*/
749         ring->next2fill = 0;
750         ring->next2comp = 0;
751         ring->gen = VMXNET3_INIT_GEN;
752         comp_ring->next2proc = 0;
753         comp_ring->gen = VMXNET3_INIT_GEN;
754
755         size = sizeof(struct Vmxnet3_TxDesc) * ring->size;
756         size += sizeof(struct Vmxnet3_TxCompDesc) * comp_ring->size;
757         size += sizeof(struct Vmxnet3_TxDataDesc) * data_ring->size;
758
759         mz = ring_dma_zone_reserve(dev, "txdesc", queue_idx, size, socket_id);
760         if (mz == NULL) {
761                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
762                 return -ENOMEM;
763         }
764         memset(mz->addr, 0, mz->len);
765
766         /* cmd_ring initialization */
767         ring->base = mz->addr;
768         ring->basePA = mz->phys_addr;
769
770         /* comp_ring initialization */
771         comp_ring->base = ring->base + ring->size;
772         comp_ring->basePA = ring->basePA +
773                 (sizeof(struct Vmxnet3_TxDesc) * ring->size);
774
775         /* data_ring initialization */
776         data_ring->base = (Vmxnet3_TxDataDesc *)(comp_ring->base + comp_ring->size);
777         data_ring->basePA = comp_ring->basePA +
778                         (sizeof(struct Vmxnet3_TxCompDesc) * comp_ring->size);
779
780         /* cmd_ring0 buf_info allocation */
781         ring->buf_info = rte_zmalloc("tx_ring_buf_info",
782                                      ring->size * sizeof(vmxnet3_buf_info_t), RTE_CACHE_LINE_SIZE);
783         if (ring->buf_info == NULL) {
784                 PMD_INIT_LOG(ERR, "ERROR: Creating tx_buf_info structure");
785                 return -ENOMEM;
786         }
787
788         /* Update the data portion with txq */
789         dev->data->tx_queues[queue_idx] = txq;
790
791         return 0;
792 }
793
794 int
795 vmxnet3_dev_rx_queue_setup(struct rte_eth_dev *dev,
796                            uint16_t queue_idx,
797                            uint16_t nb_desc,
798                            unsigned int socket_id,
799                            __attribute__((unused)) const struct rte_eth_rxconf *rx_conf,
800                            struct rte_mempool *mp)
801 {
802         const struct rte_memzone *mz;
803         struct vmxnet3_rx_queue *rxq;
804         struct vmxnet3_hw     *hw = dev->data->dev_private;
805         struct vmxnet3_cmd_ring *ring0, *ring1, *ring;
806         struct vmxnet3_comp_ring *comp_ring;
807         int size;
808         uint8_t i;
809         char mem_name[32];
810         uint16_t buf_size;
811
812         PMD_INIT_FUNC_TRACE();
813
814         buf_size = rte_pktmbuf_data_room_size(mp) -
815                 RTE_PKTMBUF_HEADROOM;
816
817         if (dev->data->dev_conf.rxmode.max_rx_pkt_len > buf_size) {
818                 PMD_INIT_LOG(ERR, "buf_size = %u, max_pkt_len = %u, "
819                              "VMXNET3 don't support scatter packets yet",
820                              buf_size, dev->data->dev_conf.rxmode.max_rx_pkt_len);
821                 return -EINVAL;
822         }
823
824         rxq = rte_zmalloc("ethdev_rx_queue", sizeof(struct vmxnet3_rx_queue), RTE_CACHE_LINE_SIZE);
825         if (rxq == NULL) {
826                 PMD_INIT_LOG(ERR, "Can not allocate rx queue structure");
827                 return -ENOMEM;
828         }
829
830         rxq->mp = mp;
831         rxq->queue_id = queue_idx;
832         rxq->port_id = dev->data->port_id;
833         rxq->shared = &hw->rqd_start[queue_idx];
834         rxq->hw = hw;
835         rxq->qid1 = queue_idx;
836         rxq->qid2 = queue_idx + hw->num_rx_queues;
837         rxq->stopped = TRUE;
838
839         ring0 = &rxq->cmd_ring[0];
840         ring1 = &rxq->cmd_ring[1];
841         comp_ring = &rxq->comp_ring;
842
843         /* Rx vmxnet rings length should be between 256-4096 */
844         if (nb_desc < VMXNET3_DEF_RX_RING_SIZE) {
845                 PMD_INIT_LOG(ERR, "VMXNET3 Rx Ring Size Min: 256");
846                 return -EINVAL;
847         } else if (nb_desc > VMXNET3_RX_RING_MAX_SIZE) {
848                 PMD_INIT_LOG(ERR, "VMXNET3 Rx Ring Size Max: 4096");
849                 return -EINVAL;
850         } else {
851                 ring0->size = nb_desc;
852                 ring0->size &= ~VMXNET3_RING_SIZE_MASK;
853                 ring1->size = ring0->size;
854         }
855
856         comp_ring->size = ring0->size + ring1->size;
857
858         /* Rx vmxnet rings structure initialization */
859         ring0->next2fill = 0;
860         ring1->next2fill = 0;
861         ring0->next2comp = 0;
862         ring1->next2comp = 0;
863         ring0->gen = VMXNET3_INIT_GEN;
864         ring1->gen = VMXNET3_INIT_GEN;
865         comp_ring->next2proc = 0;
866         comp_ring->gen = VMXNET3_INIT_GEN;
867
868         size = sizeof(struct Vmxnet3_RxDesc) * (ring0->size + ring1->size);
869         size += sizeof(struct Vmxnet3_RxCompDesc) * comp_ring->size;
870
871         mz = ring_dma_zone_reserve(dev, "rxdesc", queue_idx, size, socket_id);
872         if (mz == NULL) {
873                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
874                 return -ENOMEM;
875         }
876         memset(mz->addr, 0, mz->len);
877
878         /* cmd_ring0 initialization */
879         ring0->base = mz->addr;
880         ring0->basePA = mz->phys_addr;
881
882         /* cmd_ring1 initialization */
883         ring1->base = ring0->base + ring0->size;
884         ring1->basePA = ring0->basePA + sizeof(struct Vmxnet3_RxDesc) * ring0->size;
885
886         /* comp_ring initialization */
887         comp_ring->base = ring1->base + ring1->size;
888         comp_ring->basePA = ring1->basePA + sizeof(struct Vmxnet3_RxDesc) *
889                 ring1->size;
890
891         /* cmd_ring0-cmd_ring1 buf_info allocation */
892         for (i = 0; i < VMXNET3_RX_CMDRING_SIZE; i++) {
893
894                 ring = &rxq->cmd_ring[i];
895                 ring->rid = i;
896                 snprintf(mem_name, sizeof(mem_name), "rx_ring_%d_buf_info", i);
897
898                 ring->buf_info = rte_zmalloc(mem_name, ring->size * sizeof(vmxnet3_buf_info_t), RTE_CACHE_LINE_SIZE);
899                 if (ring->buf_info == NULL) {
900                         PMD_INIT_LOG(ERR, "ERROR: Creating rx_buf_info structure");
901                         return -ENOMEM;
902                 }
903         }
904
905         /* Update the data portion with rxq */
906         dev->data->rx_queues[queue_idx] = rxq;
907
908         return 0;
909 }
910
911 /*
912  * Initializes Receive Unit
913  * Load mbufs in rx queue in advance
914  */
915 int
916 vmxnet3_dev_rxtx_init(struct rte_eth_dev *dev)
917 {
918         struct vmxnet3_hw *hw = dev->data->dev_private;
919
920         int i, ret;
921         uint8_t j;
922
923         PMD_INIT_FUNC_TRACE();
924
925         for (i = 0; i < hw->num_rx_queues; i++) {
926                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
927
928                 for (j = 0; j < VMXNET3_RX_CMDRING_SIZE; j++) {
929                         /* Passing 0 as alloc_num will allocate full ring */
930                         ret = vmxnet3_post_rx_bufs(rxq, j);
931                         if (ret <= 0) {
932                                 PMD_INIT_LOG(ERR, "ERROR: Posting Rxq: %d buffers ring: %d", i, j);
933                                 return -ret;
934                         }
935                         /* Updating device with the index:next2fill to fill the mbufs for coming packets */
936                         if (unlikely(rxq->shared->ctrl.updateRxProd)) {
937                                 VMXNET3_WRITE_BAR0_REG(hw, rxprod_reg[j] + (rxq->queue_id * VMXNET3_REG_ALIGN),
938                                                        rxq->cmd_ring[j].next2fill);
939                         }
940                 }
941                 rxq->stopped = FALSE;
942         }
943
944         for (i = 0; i < dev->data->nb_tx_queues; i++) {
945                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
946
947                 txq->stopped = FALSE;
948         }
949
950         return 0;
951 }
952
953 static uint8_t rss_intel_key[40] = {
954         0x6D, 0x5A, 0x56, 0xDA, 0x25, 0x5B, 0x0E, 0xC2,
955         0x41, 0x67, 0x25, 0x3D, 0x43, 0xA3, 0x8F, 0xB0,
956         0xD0, 0xCA, 0x2B, 0xCB, 0xAE, 0x7B, 0x30, 0xB4,
957         0x77, 0xCB, 0x2D, 0xA3, 0x80, 0x30, 0xF2, 0x0C,
958         0x6A, 0x42, 0xB7, 0x3B, 0xBE, 0xAC, 0x01, 0xFA,
959 };
960
961 /*
962  * Configure RSS feature
963  */
964 int
965 vmxnet3_rss_configure(struct rte_eth_dev *dev)
966 {
967         struct vmxnet3_hw *hw = dev->data->dev_private;
968         struct VMXNET3_RSSConf *dev_rss_conf;
969         struct rte_eth_rss_conf *port_rss_conf;
970         uint64_t rss_hf;
971         uint8_t i, j;
972
973         PMD_INIT_FUNC_TRACE();
974
975         dev_rss_conf = hw->rss_conf;
976         port_rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;
977
978         /* loading hashFunc */
979         dev_rss_conf->hashFunc = VMXNET3_RSS_HASH_FUNC_TOEPLITZ;
980         /* loading hashKeySize */
981         dev_rss_conf->hashKeySize = VMXNET3_RSS_MAX_KEY_SIZE;
982         /* loading indTableSize : Must not exceed VMXNET3_RSS_MAX_IND_TABLE_SIZE (128)*/
983         dev_rss_conf->indTableSize = (uint16_t)(hw->num_rx_queues * 4);
984
985         if (port_rss_conf->rss_key == NULL) {
986                 /* Default hash key */
987                 port_rss_conf->rss_key = rss_intel_key;
988         }
989
990         /* loading hashKey */
991         memcpy(&dev_rss_conf->hashKey[0], port_rss_conf->rss_key, dev_rss_conf->hashKeySize);
992
993         /* loading indTable */
994         for (i = 0, j = 0; i < dev_rss_conf->indTableSize; i++, j++) {
995                 if (j == dev->data->nb_rx_queues)
996                         j = 0;
997                 dev_rss_conf->indTable[i] = j;
998         }
999
1000         /* loading hashType */
1001         dev_rss_conf->hashType = 0;
1002         rss_hf = port_rss_conf->rss_hf & VMXNET3_RSS_OFFLOAD_ALL;
1003         if (rss_hf & ETH_RSS_IPV4)
1004                 dev_rss_conf->hashType |= VMXNET3_RSS_HASH_TYPE_IPV4;
1005         if (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
1006                 dev_rss_conf->hashType |= VMXNET3_RSS_HASH_TYPE_TCP_IPV4;
1007         if (rss_hf & ETH_RSS_IPV6)
1008                 dev_rss_conf->hashType |= VMXNET3_RSS_HASH_TYPE_IPV6;
1009         if (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
1010                 dev_rss_conf->hashType |= VMXNET3_RSS_HASH_TYPE_TCP_IPV6;
1011
1012         return VMXNET3_SUCCESS;
1013 }