1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #ifndef _CNXK_BPHY_IRQ_
6 #define _CNXK_BPHY_IRQ_
8 #include <rte_bus_pci.h>
13 typedef void (*cnxk_bphy_intr_handler_t)(int irq_num, void *isr_data);
16 struct rte_mem_resource res0;
17 struct rte_mem_resource res2;
20 struct bphy_irq_queue {
21 /* queue holds up to one response */
26 #define BPHY_QUEUE_CNT 1
27 struct roc_bphy_irq_chip *irq_chip;
29 /* bphy irq interface supports single queue only */
30 struct bphy_irq_queue queues[BPHY_QUEUE_CNT];
33 int cnxk_bphy_intr_init(uint16_t dev_id);
34 void cnxk_bphy_intr_fini(uint16_t dev_id);
35 struct bphy_mem *cnxk_bphy_mem_get(uint16_t dev_id);
36 int cnxk_bphy_intr_register(uint16_t dev_id, int irq_num,
37 cnxk_bphy_intr_handler_t handler,
38 void *isr_data, int cpu);
39 void cnxk_bphy_intr_unregister(uint16_t dev_id, int irq_num);
40 uint64_t cnxk_bphy_irq_max_get(uint16_t dev_id);
42 #endif /* _CNXK_BPHY_IRQ_ */