drivers/raw/cnxk_bphy/rte_pmd_bphy.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef _CNXK_BPHY_H_
   6 #define _CNXK_BPHY_H_
   7
   8 #include <rte_dev.h>
   9 #include <rte_memcpy.h>
  10 #include <rte_rawdev.h>
  11
  12 #ifdef __cplusplus
  13 extern "C" {
  14 #endif
  15
  16 enum cnxk_bphy_cgx_msg_type {
  17         CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO,
  18         CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE,
  19         CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE,
  20         CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE,
  21         CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE,
  22         CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE,
  23         CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE,
  24         CNXK_BPHY_CGX_MSG_TYPE_START_RXTX,
  25         CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX,
  26         CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
  27         CNXK_BPHY_CGX_MSG_TYPE_SET_FEC,
  28 };
  29
  30 enum cnxk_bphy_cgx_eth_link_speed {
  31         CNXK_BPHY_CGX_ETH_LINK_SPEED_NONE,
  32         CNXK_BPHY_CGX_ETH_LINK_SPEED_10M,
  33         CNXK_BPHY_CGX_ETH_LINK_SPEED_100M,
  34         CNXK_BPHY_CGX_ETH_LINK_SPEED_1G,
  35         CNXK_BPHY_CGX_ETH_LINK_SPEED_2HG,
  36         CNXK_BPHY_CGX_ETH_LINK_SPEED_5G,
  37         CNXK_BPHY_CGX_ETH_LINK_SPEED_10G,
  38         CNXK_BPHY_CGX_ETH_LINK_SPEED_20G,
  39         CNXK_BPHY_CGX_ETH_LINK_SPEED_25G,
  40         CNXK_BPHY_CGX_ETH_LINK_SPEED_40G,
  41         CNXK_BPHY_CGX_ETH_LINK_SPEED_50G,
  42         CNXK_BPHY_CGX_ETH_LINK_SPEED_80G,
  43         CNXK_BPHY_CGX_ETH_LINK_SPEED_100G,
  44         __CNXK_BPHY_CGX_ETH_LINK_SPEED_MAX
  45 };
  46
  47 enum cnxk_bphy_cgx_eth_link_fec {
  48         CNXK_BPHY_CGX_ETH_LINK_FEC_NONE,
  49         CNXK_BPHY_CGX_ETH_LINK_FEC_BASE_R,
  50         CNXK_BPHY_CGX_ETH_LINK_FEC_RS,
  51         __CNXK_BPHY_CGX_ETH_LINK_FEC_MAX
  52 };
  53
  54 enum cnxk_bphy_cgx_eth_link_mode {
  55         CNXK_BPHY_CGX_ETH_LINK_MODE_SGMII_BIT,
  56         CNXK_BPHY_CGX_ETH_LINK_MODE_1000_BASEX_BIT,
  57         CNXK_BPHY_CGX_ETH_LINK_MODE_QSGMII_BIT,
  58         CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2C_BIT,
  59         CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2M_BIT,
  60         CNXK_BPHY_CGX_ETH_LINK_MODE_10G_KR_BIT,
  61         CNXK_BPHY_CGX_ETH_LINK_MODE_20G_C2C_BIT,
  62         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2C_BIT,
  63         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2M_BIT,
  64         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_2_C2C_BIT,
  65         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_CR_BIT,
  66         CNXK_BPHY_CGX_ETH_LINK_MODE_25G_KR_BIT,
  67         CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2C_BIT,
  68         CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2M_BIT,
  69         CNXK_BPHY_CGX_ETH_LINK_MODE_40G_CR4_BIT,
  70         CNXK_BPHY_CGX_ETH_LINK_MODE_40G_KR4_BIT,
  71         CNXK_BPHY_CGX_ETH_LINK_MODE_40GAUI_C2C_BIT,
  72         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2C_BIT,
  73         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2M_BIT,
  74         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_4_C2C_BIT,
  75         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_CR_BIT,
  76         CNXK_BPHY_CGX_ETH_LINK_MODE_50G_KR_BIT,
  77         CNXK_BPHY_CGX_ETH_LINK_MODE_80GAUI_C2C_BIT,
  78         CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2C_BIT,
  79         CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2M_BIT,
  80         CNXK_BPHY_CGX_ETH_LINK_MODE_100G_CR4_BIT,
  81         CNXK_BPHY_CGX_ETH_LINK_MODE_100G_KR4_BIT,
  82         __CNXK_BPHY_CGX_ETH_LINK_MODE_MAX
  83 };
  84
  85 struct cnxk_bphy_cgx_msg_link_mode {
  86         bool full_duplex;
  87         bool autoneg;
  88         enum cnxk_bphy_cgx_eth_link_speed speed;
  89         enum cnxk_bphy_cgx_eth_link_mode mode;
  90 };
  91
  92 struct cnxk_bphy_cgx_msg_link_info {
  93         bool link_up;
  94         bool full_duplex;
  95         enum cnxk_bphy_cgx_eth_link_speed speed;
  96         bool autoneg;
  97         enum cnxk_bphy_cgx_eth_link_fec fec;
  98         enum cnxk_bphy_cgx_eth_link_mode mode;
  99 };
 100
 101 struct cnxk_bphy_cgx_msg_set_link_state {
 102         bool state; /* up or down */
 103 };
 104
 105 struct cnxk_bphy_cgx_msg {
 106         enum cnxk_bphy_cgx_msg_type type;
 107         /*
 108          * data depends on message type and whether
 109          * it's a request or a response
 110          */
 111         void *data;
 112 };
 113
 114 #define CNXK_BPHY_DEF_QUEUE 0
 115
 116 typedef void (*cnxk_bphy_intr_handler_t)(int irq_num, void *isr_data);
 117
 118 struct cnxk_bphy_mem {
 119         struct rte_mem_resource res0;
 120         struct rte_mem_resource res2;
 121 };
 122
 123 enum cnxk_bphy_irq_msg_type {
 124         CNXK_BPHY_IRQ_MSG_TYPE_INIT,
 125         CNXK_BPHY_IRQ_MSG_TYPE_FINI,
 126         CNXK_BPHY_IRQ_MSG_TYPE_REGISTER,
 127         CNXK_BPHY_IRQ_MSG_TYPE_UNREGISTER,
 128         CNXK_BPHY_IRQ_MSG_TYPE_MEM_GET,
 129         CNXK_BPHY_MSG_TYPE_NPA_PF_FUNC,
 130         CNXK_BPHY_MSG_TYPE_SSO_PF_FUNC,
 131 };
 132
 133 struct cnxk_bphy_irq_msg {
 134         enum cnxk_bphy_irq_msg_type type;
 135         /*
 136          * The data field, depending on message type, may point to
 137          * - (enq) full struct cnxk_bphy_irq_info for registration request
 138          * - (enq) struct cnxk_bphy_irq_info with irq_num set for unregistration
 139          * - (deq) struct cnxk_bphy_mem for memory range request response
 140          * - (xxx) NULL
 141          */
 142         void *data;
 143 };
 144
 145 struct cnxk_bphy_irq_info {
 146         int irq_num;
 147         cnxk_bphy_intr_handler_t handler;
 148         void *data;
 149         int cpu;
 150 };
 151
 152 static __rte_always_inline int
 153 __rte_pmd_bphy_enq_deq(uint16_t dev_id, unsigned int queue, void *req,
 154                        void *rsp, size_t rsp_size)
 155 {
 156         struct rte_rawdev_buf *bufs[1];
 157         struct rte_rawdev_buf buf;
 158         void *q;
 159         int ret;
 160
 161         q = (void *)(size_t)queue;
 162         buf.buf_addr = req;
 163         bufs[0] = &buf;
 164
 165         ret = rte_rawdev_enqueue_buffers(dev_id, bufs, RTE_DIM(bufs), q);
 166         if (ret < 0)
 167                 return ret;
 168         if (ret != RTE_DIM(bufs))
 169                 return -EIO;
 170
 171         if (!rsp)
 172                 return 0;
 173
 174         ret = rte_rawdev_dequeue_buffers(dev_id, bufs, RTE_DIM(bufs), q);
 175         if (ret < 0)
 176                 return ret;
 177         if (ret != RTE_DIM(bufs))
 178                 return -EIO;
 179
 180         rte_memcpy(rsp, buf.buf_addr, rsp_size);
 181         rte_free(buf.buf_addr);
 182
 183         return 0;
 184 }
 185
 186 static __rte_always_inline int
 187 rte_pmd_bphy_intr_init(uint16_t dev_id)
 188 {
 189         struct cnxk_bphy_irq_msg msg = {
 190                 .type = CNXK_BPHY_IRQ_MSG_TYPE_INIT,
 191         };
 192
 193         return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
 194                                       NULL, 0);
 195 }
 196
 197 static __rte_always_inline int
 198 rte_pmd_bphy_intr_fini(uint16_t dev_id)
 199 {
 200         struct cnxk_bphy_irq_msg msg = {
 201                 .type = CNXK_BPHY_IRQ_MSG_TYPE_FINI,
 202         };
 203
 204         return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
 205                                       NULL, 0);
 206 }
 207
 208 static __rte_always_inline int
 209 rte_pmd_bphy_intr_register(uint16_t dev_id, int irq_num,
 210                            cnxk_bphy_intr_handler_t handler, void *data,
 211                            int cpu)
 212 {
 213         struct cnxk_bphy_irq_info info = {
 214                 .irq_num = irq_num,
 215                 .handler = handler,
 216                 .data = data,
 217                 .cpu = cpu,
 218         };
 219         struct cnxk_bphy_irq_msg msg = {
 220                 .type = CNXK_BPHY_IRQ_MSG_TYPE_REGISTER,
 221                 .data = &info
 222         };
 223
 224         return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
 225                                       NULL, 0);
 226 }
 227
 228 static __rte_always_inline int
 229 rte_pmd_bphy_intr_unregister(uint16_t dev_id, int irq_num)
 230 {
 231         struct cnxk_bphy_irq_info info = {
 232                 .irq_num = irq_num,
 233         };
 234         struct cnxk_bphy_irq_msg msg = {
 235                 .type = CNXK_BPHY_IRQ_MSG_TYPE_UNREGISTER,
 236                 .data = &info
 237         };
 238
 239         return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
 240                                       NULL, 0);
 241 }
 242
 243 static __rte_always_inline int
 244 rte_pmd_bphy_intr_mem_get(uint16_t dev_id, struct cnxk_bphy_mem *mem)
 245 {
 246         struct cnxk_bphy_irq_msg msg = {
 247                 .type = CNXK_BPHY_IRQ_MSG_TYPE_MEM_GET,
 248         };
 249
 250         return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
 251                                       mem, sizeof(*mem));
 252 }
 253
 254 static __rte_always_inline int
 255 rte_pmd_bphy_npa_pf_func_get(uint16_t dev_id, uint16_t *pf_func)
 256 {
 257         struct cnxk_bphy_irq_msg msg = {
 258                 .type = CNXK_BPHY_MSG_TYPE_NPA_PF_FUNC,
 259         };
 260
 261         return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
 262                                       pf_func, sizeof(*pf_func));
 263 }
 264
 265 static __rte_always_inline int
 266 rte_pmd_bphy_sso_pf_func_get(uint16_t dev_id, uint16_t *pf_func)
 267 {
 268         struct cnxk_bphy_irq_msg msg = {
 269                 .type = CNXK_BPHY_MSG_TYPE_SSO_PF_FUNC,
 270         };
 271
 272         return __rte_pmd_bphy_enq_deq(dev_id, CNXK_BPHY_DEF_QUEUE, &msg,
 273                                       pf_func, sizeof(*pf_func));
 274 }
 275
 276 static __rte_always_inline int
 277 rte_pmd_bphy_cgx_get_link_info(uint16_t dev_id, uint16_t lmac,
 278                                struct cnxk_bphy_cgx_msg_link_info *info)
 279 {
 280         struct cnxk_bphy_cgx_msg msg = {
 281                 .type = CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO,
 282         };
 283
 284         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, info, sizeof(*info));
 285 }
 286
 287 static __rte_always_inline int
 288 rte_pmd_bphy_cgx_intlbk_disable(uint16_t dev_id, uint16_t lmac)
 289 {
 290         struct cnxk_bphy_cgx_msg msg = {
 291                 .type = CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE,
 292         };
 293
 294         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
 295 }
 296
 297 static __rte_always_inline int
 298 rte_pmd_bphy_cgx_intlbk_enable(uint16_t dev_id, uint16_t lmac)
 299 {
 300         struct cnxk_bphy_cgx_msg msg = {
 301                 .type = CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE,
 302         };
 303
 304         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
 305 }
 306
 307 static __rte_always_inline int
 308 rte_pmd_bphy_cgx_ptp_rx_disable(uint16_t dev_id, uint16_t lmac)
 309 {
 310         struct cnxk_bphy_cgx_msg msg = {
 311                 .type = CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE,
 312         };
 313
 314         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
 315 }
 316
 317 static __rte_always_inline int
 318 rte_pmd_bphy_cgx_ptp_rx_enable(uint16_t dev_id, uint16_t lmac)
 319 {
 320         struct cnxk_bphy_cgx_msg msg = {
 321                 .type = CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE,
 322         };
 323
 324         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
 325 }
 326
 327 static __rte_always_inline int
 328 rte_pmd_bphy_cgx_set_link_mode(uint16_t dev_id, uint16_t lmac,
 329                                struct cnxk_bphy_cgx_msg_link_mode *mode)
 330 {
 331         struct cnxk_bphy_cgx_msg msg = {
 332                 .type = CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE,
 333                 .data = mode,
 334         };
 335
 336         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
 337 }
 338
 339 static __rte_always_inline int
 340 rte_pmd_bphy_cgx_set_link_state(uint16_t dev_id, uint16_t lmac, bool up)
 341 {
 342         struct cnxk_bphy_cgx_msg_set_link_state state = {
 343                 .state = up,
 344         };
 345         struct cnxk_bphy_cgx_msg msg = {
 346                 .type = CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE,
 347                 .data = &state,
 348         };
 349
 350         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
 351 }
 352
 353 static __rte_always_inline int
 354 rte_pmd_bphy_cgx_start_rxtx(uint16_t dev_id, uint16_t lmac)
 355 {
 356         struct cnxk_bphy_cgx_msg msg = {
 357                 .type = CNXK_BPHY_CGX_MSG_TYPE_START_RXTX,
 358         };
 359
 360         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
 361 }
 362
 363 static __rte_always_inline int
 364 rte_pmd_bphy_cgx_stop_rxtx(uint16_t dev_id, uint16_t lmac)
 365 {
 366         struct cnxk_bphy_cgx_msg msg = {
 367                 .type = CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX,
 368         };
 369
 370         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
 371 }
 372
 373 static __rte_always_inline int
 374 rte_pmd_bphy_cgx_get_supported_fec(uint16_t dev_id, uint16_t lmac,
 375                                    enum cnxk_bphy_cgx_eth_link_fec *fec)
 376 {
 377         struct cnxk_bphy_cgx_msg msg = {
 378                 .type = CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
 379         };
 380
 381         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, fec, sizeof(*fec));
 382 }
 383
 384 static __rte_always_inline int
 385 rte_pmd_bphy_cgx_set_fec(uint16_t dev_id, uint16_t lmac,
 386                          enum cnxk_bphy_cgx_eth_link_fec fec)
 387 {
 388         struct cnxk_bphy_cgx_msg msg = {
 389                 .type = CNXK_BPHY_CGX_MSG_TYPE_SET_FEC,
 390                 .data = &fec,
 391         };
 392
 393         return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);
 394 }
 395
 396 #ifdef __cplusplus
 397 }
 398 #endif
 399
 400 #endif /* _CNXK_BPHY_H_ */