drivers/raw/ifpga/afu_pmd_core.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2022 Intel Corporation
   3  */
   4
   5 #ifndef AFU_PMD_CORE_H
   6 #define AFU_PMD_CORE_H
   7
   8 #ifdef __cplusplus
   9 extern "C" {
  10 #endif
  11
  12 #include <stdint.h>
  13 #include <stdio.h>
  14 #include <unistd.h>
  15
  16 #include <rte_spinlock.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_ifpga.h>
  19 #include <rte_rawdev.h>
  20
  21 #include "ifpga_rawdev.h"
  22
  23 #define AFU_RAWDEV_MAX_DRVS  32
  24
  25 struct afu_rawdev;
  26
  27 struct afu_ops {
  28         int (*init)(struct afu_rawdev *dev);
  29         int (*config)(struct afu_rawdev *dev, void *config,
  30                 size_t config_size);
  31         int (*start)(struct afu_rawdev *dev);
  32         int (*stop)(struct afu_rawdev *dev);
  33         int (*test)(struct afu_rawdev *dev);
  34         int (*close)(struct afu_rawdev *dev);
  35         int (*reset)(struct afu_rawdev *dev);
  36         int (*dump)(struct afu_rawdev *dev, FILE *f);
  37 };
  38
  39 struct afu_shared_data {
  40         rte_spinlock_t lock;  /* lock for multi-process access */
  41 };
  42
  43 struct afu_rawdev_drv {
  44         TAILQ_ENTRY(afu_rawdev_drv) next;
  45         struct rte_afu_uuid uuid;
  46         struct afu_ops *ops;
  47 };
  48
  49 struct afu_rawdev {
  50         struct rte_rawdev *rawdev;  /* point to parent raw device */
  51         struct afu_shared_data *sd;  /* shared data for multi-process */
  52         struct afu_ops *ops;  /* device operation functions */
  53         int port;  /* index of port the AFU attached */
  54         void *addr;  /* base address of AFU registers */
  55         void *priv;  /* private driver data */
  56 };
  57
  58 static inline struct afu_rawdev *
  59 afu_rawdev_get_priv(const struct rte_rawdev *rawdev)
  60 {
  61         return rawdev ? (struct afu_rawdev *)rawdev->dev_private : NULL;
  62 }
  63
  64 #define CLS_TO_SIZE(n)  ((n) << 6)  /* get size of n cache lines */
  65 #define SIZE_TO_CLS(s)  ((s) >> 6)  /* convert size to number of cache lines */
  66 #define MHZ(f)  ((f) * 1000000)
  67
  68 #define dsm_poll_timeout(addr, val, cond, invl, timeout) \
  69 ({                                                       \
  70         uint64_t __wait = 0;                                 \
  71         uint64_t __invl = (invl);                            \
  72         uint64_t __timeout = (timeout);                      \
  73         for (; __wait <= __timeout; __wait += __invl) {      \
  74                 (val) = *(addr);                                 \
  75                 if (cond)                                        \
  76                         break;                                       \
  77                 rte_delay_ms(__invl);                            \
  78         }                                                    \
  79         (cond) ? 0 : 1;                                      \
  80 })
  81
  82 void afu_pmd_register(struct afu_rawdev_drv *driver);
  83 void afu_pmd_unregister(struct afu_rawdev_drv *driver);
  84
  85 #define AFU_PMD_REGISTER(drv)\
  86 RTE_INIT(afupmdinitfunc_ ##drv)\
  87 {\
  88         afu_pmd_register(&drv);\
  89 }
  90
  91 #ifdef __cplusplus
  92 }
  93 #endif
  94
  95 #endif /* AFU_PMD_CORE_H */