drivers/raw/ifpga/base/ifpga_api.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2018 Intel Corporation
   3  */
   4
   5 #include "ifpga_api.h"
   6 #include "ifpga_enumerate.h"
   7 #include "ifpga_feature_dev.h"
   8
   9 #include "opae_hw_api.h"
  10
  11 /* Accelerator APIs */
  12 static int ifpga_acc_get_uuid(struct opae_accelerator *acc,
  13                               struct uuid *uuid)
  14 {
  15         struct opae_bridge *br = acc->br;
  16         struct ifpga_port_hw *port;
  17
  18         if (!br || !br->data)
  19                 return -EINVAL;
  20
  21         port = br->data;
  22
  23         return fpga_get_afu_uuid(port, uuid);
  24 }
  25
  26 static int ifpga_acc_set_irq(struct opae_accelerator *acc,
  27                              u32 start, u32 count, s32 evtfds[])
  28 {
  29         struct ifpga_afu_info *afu_info = acc->data;
  30         struct opae_bridge *br = acc->br;
  31         struct ifpga_port_hw *port;
  32         struct fpga_uafu_irq_set irq_set;
  33
  34         if (!br || !br->data)
  35                 return -EINVAL;
  36
  37         if (start >= afu_info->num_irqs || start + count > afu_info->num_irqs)
  38                 return -EINVAL;
  39
  40         port = br->data;
  41
  42         irq_set.start = start;
  43         irq_set.count = count;
  44         irq_set.evtfds = evtfds;
  45
  46         return ifpga_set_irq(port->parent, FEATURE_FIU_ID_PORT, port->port_id,
  47                              IFPGA_PORT_FEATURE_ID_UINT, &irq_set);
  48 }
  49
  50 static int ifpga_acc_get_info(struct opae_accelerator *acc,
  51                               struct opae_acc_info *info)
  52 {
  53         struct ifpga_afu_info *afu_info = acc->data;
  54
  55         if (!afu_info)
  56                 return -ENODEV;
  57
  58         info->num_regions = afu_info->num_regions;
  59         info->num_irqs = afu_info->num_irqs;
  60
  61         return 0;
  62 }
  63
  64 static int ifpga_acc_get_region_info(struct opae_accelerator *acc,
  65                                      struct opae_acc_region_info *info)
  66 {
  67         struct ifpga_afu_info *afu_info = acc->data;
  68
  69         if (!afu_info)
  70                 return -EINVAL;
  71
  72         if (info->index >= afu_info->num_regions)
  73                 return -EINVAL;
  74
  75         /* always one RW region only for AFU now */
  76         info->flags = ACC_REGION_READ | ACC_REGION_WRITE | ACC_REGION_MMIO;
  77         info->len = afu_info->region[info->index].len;
  78         info->addr = afu_info->region[info->index].addr;
  79         info->phys_addr = afu_info->region[info->index].phys_addr;
  80
  81         return 0;
  82 }
  83
  84 static int ifpga_acc_read(struct opae_accelerator *acc, unsigned int region_idx,
  85                           u64 offset, unsigned int byte, void *data)
  86 {
  87         struct ifpga_afu_info *afu_info = acc->data;
  88         struct opae_reg_region *region;
  89
  90         if (!afu_info)
  91                 return -EINVAL;
  92
  93         if (offset + byte <= offset)
  94                 return -EINVAL;
  95
  96         if (region_idx >= afu_info->num_regions)
  97                 return -EINVAL;
  98
  99         region = &afu_info->region[region_idx];
 100         if (offset + byte > region->len)
 101                 return -EINVAL;
 102
 103         switch (byte) {
 104         case 8:
 105                 *(u64  *)data = opae_readq(region->addr + offset);
 106                 break;
 107         case 4:
 108                 *(u32 *)data = opae_readl(region->addr + offset);
 109                 break;
 110         case 2:
 111                 *(u16 *)data = opae_readw(region->addr + offset);
 112                 break;
 113         case 1:
 114                 *(u8 *)data = opae_readb(region->addr + offset);
 115                 break;
 116         default:
 117                 return -EINVAL;
 118         }
 119
 120         return 0;
 121 }
 122
 123 static int ifpga_acc_write(struct opae_accelerator *acc,
 124                            unsigned int region_idx, u64 offset,
 125                            unsigned int byte, void *data)
 126 {
 127         struct ifpga_afu_info *afu_info = acc->data;
 128         struct opae_reg_region *region;
 129
 130         if (!afu_info)
 131                 return -EINVAL;
 132
 133         if (offset + byte <= offset)
 134                 return -EINVAL;
 135
 136         if (region_idx >= afu_info->num_regions)
 137                 return -EINVAL;
 138
 139         region = &afu_info->region[region_idx];
 140         if (offset + byte > region->len)
 141                 return -EINVAL;
 142
 143         /* normal mmio case */
 144         switch (byte) {
 145         case 8:
 146                 opae_writeq(*(u64 *)data, region->addr + offset);
 147                 break;
 148         case 4:
 149                 opae_writel(*(u32 *)data, region->addr + offset);
 150                 break;
 151         case 2:
 152                 opae_writew(*(u16 *)data, region->addr + offset);
 153                 break;
 154         case 1:
 155                 opae_writeb(*(u8 *)data, region->addr + offset);
 156                 break;
 157         default:
 158                 return -EINVAL;
 159         }
 160
 161         return 0;
 162 }
 163
 164 struct opae_accelerator_ops ifpga_acc_ops = {
 165         .read = ifpga_acc_read,
 166         .write = ifpga_acc_write,
 167         .set_irq = ifpga_acc_set_irq,
 168         .get_info = ifpga_acc_get_info,
 169         .get_region_info = ifpga_acc_get_region_info,
 170         .get_uuid = ifpga_acc_get_uuid,
 171 };
 172
 173 /* Bridge APIs */
 174 static int ifpga_br_reset(struct opae_bridge *br)
 175 {
 176         struct ifpga_port_hw *port = br->data;
 177
 178         return fpga_port_reset(port);
 179 }
 180
 181 struct opae_bridge_ops ifpga_br_ops = {
 182         .reset = ifpga_br_reset,
 183 };
 184
 185 /* Manager APIs */
 186 static int ifpga_mgr_flash(struct opae_manager *mgr, int id, const char *buf,
 187                            u32 size, u64 *status)
 188 {
 189         struct ifpga_fme_hw *fme = mgr->data;
 190         struct ifpga_hw *hw = fme->parent;
 191
 192         return ifpga_pr(hw, id, buf, size, status);
 193 }
 194
 195 static int ifpga_mgr_get_eth_group_region_info(struct opae_manager *mgr,
 196                 struct opae_eth_group_region_info *info)
 197 {
 198         struct ifpga_fme_hw *fme = mgr->data;
 199
 200         if (info->group_id >= MAX_ETH_GROUP_DEVICES)
 201                 return -EINVAL;
 202
 203         info->phys_addr = fme->eth_group_region[info->group_id].phys_addr;
 204         info->addr = fme->eth_group_region[info->group_id].addr;
 205         info->len = fme->eth_group_region[info->group_id].len;
 206
 207         info->mem_idx = fme->nums_acc_region + info->group_id;
 208
 209         return 0;
 210 }
 211
 212 static int ifpga_mgr_get_sensor_value(struct opae_manager *mgr,
 213                 struct opae_sensor_info *sensor,
 214                 unsigned int *value)
 215 {
 216         struct ifpga_fme_hw *fme = mgr->data;
 217
 218         return fme_mgr_get_sensor_value(fme, sensor, value);
 219 }
 220
 221 struct opae_manager_ops ifpga_mgr_ops = {
 222         .flash = ifpga_mgr_flash,
 223         .get_eth_group_region_info = ifpga_mgr_get_eth_group_region_info,
 224         .get_sensor_value = ifpga_mgr_get_sensor_value,
 225 };
 226
 227 static int ifpga_mgr_read_mac_rom(struct opae_manager *mgr, int offset,
 228                 void *buf, int size)
 229 {
 230         struct ifpga_fme_hw *fme = mgr->data;
 231
 232         return fme_mgr_read_mac_rom(fme, offset, buf, size);
 233 }
 234
 235 static int ifpga_mgr_write_mac_rom(struct opae_manager *mgr, int offset,
 236                 void *buf, int size)
 237 {
 238         struct ifpga_fme_hw *fme = mgr->data;
 239
 240         return fme_mgr_write_mac_rom(fme, offset, buf, size);
 241 }
 242
 243 static int ifpga_mgr_get_eth_group_nums(struct opae_manager *mgr)
 244 {
 245         struct ifpga_fme_hw *fme = mgr->data;
 246
 247         return fme_mgr_get_eth_group_nums(fme);
 248 }
 249
 250 static int ifpga_mgr_get_eth_group_info(struct opae_manager *mgr,
 251                 u8 group_id, struct opae_eth_group_info *info)
 252 {
 253         struct ifpga_fme_hw *fme = mgr->data;
 254
 255         return fme_mgr_get_eth_group_info(fme, group_id, info);
 256 }
 257
 258 static int ifpga_mgr_eth_group_reg_read(struct opae_manager *mgr, u8 group_id,
 259                 u8 type, u8 index, u16 addr, u32 *data)
 260 {
 261         struct ifpga_fme_hw *fme = mgr->data;
 262
 263         return fme_mgr_eth_group_read_reg(fme, group_id,
 264                         type, index, addr, data);
 265 }
 266
 267 static int ifpga_mgr_eth_group_reg_write(struct opae_manager *mgr, u8 group_id,
 268                 u8 type, u8 index, u16 addr, u32 data)
 269 {
 270         struct ifpga_fme_hw *fme = mgr->data;
 271
 272         return fme_mgr_eth_group_write_reg(fme, group_id,
 273                         type, index, addr, data);
 274 }
 275
 276 static int ifpga_mgr_get_retimer_info(struct opae_manager *mgr,
 277                 struct opae_retimer_info *info)
 278 {
 279         struct ifpga_fme_hw *fme = mgr->data;
 280
 281         return fme_mgr_get_retimer_info(fme, info);
 282 }
 283
 284 static int ifpga_mgr_get_retimer_status(struct opae_manager *mgr,
 285                 struct opae_retimer_status *status)
 286 {
 287         struct ifpga_fme_hw *fme = mgr->data;
 288
 289         return fme_mgr_get_retimer_status(fme, status);
 290 }
 291
 292 /* Network APIs in FME */
 293 struct opae_manager_networking_ops ifpga_mgr_network_ops = {
 294         .read_mac_rom = ifpga_mgr_read_mac_rom,
 295         .write_mac_rom = ifpga_mgr_write_mac_rom,
 296         .get_eth_group_nums = ifpga_mgr_get_eth_group_nums,
 297         .get_eth_group_info = ifpga_mgr_get_eth_group_info,
 298         .eth_group_reg_read = ifpga_mgr_eth_group_reg_read,
 299         .eth_group_reg_write = ifpga_mgr_eth_group_reg_write,
 300         .get_retimer_info = ifpga_mgr_get_retimer_info,
 301         .get_retimer_status = ifpga_mgr_get_retimer_status,
 302 };
 303
 304 /* Adapter APIs */
 305 static int ifpga_adapter_enumerate(struct opae_adapter *adapter)
 306 {
 307         struct ifpga_hw *hw = malloc(sizeof(*hw));
 308
 309         if (hw) {
 310                 opae_memset(hw, 0, sizeof(*hw));
 311                 hw->pci_data = adapter->data;
 312                 hw->adapter = adapter;
 313                 if (ifpga_bus_enumerate(hw))
 314                         goto error;
 315                 return ifpga_bus_init(hw);
 316         }
 317
 318 error:
 319         return -ENOMEM;
 320 }
 321
 322 struct opae_adapter_ops ifpga_adapter_ops = {
 323         .enumerate = ifpga_adapter_enumerate,
 324 };
 325
 326 /**
 327  *  ifpga_pr - do the partial reconfiguration for a given port device
 328  *  @hw: pointer to the HW structure
 329  *  @port_id: the port device id
 330  *  @buffer: the buffer of the bitstream
 331  *  @size: the size of the bitstream
 332  *  @status: hardware status including PR error code if return -EIO.
 333  *
 334  *  @return
 335  *   - 0: Success, partial reconfiguration finished.
 336  *   - <0: Error code returned in partial reconfiguration.
 337  **/
 338 int ifpga_pr(struct ifpga_hw *hw, u32 port_id, const char *buffer, u32 size,
 339              u64 *status)
 340 {
 341         if (!is_valid_port_id(hw, port_id))
 342                 return -ENODEV;
 343
 344         return do_pr(hw, port_id, buffer, size, status);
 345 }
 346
 347 int ifpga_get_prop(struct ifpga_hw *hw, u32 fiu_id, u32 port_id,
 348                    struct feature_prop *prop)
 349 {
 350         if (!hw || !prop)
 351                 return -EINVAL;
 352
 353         switch (fiu_id) {
 354         case FEATURE_FIU_ID_FME:
 355                 return fme_get_prop(&hw->fme, prop);
 356         case FEATURE_FIU_ID_PORT:
 357                 if (!is_valid_port_id(hw, port_id))
 358                         return -ENODEV;
 359                 return port_get_prop(&hw->port[port_id], prop);
 360         }
 361
 362         return -ENOENT;
 363 }
 364
 365 int ifpga_set_prop(struct ifpga_hw *hw, u32 fiu_id, u32 port_id,
 366                    struct feature_prop *prop)
 367 {
 368         if (!hw || !prop)
 369                 return -EINVAL;
 370
 371         switch (fiu_id) {
 372         case FEATURE_FIU_ID_FME:
 373                 return fme_set_prop(&hw->fme, prop);
 374         case FEATURE_FIU_ID_PORT:
 375                 if (!is_valid_port_id(hw, port_id))
 376                         return -ENODEV;
 377                 return port_set_prop(&hw->port[port_id], prop);
 378         }
 379
 380         return -ENOENT;
 381 }
 382
 383 int ifpga_set_irq(struct ifpga_hw *hw, u32 fiu_id, u32 port_id,
 384                   u32 feature_id, void *irq_set)
 385 {
 386         if (!hw || !irq_set)
 387                 return -EINVAL;
 388
 389         switch (fiu_id) {
 390         case FEATURE_FIU_ID_FME:
 391                 return fme_set_irq(&hw->fme, feature_id, irq_set);
 392         case FEATURE_FIU_ID_PORT:
 393                 if (!is_valid_port_id(hw, port_id))
 394                         return -ENODEV;
 395                 return port_set_irq(&hw->port[port_id], feature_id, irq_set);
 396         }
 397
 398         return -ENOENT;
 399 }