1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2018 Intel Corporation
6 #include "ifpga_enumerate.h"
7 #include "ifpga_feature_dev.h"
8 #include "ifpga_sec_mgr.h"
10 #include "opae_hw_api.h"
12 /* Accelerator APIs */
13 static int ifpga_acc_get_uuid(struct opae_accelerator *acc,
16 struct opae_bridge *br = acc->br;
17 struct ifpga_port_hw *port;
24 return fpga_get_afu_uuid(port, uuid);
27 static int ifpga_acc_set_irq(struct opae_accelerator *acc,
28 u32 start, u32 count, s32 evtfds[])
30 struct ifpga_afu_info *afu_info = acc->data;
31 struct opae_bridge *br = acc->br;
32 struct ifpga_port_hw *port;
33 struct fpga_uafu_irq_set irq_set;
38 if (start >= afu_info->num_irqs || start + count > afu_info->num_irqs)
43 irq_set.start = start;
44 irq_set.count = count;
45 irq_set.evtfds = evtfds;
47 return ifpga_set_irq(port->parent, FEATURE_FIU_ID_PORT, port->port_id,
48 IFPGA_PORT_FEATURE_ID_UINT, &irq_set);
51 static int ifpga_acc_get_info(struct opae_accelerator *acc,
52 struct opae_acc_info *info)
54 struct ifpga_afu_info *afu_info = acc->data;
59 info->num_regions = afu_info->num_regions;
60 info->num_irqs = afu_info->num_irqs;
65 static int ifpga_acc_get_region_info(struct opae_accelerator *acc,
66 struct opae_acc_region_info *info)
68 struct ifpga_afu_info *afu_info = acc->data;
73 if (info->index >= afu_info->num_regions)
76 /* always one RW region only for AFU now */
77 info->flags = ACC_REGION_READ | ACC_REGION_WRITE | ACC_REGION_MMIO;
78 info->len = afu_info->region[info->index].len;
79 info->addr = afu_info->region[info->index].addr;
80 info->phys_addr = afu_info->region[info->index].phys_addr;
85 static int ifpga_acc_read(struct opae_accelerator *acc, unsigned int region_idx,
86 u64 offset, unsigned int byte, void *data)
88 struct ifpga_afu_info *afu_info = acc->data;
89 struct opae_reg_region *region;
94 if (offset + byte <= offset)
97 if (region_idx >= afu_info->num_regions)
100 region = &afu_info->region[region_idx];
101 if (offset + byte > region->len)
106 *(u64 *)data = opae_readq(region->addr + offset);
109 *(u32 *)data = opae_readl(region->addr + offset);
112 *(u16 *)data = opae_readw(region->addr + offset);
115 *(u8 *)data = opae_readb(region->addr + offset);
124 static int ifpga_acc_write(struct opae_accelerator *acc,
125 unsigned int region_idx, u64 offset,
126 unsigned int byte, void *data)
128 struct ifpga_afu_info *afu_info = acc->data;
129 struct opae_reg_region *region;
134 if (offset + byte <= offset)
137 if (region_idx >= afu_info->num_regions)
140 region = &afu_info->region[region_idx];
141 if (offset + byte > region->len)
144 /* normal mmio case */
147 opae_writeq(*(u64 *)data, region->addr + offset);
150 opae_writel(*(u32 *)data, region->addr + offset);
153 opae_writew(*(u16 *)data, region->addr + offset);
156 opae_writeb(*(u8 *)data, region->addr + offset);
165 struct opae_accelerator_ops ifpga_acc_ops = {
166 .read = ifpga_acc_read,
167 .write = ifpga_acc_write,
168 .set_irq = ifpga_acc_set_irq,
169 .get_info = ifpga_acc_get_info,
170 .get_region_info = ifpga_acc_get_region_info,
171 .get_uuid = ifpga_acc_get_uuid,
175 static int ifpga_br_reset(struct opae_bridge *br)
177 struct ifpga_port_hw *port = br->data;
179 return fpga_port_reset(port);
182 struct opae_bridge_ops ifpga_br_ops = {
183 .reset = ifpga_br_reset,
187 static int ifpga_mgr_flash(struct opae_manager *mgr, int id, const char *buf,
188 u32 size, u64 *status)
190 struct ifpga_fme_hw *fme = mgr->data;
191 struct ifpga_hw *hw = fme->parent;
193 return ifpga_pr(hw, id, buf, size, status);
196 static int ifpga_mgr_get_eth_group_region_info(struct opae_manager *mgr,
197 struct opae_eth_group_region_info *info)
199 struct ifpga_fme_hw *fme = mgr->data;
201 if (info->group_id >= MAX_ETH_GROUP_DEVICES)
204 info->phys_addr = fme->eth_group_region[info->group_id].phys_addr;
205 info->addr = fme->eth_group_region[info->group_id].addr;
206 info->len = fme->eth_group_region[info->group_id].len;
208 info->mem_idx = fme->nums_acc_region + info->group_id;
213 static int ifpga_mgr_get_sensor_value(struct opae_manager *mgr,
214 struct opae_sensor_info *sensor,
217 struct ifpga_fme_hw *fme = mgr->data;
219 return fme_mgr_get_sensor_value(fme, sensor, value);
222 static int ifpga_mgr_get_board_info(struct opae_manager *mgr,
223 struct opae_board_info **info)
225 struct ifpga_fme_hw *fme = mgr->data;
227 *info = &fme->board_info;
232 static int ifpga_mgr_get_uuid(struct opae_manager *mgr, struct uuid *uuid)
234 struct ifpga_fme_hw *fme = mgr->data;
236 return fpga_get_pr_uuid(fme, uuid);
239 static int ifpga_mgr_update_flash(struct opae_manager *mgr, const char *image,
242 struct ifpga_fme_hw *fme = mgr->data;
244 return fpga_update_flash(fme, image, status);
247 static int ifpga_mgr_stop_flash_update(struct opae_manager *mgr, int force)
249 struct ifpga_fme_hw *fme = mgr->data;
251 return fpga_stop_flash_update(fme, force);
254 static int ifpga_mgr_reload(struct opae_manager *mgr, int type, int page)
256 struct ifpga_fme_hw *fme = mgr->data;
258 return fpga_reload(fme, type, page);
261 struct opae_manager_ops ifpga_mgr_ops = {
262 .flash = ifpga_mgr_flash,
263 .get_eth_group_region_info = ifpga_mgr_get_eth_group_region_info,
264 .get_sensor_value = ifpga_mgr_get_sensor_value,
265 .get_board_info = ifpga_mgr_get_board_info,
266 .get_uuid = ifpga_mgr_get_uuid,
267 .update_flash = ifpga_mgr_update_flash,
268 .stop_flash_update = ifpga_mgr_stop_flash_update,
269 .reload = ifpga_mgr_reload,
272 static int ifpga_mgr_read_mac_rom(struct opae_manager *mgr, int offset,
275 struct ifpga_fme_hw *fme = mgr->data;
277 return fme_mgr_read_mac_rom(fme, offset, buf, size);
280 static int ifpga_mgr_write_mac_rom(struct opae_manager *mgr, int offset,
283 struct ifpga_fme_hw *fme = mgr->data;
285 return fme_mgr_write_mac_rom(fme, offset, buf, size);
288 static int ifpga_mgr_get_eth_group_nums(struct opae_manager *mgr)
290 struct ifpga_fme_hw *fme = mgr->data;
292 return fme_mgr_get_eth_group_nums(fme);
295 static int ifpga_mgr_get_eth_group_info(struct opae_manager *mgr,
296 u8 group_id, struct opae_eth_group_info *info)
298 struct ifpga_fme_hw *fme = mgr->data;
300 return fme_mgr_get_eth_group_info(fme, group_id, info);
303 static int ifpga_mgr_eth_group_reg_read(struct opae_manager *mgr, u8 group_id,
304 u8 type, u8 index, u16 addr, u32 *data)
306 struct ifpga_fme_hw *fme = mgr->data;
308 return fme_mgr_eth_group_read_reg(fme, group_id,
309 type, index, addr, data);
312 static int ifpga_mgr_eth_group_reg_write(struct opae_manager *mgr, u8 group_id,
313 u8 type, u8 index, u16 addr, u32 data)
315 struct ifpga_fme_hw *fme = mgr->data;
317 return fme_mgr_eth_group_write_reg(fme, group_id,
318 type, index, addr, data);
321 static int ifpga_mgr_get_retimer_info(struct opae_manager *mgr,
322 struct opae_retimer_info *info)
324 struct ifpga_fme_hw *fme = mgr->data;
326 return fme_mgr_get_retimer_info(fme, info);
329 static int ifpga_mgr_get_retimer_status(struct opae_manager *mgr,
330 struct opae_retimer_status *status)
332 struct ifpga_fme_hw *fme = mgr->data;
334 return fme_mgr_get_retimer_status(fme, status);
337 /* Network APIs in FME */
338 struct opae_manager_networking_ops ifpga_mgr_network_ops = {
339 .read_mac_rom = ifpga_mgr_read_mac_rom,
340 .write_mac_rom = ifpga_mgr_write_mac_rom,
341 .get_eth_group_nums = ifpga_mgr_get_eth_group_nums,
342 .get_eth_group_info = ifpga_mgr_get_eth_group_info,
343 .eth_group_reg_read = ifpga_mgr_eth_group_reg_read,
344 .eth_group_reg_write = ifpga_mgr_eth_group_reg_write,
345 .get_retimer_info = ifpga_mgr_get_retimer_info,
346 .get_retimer_status = ifpga_mgr_get_retimer_status,
350 static int ifpga_adapter_enumerate(struct opae_adapter *adapter)
352 struct ifpga_hw *hw = malloc(sizeof(*hw));
355 opae_memset(hw, 0, sizeof(*hw));
356 hw->pci_data = adapter->data;
357 hw->adapter = adapter;
358 if (ifpga_bus_enumerate(hw))
360 return ifpga_bus_init(hw);
367 static void ifpga_adapter_destroy(struct opae_adapter *adapter)
369 struct ifpga_fme_hw *fme;
371 if (adapter && adapter->mgr && adapter->mgr->data) {
372 fme = (struct ifpga_fme_hw *)adapter->mgr->data;
374 ifpga_bus_uinit(fme->parent);
378 struct opae_adapter_ops ifpga_adapter_ops = {
379 .enumerate = ifpga_adapter_enumerate,
380 .destroy = ifpga_adapter_destroy,
384 * ifpga_pr - do the partial reconfiguration for a given port device
385 * @hw: pointer to the HW structure
386 * @port_id: the port device id
387 * @buffer: the buffer of the bitstream
388 * @size: the size of the bitstream
389 * @status: hardware status including PR error code if return -EIO.
392 * - 0: Success, partial reconfiguration finished.
393 * - <0: Error code returned in partial reconfiguration.
395 int ifpga_pr(struct ifpga_hw *hw, u32 port_id, const char *buffer, u32 size,
398 if (!is_valid_port_id(hw, port_id))
401 return do_pr(hw, port_id, buffer, size, status);
404 int ifpga_get_prop(struct ifpga_hw *hw, u32 fiu_id, u32 port_id,
405 struct feature_prop *prop)
411 case FEATURE_FIU_ID_FME:
412 return fme_get_prop(&hw->fme, prop);
413 case FEATURE_FIU_ID_PORT:
414 if (!is_valid_port_id(hw, port_id))
416 return port_get_prop(&hw->port[port_id], prop);
422 int ifpga_set_prop(struct ifpga_hw *hw, u32 fiu_id, u32 port_id,
423 struct feature_prop *prop)
429 case FEATURE_FIU_ID_FME:
430 return fme_set_prop(&hw->fme, prop);
431 case FEATURE_FIU_ID_PORT:
432 if (!is_valid_port_id(hw, port_id))
434 return port_set_prop(&hw->port[port_id], prop);
440 int ifpga_set_irq(struct ifpga_hw *hw, u32 fiu_id, u32 port_id,
441 u32 feature_id, void *irq_set)
447 case FEATURE_FIU_ID_FME:
448 return fme_set_irq(&hw->fme, feature_id, irq_set);
449 case FEATURE_FIU_ID_PORT:
450 if (!is_valid_port_id(hw, port_id))
452 return port_set_irq(&hw->port[port_id], feature_id, irq_set);