1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2020 Intel Corporation
8 #include "ifpga_sec_mgr.h"
10 static struct ifpga_sec_mgr *sec_mgr;
12 static void set_rsu_control(struct ifpga_sec_mgr *smgr, uint32_t ctrl)
14 if (smgr && smgr->rsu_control)
15 *smgr->rsu_control = ctrl;
18 static uint32_t get_rsu_control(struct ifpga_sec_mgr *smgr)
20 if (smgr && smgr->rsu_control)
21 return *smgr->rsu_control;
25 static void set_rsu_status(struct ifpga_sec_mgr *smgr, uint32_t status,
28 if (smgr && smgr->rsu_status)
29 *smgr->rsu_status = IFPGA_RSU_STATUS(status, progress);
32 static void get_rsu_status(struct ifpga_sec_mgr *smgr, uint32_t *status,
35 if (smgr && smgr->rsu_status) {
37 *status = IFPGA_RSU_GET_STAT(*smgr->rsu_status);
39 *progress = IFPGA_RSU_GET_PROG(*smgr->rsu_status);
43 static void sig_handler(int sig, siginfo_t *info, void *data)
51 dev_info(sec_mgr, "Interrupt secure flash update"
53 set_rsu_control(sec_mgr, IFPGA_RSU_ABORT);
61 static void log_time(time_t t, const char *msg)
69 } else if (t < 3600) {
70 s = (uint32_t)(t % 60);
71 m = (uint32_t)(t / 60);
73 s = (uint32_t)(t % 60);
74 m = (uint32_t)((t % 3600) / 60);
75 h = (uint32_t)(t / 3600);
77 printf("%s - %02u:%02u:%02u\n", msg, h, m, s);
80 static int start_flash_update(struct ifpga_sec_mgr *smgr)
85 if (!smgr->ops || !smgr->ops->prepare)
88 return smgr->ops->prepare(smgr);
91 static int write_flash_image(struct ifpga_sec_mgr *smgr, const char *image,
97 uint32_t to_transfer = 0;
98 uint32_t one_percent = 0;
100 uint32_t old_prog = -1;
101 ssize_t read_size = 0;
108 if (!smgr->ops || !smgr->ops->write_blk)
111 fd = open(image, O_RDONLY);
114 "Failed to open \'%s\' for RD [e:%s]\n",
115 image, strerror(errno));
119 buf = malloc(IFPGA_RSU_DATA_BLK_SIZE);
121 dev_err(smgr, "Failed to allocate memory for flash update\n");
126 length = smgr->rsu_length;
127 one_percent = length / 100;
129 to_transfer = (length > IFPGA_RSU_DATA_BLK_SIZE) ?
130 IFPGA_RSU_DATA_BLK_SIZE : length;
131 lseek(fd, offset, SEEK_SET);
132 read_size = read(fd, buf, to_transfer);
134 dev_err(smgr, "Failed to read from \'%s\' [e:%s]\n",
135 image, strerror(errno));
139 if ((uint32_t)read_size != to_transfer) {
141 "Read length %zd is not expected [e:%u]\n",
142 read_size, to_transfer);
149 if (get_rsu_control(smgr) == IFPGA_RSU_ABORT) {
153 ret = smgr->ops->write_blk(smgr, buf, offset,
158 } while (++retry <= IFPGA_RSU_WRITE_RETRY);
159 if (retry > IFPGA_RSU_WRITE_RETRY) {
160 dev_err(smgr, "Failed to write to staging area 0x%x\n",
166 length -= to_transfer;
167 offset += to_transfer;
168 prog = offset / one_percent;
169 if (prog != old_prog) {
170 printf("\r%d%%", prog);
172 set_rsu_status(smgr, IFPGA_RSU_READY, prog);
175 } while (length > 0);
176 set_rsu_status(smgr, IFPGA_RSU_READY, 100);
185 static int apply_flash_update(struct ifpga_sec_mgr *smgr)
187 uint32_t one_percent = 0;
188 uint32_t one_percent_time = 0;
190 uint32_t old_prog = -1;
191 uint32_t copy_time = 0;
197 if (!smgr->ops || !smgr->ops->write_done || !smgr->ops->check_complete)
200 if (smgr->ops->write_done(smgr) < 0) {
201 dev_err(smgr, "Failed to apply flash update\n");
205 one_percent = (smgr->rsu_length + 99) / 100;
206 if (smgr->copy_speed == 0) /* avoid zero divide fault */
207 smgr->copy_speed = 1;
208 one_percent_time = (one_percent + smgr->copy_speed - 1) /
210 if (one_percent_time == 0) /* avoid zero divide fault */
211 one_percent_time = 1;
214 ret = smgr->ops->check_complete(smgr);
219 prog = copy_time / one_percent_time;
222 if (prog != old_prog) {
223 printf("\r%d%%", prog);
225 set_rsu_status(smgr, IFPGA_RSU_COPYING, prog);
232 dev_err(smgr, "Failed to complete secure flash update\n");
235 set_rsu_status(smgr, IFPGA_RSU_COPYING, 100);
241 static int secure_update_cancel(struct ifpga_sec_mgr *smgr)
246 if (!smgr->ops || !smgr->ops->cancel)
249 return smgr->ops->cancel(smgr);
252 static int secure_update_status(struct ifpga_sec_mgr *smgr, uint64_t *status)
257 if (!smgr->ops || !smgr->ops->get_hw_errinfo)
261 *status = smgr->ops->get_hw_errinfo(smgr);
266 int fpga_update_flash(struct ifpga_fme_hw *fme, const char *image,
269 struct ifpga_hw *hw = NULL;
270 struct ifpga_sec_mgr *smgr = NULL;
271 uint32_t rsu_stat = 0;
273 struct sigaction old_sigint_action;
278 if (!fme || !image || !status) {
279 dev_err(fme, "Input parameter of %s is invalid\n", __func__);
283 hw = (struct ifpga_hw *)fme->parent;
285 dev_err(fme, "Parent of FME not found\n");
289 smgr = (struct ifpga_sec_mgr *)fme->sec_mgr;
290 if (!smgr || !smgr->max10_dev) {
291 dev_err(smgr, "Security manager not initialized\n");
295 opae_adapter_lock(hw->adapter, -1);
296 get_rsu_status(smgr, &rsu_stat, NULL);
297 if (rsu_stat != IFPGA_RSU_IDLE) {
298 opae_adapter_unlock(hw->adapter);
299 if (rsu_stat == IFPGA_RSU_REBOOT)
300 dev_info(smgr, "Reboot is in progress\n");
302 dev_info(smgr, "Update is in progress\n");
305 set_rsu_control(smgr, 0);
306 set_rsu_status(smgr, IFPGA_RSU_PREPARE, 0);
307 opae_adapter_unlock(hw->adapter);
309 fd = open(image, O_RDONLY);
312 "Failed to open \'%s\' for RD [e:%s]\n",
313 image, strerror(errno));
316 smgr->rsu_length = lseek(fd, 0, SEEK_END);
319 if (smgr->max10_dev->staging_area_size < smgr->rsu_length) {
320 dev_err(dev, "Size of staging area is small than image length "
321 "[%u<%u]\n", smgr->max10_dev->staging_area_size,
326 printf("Updating from file \'%s\' with size %u\n",
327 image, smgr->rsu_length);
330 memset(&sa, 0, sizeof(struct sigaction));
331 sa.sa_flags = SA_SIGINFO | SA_RESETHAND;
332 sa.sa_sigaction = sig_handler;
333 ret = sigaction(SIGINT, &sa, &old_sigint_action);
335 dev_warn(dev, "Failed to register signal handler"
341 log_time(time(NULL) - start, "Starting secure flash update");
342 ret = start_flash_update(smgr);
346 set_rsu_status(smgr, IFPGA_RSU_READY, 0);
347 log_time(time(NULL) - start, "Writing to staging area");
348 ret = write_flash_image(smgr, image, 0);
352 set_rsu_status(smgr, IFPGA_RSU_COPYING, 0);
353 log_time(time(NULL) - start, "Applying secure flash update");
354 ret = apply_flash_update(smgr);
359 if (sigaction(SIGINT, &old_sigint_action, NULL) < 0)
360 dev_err(smgr, "Failed to unregister signal handler\n");
363 secure_update_status(smgr, status);
365 log_time(time(NULL) - start, "Secure flash update ERROR");
367 secure_update_cancel(smgr);
369 log_time(time(NULL) - start, "Secure flash update OK");
371 set_rsu_status(smgr, IFPGA_RSU_IDLE, 0);
376 int fpga_stop_flash_update(struct ifpga_fme_hw *fme, int force)
378 struct ifpga_sec_mgr *smgr = NULL;
380 int retry = IFPGA_RSU_CANCEL_RETRY;
384 dev_err(fme, "Input parameter of %s is invalid\n", __func__);
387 smgr = (struct ifpga_sec_mgr *)fme->sec_mgr;
389 get_rsu_status(smgr, &status, NULL);
390 if (status != IFPGA_RSU_IDLE) {
391 dev_info(smgr, "Cancel secure flash update\n");
392 set_rsu_control(smgr, IFPGA_RSU_ABORT);
398 get_rsu_status(smgr, &status, NULL);
399 if (status == IFPGA_RSU_IDLE)
401 if (secure_update_cancel(smgr) == 0)
402 set_rsu_status(smgr, IFPGA_RSU_IDLE, 0);
404 } while (--retry > 0);
406 dev_err(smgr, "Failed to stop flash update\n");
414 int fpga_reload(struct ifpga_fme_hw *fme, int type, int page)
416 struct ifpga_sec_mgr *smgr = NULL;
419 dev_err(fme, "Input parameter of %s is invalid\n", __func__);
422 smgr = (struct ifpga_sec_mgr *)fme->sec_mgr;
424 if (!smgr || !smgr->ops || !smgr->ops->reload)
427 return smgr->ops->reload(smgr, type, page);