1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2018 Intel Corporation
5 #ifndef _OPAE_HW_API_H_
6 #define _OPAE_HW_API_H_
11 #include <sys/queue.h>
13 #include "opae_osdep.h"
14 #include "opae_intel_max10.h"
15 #include "opae_eth_group.h"
16 #include "ifpga_defines.h"
18 #ifndef PCI_MAX_RESOURCE
19 #define PCI_MAX_RESOURCE 6
24 enum opae_adapter_type {
29 /* OPAE Manager Data Structure */
30 struct opae_manager_ops;
31 struct opae_manager_networking_ops;
34 * opae_manager has pointer to its parent adapter, as it could be able to manage
35 * all components on this FPGA device (adapter). If not the case, don't set this
36 * adapter, which limit opae_manager ops to manager itself.
40 struct opae_adapter *adapter;
41 struct opae_manager_ops *ops;
42 struct opae_manager_networking_ops *network_ops;
43 struct opae_sensor_list *sensor_list;
47 /* FIXME: add more management ops, e.g power/thermal and etc */
48 struct opae_manager_ops {
49 int (*flash)(struct opae_manager *mgr, int id, const char *buffer,
50 u32 size, u64 *status);
51 int (*get_eth_group_region_info)(struct opae_manager *mgr,
52 struct opae_eth_group_region_info *info);
53 int (*get_sensor_value)(struct opae_manager *mgr,
54 struct opae_sensor_info *sensor,
56 int (*get_board_info)(struct opae_manager *mgr,
57 struct opae_board_info **info);
58 int (*update_flash)(struct opae_manager *mgr, const char *image,
60 int (*stop_flash_update)(struct opae_manager *mgr, int force);
61 int (*reload)(struct opae_manager *mgr, int type, int page);
64 /* networking management ops in FME */
65 struct opae_manager_networking_ops {
66 int (*read_mac_rom)(struct opae_manager *mgr, int offset, void *buf,
68 int (*write_mac_rom)(struct opae_manager *mgr, int offset, void *buf,
70 int (*get_eth_group_nums)(struct opae_manager *mgr);
71 int (*get_eth_group_info)(struct opae_manager *mgr,
72 u8 group_id, struct opae_eth_group_info *info);
73 int (*eth_group_reg_read)(struct opae_manager *mgr, u8 group_id,
74 u8 type, u8 index, u16 addr, u32 *data);
75 int (*eth_group_reg_write)(struct opae_manager *mgr, u8 group_id,
76 u8 type, u8 index, u16 addr, u32 data);
77 int (*get_retimer_info)(struct opae_manager *mgr,
78 struct opae_retimer_info *info);
79 int (*get_retimer_status)(struct opae_manager *mgr,
80 struct opae_retimer_status *status);
83 #define opae_mgr_for_each_sensor(mgr, sensor) \
84 TAILQ_FOREACH(sensor, mgr->sensor_list, node)
86 /* OPAE Manager APIs */
88 opae_manager_alloc(const char *name, struct opae_manager_ops *ops,
89 struct opae_manager_networking_ops *network_ops, void *data);
90 #define opae_manager_free(mgr) opae_free(mgr)
91 int opae_manager_flash(struct opae_manager *mgr, int acc_id, const char *buf,
92 u32 size, u64 *status);
93 int opae_manager_get_eth_group_region_info(struct opae_manager *mgr,
94 u8 group_id, struct opae_eth_group_region_info *info);
95 struct opae_sensor_info *opae_mgr_get_sensor_by_name(struct opae_manager *mgr,
97 struct opae_sensor_info *opae_mgr_get_sensor_by_id(struct opae_manager *mgr,
99 int opae_mgr_get_sensor_value_by_name(struct opae_manager *mgr,
100 const char *name, unsigned int *value);
101 int opae_mgr_get_sensor_value_by_id(struct opae_manager *mgr,
102 unsigned int id, unsigned int *value);
103 int opae_mgr_get_sensor_value(struct opae_manager *mgr,
104 struct opae_sensor_info *sensor,
105 unsigned int *value);
107 /* OPAE Bridge Data Structure */
108 struct opae_bridge_ops;
111 * opae_bridge only has pointer to its downstream accelerator.
116 struct opae_accelerator *acc;
117 struct opae_bridge_ops *ops;
121 struct opae_bridge_ops {
122 int (*reset)(struct opae_bridge *br);
125 /* OPAE Bridge APIs */
127 opae_bridge_alloc(const char *name, struct opae_bridge_ops *ops, void *data);
128 int opae_bridge_reset(struct opae_bridge *br);
129 #define opae_bridge_free(br) opae_free(br)
131 /* OPAE Acceleraotr Data Structure */
132 struct opae_accelerator_ops;
135 * opae_accelerator has pointer to its upstream bridge(port).
136 * In some cases, if we allow same user to do PR on its own accelerator, then
137 * set the manager pointer during the enumeration. But in other cases, the PR
138 * functions only could be done via manager in another module / thread / service
139 * / application for better protection.
141 struct opae_accelerator {
142 TAILQ_ENTRY(opae_accelerator) node;
145 struct opae_bridge *br;
146 struct opae_manager *mgr;
147 struct opae_accelerator_ops *ops;
151 struct opae_acc_info {
152 unsigned int num_regions;
153 unsigned int num_irqs;
156 struct opae_acc_region_info {
158 #define ACC_REGION_READ (1 << 0)
159 #define ACC_REGION_WRITE (1 << 1)
160 #define ACC_REGION_MMIO (1 << 2)
167 struct opae_accelerator_ops {
168 int (*read)(struct opae_accelerator *acc, unsigned int region_idx,
169 u64 offset, unsigned int byte, void *data);
170 int (*write)(struct opae_accelerator *acc, unsigned int region_idx,
171 u64 offset, unsigned int byte, void *data);
172 int (*get_info)(struct opae_accelerator *acc,
173 struct opae_acc_info *info);
174 int (*get_region_info)(struct opae_accelerator *acc,
175 struct opae_acc_region_info *info);
176 int (*set_irq)(struct opae_accelerator *acc,
177 u32 start, u32 count, s32 evtfds[]);
178 int (*get_uuid)(struct opae_accelerator *acc,
182 /* OPAE accelerator APIs */
183 struct opae_accelerator *
184 opae_accelerator_alloc(const char *name, struct opae_accelerator_ops *ops,
186 #define opae_accelerator_free(acc) opae_free(acc)
187 int opae_acc_get_info(struct opae_accelerator *acc, struct opae_acc_info *info);
188 int opae_acc_get_region_info(struct opae_accelerator *acc,
189 struct opae_acc_region_info *info);
190 int opae_acc_set_irq(struct opae_accelerator *acc,
191 u32 start, u32 count, s32 evtfds[]);
192 int opae_acc_get_uuid(struct opae_accelerator *acc,
195 static inline struct opae_bridge *
196 opae_acc_get_br(struct opae_accelerator *acc)
198 return acc ? acc->br : NULL;
201 static inline struct opae_manager *
202 opae_acc_get_mgr(struct opae_accelerator *acc)
204 return acc ? acc->mgr : NULL;
207 int opae_acc_reg_read(struct opae_accelerator *acc, unsigned int region_idx,
208 u64 offset, unsigned int byte, void *data);
209 int opae_acc_reg_write(struct opae_accelerator *acc, unsigned int region_idx,
210 u64 offset, unsigned int byte, void *data);
212 #define opae_acc_reg_read64(acc, region, offset, data) \
213 opae_acc_reg_read(acc, region, offset, 8, data)
214 #define opae_acc_reg_write64(acc, region, offset, data) \
215 opae_acc_reg_write(acc, region, offset, 8, data)
216 #define opae_acc_reg_read32(acc, region, offset, data) \
217 opae_acc_reg_read(acc, region, offset, 4, data)
218 #define opae_acc_reg_write32(acc, region, offset, data) \
219 opae_acc_reg_write(acc, region, offset, 4, data)
220 #define opae_acc_reg_read16(acc, region, offset, data) \
221 opae_acc_reg_read(acc, region, offset, 2, data)
222 #define opae_acc_reg_write16(acc, region, offset, data) \
223 opae_acc_reg_write(acc, region, offset, 2, data)
224 #define opae_acc_reg_read8(acc, region, offset, data) \
225 opae_acc_reg_read(acc, region, offset, 1, data)
226 #define opae_acc_reg_write8(acc, region, offset, data) \
227 opae_acc_reg_write(acc, region, offset, 1, data)
229 /*for data stream read/write*/
230 int opae_acc_data_read(struct opae_accelerator *acc, unsigned int flags,
231 u64 offset, unsigned int byte, void *data);
232 int opae_acc_data_write(struct opae_accelerator *acc, unsigned int flags,
233 u64 offset, unsigned int byte, void *data);
235 /* OPAE Adapter Data Structure */
236 struct opae_adapter_data {
237 enum opae_adapter_type type;
240 struct opae_reg_region {
246 struct opae_adapter_data_pci {
247 enum opae_adapter_type type;
250 u16 bus; /*Device bus for PCI */
251 u16 devid; /* Device ID */
252 u16 function; /* Device function */
253 struct opae_reg_region region[PCI_MAX_RESOURCE];
254 int vfio_dev_fd; /* VFIO device file descriptor */
257 /* FIXME: OPAE_FPGA_NET type */
258 struct opae_adapter_data_net {
259 enum opae_adapter_type type;
262 struct opae_adapter_ops {
263 int (*enumerate)(struct opae_adapter *adapter);
264 void (*destroy)(struct opae_adapter *adapter);
267 TAILQ_HEAD(opae_accelerator_list, opae_accelerator);
269 #define opae_adapter_for_each_acc(adatper, acc) \
270 TAILQ_FOREACH(acc, &adapter->acc_list, node)
272 #define SHM_PREFIX "/IFPGA:"
273 #define SHM_BLK_SIZE 0x2000
277 u8 byte[SHM_BLK_SIZE];
279 pthread_mutex_t spi_mutex;
280 pthread_mutex_t i2c_mutex;
281 u32 ref_cnt; /* reference count of shared memory */
282 u32 dtb_size; /* actual length of DTB data in byte */
283 u32 rsu_ctrl; /* used to control rsu */
284 u32 rsu_stat; /* used to report status for rsu */
287 u8 dtb[SHM_BLK_SIZE]; /* DTB data */
291 int id; /* shared memory id returned by shm_open */
292 u32 size; /* size of shared memory in byte */
293 void *ptr; /* start address of shared memory */
296 struct opae_adapter {
298 struct opae_manager *mgr;
299 struct opae_accelerator_list acc_list;
300 struct opae_adapter_ops *ops;
302 pthread_mutex_t *lock; /* multi-process mutex for IFPGA */
303 opae_share_memory shm;
306 /* OPAE Adapter APIs */
307 void *opae_adapter_data_alloc(enum opae_adapter_type type);
308 #define opae_adapter_data_free(data) opae_free(data)
310 int opae_adapter_init(struct opae_adapter *adapter,
311 const char *name, void *data);
312 #define opae_adapter_free(adapter) opae_free(adapter)
313 int opae_adapter_lock(struct opae_adapter *adapter, int timeout);
314 int opae_adapter_unlock(struct opae_adapter *adapter);
315 int opae_adapter_enumerate(struct opae_adapter *adapter);
316 void opae_adapter_destroy(struct opae_adapter *adapter);
317 static inline struct opae_manager *
318 opae_adapter_get_mgr(struct opae_adapter *adapter)
320 return adapter ? adapter->mgr : NULL;
323 struct opae_accelerator *
324 opae_adapter_get_acc(struct opae_adapter *adapter, int acc_id);
326 static inline void opae_adapter_add_acc(struct opae_adapter *adapter,
327 struct opae_accelerator *acc)
329 TAILQ_INSERT_TAIL(&adapter->acc_list, acc, node);
332 static inline void opae_adapter_remove_acc(struct opae_adapter *adapter,
333 struct opae_accelerator *acc)
335 TAILQ_REMOVE(&adapter->acc_list, acc, node);
338 /* OPAE vBNG network datastruct */
339 #define OPAE_ETHER_ADDR_LEN 6
341 struct opae_ether_addr {
342 unsigned char addr_bytes[OPAE_ETHER_ADDR_LEN];
345 /* OPAE vBNG network API*/
346 int opae_manager_read_mac_rom(struct opae_manager *mgr, int port,
347 struct opae_ether_addr *addr);
348 int opae_manager_write_mac_rom(struct opae_manager *mgr, int port,
349 struct opae_ether_addr *addr);
350 int opae_manager_get_retimer_info(struct opae_manager *mgr,
351 struct opae_retimer_info *info);
352 int opae_manager_get_retimer_status(struct opae_manager *mgr,
353 struct opae_retimer_status *status);
354 int opae_manager_get_eth_group_nums(struct opae_manager *mgr);
355 int opae_manager_get_eth_group_info(struct opae_manager *mgr,
356 u8 group_id, struct opae_eth_group_info *info);
357 int opae_manager_eth_group_write_reg(struct opae_manager *mgr, u8 group_id,
358 u8 type, u8 index, u16 addr, u32 data);
359 int opae_manager_eth_group_read_reg(struct opae_manager *mgr, u8 group_id,
360 u8 type, u8 index, u16 addr, u32 *data);
361 int opae_mgr_get_board_info(struct opae_manager *mgr,
362 struct opae_board_info **info);
363 int opae_mgr_update_flash(struct opae_manager *mgr, const char *image,
365 int opae_mgr_stop_flash_update(struct opae_manager *mgr, int force);
366 int opae_mgr_reload(struct opae_manager *mgr, int type, int page);
367 #endif /* _OPAE_HW_API_H_*/