1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2019 Intel Corporation
5 #include "opae_intel_max10.h"
8 int max10_reg_read(struct intel_max10_device *dev,
9 unsigned int reg, unsigned int *val)
14 dev_debug(dev, "%s: bus:0x%x, reg:0x%x\n", __func__, dev->bus, reg);
16 return spi_transaction_read(dev->spi_tran_dev,
17 reg, 4, (unsigned char *)val);
20 int max10_reg_write(struct intel_max10_device *dev,
21 unsigned int reg, unsigned int val)
23 unsigned int tmp = val;
28 dev_debug(dev, "%s: bus:0x%x, reg:0x%x, val:0x%x\n", __func__,
31 return spi_transaction_write(dev->spi_tran_dev,
32 reg, 4, (unsigned char *)&tmp);
35 int max10_sys_read(struct intel_max10_device *dev,
36 unsigned int offset, unsigned int *val)
42 return max10_reg_read(dev, dev->base + offset, val);
45 int max10_sys_write(struct intel_max10_device *dev,
46 unsigned int offset, unsigned int val)
51 return max10_reg_write(dev, dev->base + offset, val);
54 static struct max10_compatible_id max10_id_table[] = {
55 {.compatible = MAX10_PAC,},
56 {.compatible = MAX10_PAC_N3000,},
57 {.compatible = MAX10_PAC_END,}
60 static struct max10_compatible_id *max10_match_compatible(const char *fdt_root)
62 struct max10_compatible_id *id = max10_id_table;
64 for (; strcmp(id->compatible, MAX10_PAC_END); id++) {
65 if (fdt_node_check_compatible(fdt_root, 0, id->compatible))
75 is_max10_pac_n3000(struct intel_max10_device *max10)
77 return max10->id && !strcmp(max10->id->compatible,
81 static void max10_check_capability(struct intel_max10_device *max10)
86 if (is_max10_pac_n3000(max10)) {
87 max10->flags |= MAX10_FLAGS_NO_I2C2 |
88 MAX10_FLAGS_NO_BMCIMG_FLASH;
89 dev_info(max10, "found %s card\n", max10->id->compatible);
91 max10->flags |= MAX10_FLAGS_MAC_CACHE;
94 static int altera_nor_flash_read(struct intel_max10_device *dev,
95 u32 offset, void *buffer, u32 len)
99 unsigned int *buf = (unsigned int *)buffer;
103 if (!dev || !buffer || len <= 0)
108 for (i = 0; i < word_len; i++) {
109 ret = max10_reg_read(dev, offset + i*4,
120 static int enable_nor_flash(struct intel_max10_device *dev, bool on)
122 unsigned int val = 0;
125 ret = max10_sys_read(dev, RSU_REG, &val);
127 dev_err(NULL "enabling flash error\n");
136 return max10_sys_write(dev, RSU_REG, val);
139 static int init_max10_device_table(struct intel_max10_device *max10)
141 struct max10_compatible_id *id;
142 struct fdt_header hdr;
143 char *fdt_root = NULL;
145 u32 dt_size, dt_addr, val;
148 ret = max10_sys_read(max10, DT_AVAIL_REG, &val);
150 dev_err(max10 "cannot read DT_AVAIL_REG\n");
154 if (!(val & DT_AVAIL)) {
155 dev_err(max10 "DT not available\n");
159 ret = max10_sys_read(max10, DT_BASE_ADDR_REG, &dt_addr);
161 dev_info(max10 "cannot get base addr of device table\n");
165 ret = enable_nor_flash(max10, true);
167 dev_err(max10 "fail to enable flash\n");
171 ret = altera_nor_flash_read(max10, dt_addr, &hdr, sizeof(hdr));
173 dev_err(max10 "read fdt header fail\n");
177 ret = fdt_check_header(&hdr);
179 dev_err(max10 "check fdt header fail\n");
183 dt_size = fdt_totalsize(&hdr);
184 if (dt_size > DFT_MAX_SIZE) {
185 dev_err(max10 "invalid device table size\n");
190 fdt_root = opae_malloc(dt_size);
196 ret = altera_nor_flash_read(max10, dt_addr, fdt_root, dt_size);
198 dev_err(max10 "cannot read device table\n");
202 id = max10_match_compatible(fdt_root);
204 dev_err(max10 "max10 compatible not found\n");
209 max10->flags |= MAX10_FLAGS_DEVICE_TABLE;
212 max10->fdt_root = fdt_root;
215 ret = enable_nor_flash(max10, false);
223 static u64 fdt_get_number(const fdt32_t *cell, int size)
228 r = (r << 32) | fdt32_to_cpu(*cell++);
233 static int fdt_get_reg(const void *fdt, int node, unsigned int idx,
234 u64 *start, u64 *size)
236 const fdt32_t *prop, *end;
237 int na = 0, ns = 0, len = 0, parent;
239 parent = fdt_parent_offset(fdt, node);
243 prop = fdt_getprop(fdt, parent, "#address-cells", NULL);
244 na = prop ? fdt32_to_cpu(*prop) : 2;
246 prop = fdt_getprop(fdt, parent, "#size-cells", NULL);
247 ns = prop ? fdt32_to_cpu(*prop) : 2;
249 prop = fdt_getprop(fdt, node, "reg", &len);
251 return -FDT_ERR_NOTFOUND;
253 end = prop + len/sizeof(*prop);
254 prop = prop + (na + ns) * idx;
256 if (prop + na + ns > end)
257 return -FDT_ERR_NOTFOUND;
259 *start = fdt_get_number(prop, na);
260 *size = fdt_get_number(prop + na, ns);
265 static int __fdt_stringlist_search(const void *fdt, int offset,
266 const char *prop, const char *string)
268 int length, len, index = 0;
269 const char *list, *end;
271 list = fdt_getprop(fdt, offset, prop, &length);
275 len = strlen(string) + 1;
279 length = strnlen(list, end - list) + 1;
281 if (list + length > end)
282 return -FDT_ERR_BADVALUE;
284 if (length == len && memcmp(list, string, length) == 0)
291 return -FDT_ERR_NOTFOUND;
294 static int fdt_get_named_reg(const void *fdt, int node, const char *name,
295 u64 *start, u64 *size)
299 idx = __fdt_stringlist_search(fdt, node, "reg-names", name);
303 return fdt_get_reg(fdt, node, idx, start, size);
306 static void max10_sensor_uinit(struct intel_max10_device *dev)
308 struct opae_sensor_info *info;
310 TAILQ_FOREACH(info, &dev->opae_sensor_list, node) {
311 TAILQ_REMOVE(&dev->opae_sensor_list, info, node);
316 static bool sensor_reg_valid(struct sensor_reg *reg)
321 static int max10_add_sensor(struct intel_max10_device *dev,
322 struct raw_sensor_info *info, struct opae_sensor_info *sensor)
328 if (!info || !sensor)
331 sensor->id = info->id;
332 sensor->name = info->name;
333 sensor->type = info->type;
334 sensor->multiplier = info->multiplier;
336 for (i = SENSOR_REG_VALUE; i < SENSOR_REG_MAX; i++) {
337 if (!sensor_reg_valid(&info->regs[i]))
340 ret = max10_sys_read(dev, info->regs[i].regoff, &val);
344 if (val == 0xdeadbeef) {
345 dev_debug(dev, "%s: sensor:%s invalid 0x%x at:%d\n",
346 __func__, sensor->name, val, i);
350 val *= info->multiplier;
353 case SENSOR_REG_VALUE:
354 sensor->value_reg = info->regs[i].regoff;
355 sensor->flags |= OPAE_SENSOR_VALID;
357 case SENSOR_REG_HIGH_WARN:
358 sensor->high_warn = val;
359 sensor->flags |= OPAE_SENSOR_HIGH_WARN_VALID;
361 case SENSOR_REG_HIGH_FATAL:
362 sensor->high_fatal = val;
363 sensor->flags |= OPAE_SENSOR_HIGH_FATAL_VALID;
365 case SENSOR_REG_LOW_WARN:
366 sensor->low_warn = val;
367 sensor->flags |= OPAE_SENSOR_LOW_WARN_VALID;
369 case SENSOR_REG_LOW_FATAL:
370 sensor->low_fatal = val;
371 sensor->flags |= OPAE_SENSOR_LOW_FATAL_VALID;
373 case SENSOR_REG_HYSTERESIS:
374 sensor->hysteresis = val;
375 sensor->flags |= OPAE_SENSOR_HYSTERESIS_VALID;
384 max10_sensor_init(struct intel_max10_device *dev, int parent)
386 int i, ret = 0, offset = 0;
390 struct raw_sensor_info *raw;
391 struct opae_sensor_info *sensor;
392 char *fdt_root = dev->fdt_root;
395 dev_debug(dev, "skip sensor init as not find Device Tree\n");
399 fdt_for_each_subnode(offset, fdt_root, parent) {
400 ptr = fdt_get_name(fdt_root, offset, NULL);
402 dev_err(dev, "failed to fdt get name\n");
406 if (!strstr(ptr, "sensor")) {
407 dev_debug(dev, "%s is not a sensor node\n", ptr);
411 dev_debug(dev, "found sensor node %s\n", ptr);
413 raw = (struct raw_sensor_info *)opae_zmalloc(sizeof(*raw));
419 raw->name = fdt_getprop(fdt_root, offset, "sensor_name", NULL);
425 raw->type = fdt_getprop(fdt_root, offset, "type", NULL);
431 for (i = SENSOR_REG_VALUE; i < SENSOR_REG_MAX; i++) {
432 ret = fdt_get_named_reg(fdt_root, offset,
433 sensor_reg_name[i], &start,
436 dev_debug(dev, "no found %d: sensor node %s, %s\n",
437 ret, ptr, sensor_reg_name[i]);
438 if (i == SENSOR_REG_VALUE) {
446 /* This is a hack to compatible with non-secure
447 * solution. If sensors are included in root node,
448 * then it's non-secure dtb, which use absolute addr
449 * of non-secure solution.
452 raw->regs[i].regoff = start;
454 raw->regs[i].regoff = start -
456 raw->regs[i].size = size;
459 num = fdt_getprop(fdt_root, offset, "id", NULL);
465 raw->id = fdt32_to_cpu(*num);
466 num = fdt_getprop(fdt_root, offset, "multiplier", NULL);
467 raw->multiplier = num ? fdt32_to_cpu(*num) : 1;
469 dev_debug(dev, "found sensor from DTB: %s: %s: %u: %u\n",
470 raw->name, raw->type,
471 raw->id, raw->multiplier);
473 for (i = SENSOR_REG_VALUE; i < SENSOR_REG_MAX; i++)
474 dev_debug(dev, "sensor reg[%d]: %x: %zu\n",
475 i, raw->regs[i].regoff,
478 sensor = opae_zmalloc(sizeof(*sensor));
484 if (max10_add_sensor(dev, raw, sensor)) {
490 if (sensor->flags & OPAE_SENSOR_VALID) {
491 TAILQ_INSERT_TAIL(&dev->opae_sensor_list, sensor, node);
492 dev_info(dev, "found valid sensor: %s\n", sensor->name);
504 max10_sensor_uinit(dev);
508 static int check_max10_version(struct intel_max10_device *dev)
512 if (!max10_reg_read(dev, MAX10_SEC_BASE_ADDR + MAX10_BUILD_VER,
514 if (v != 0xffffffff) {
515 dev_info(dev, "secure MAX10 detected\n");
516 dev->base = MAX10_SEC_BASE_ADDR;
517 dev->flags |= MAX10_FLAGS_SECURE;
519 dev_info(dev, "non-secure MAX10 detected\n");
520 dev->base = MAX10_BASE_ADDR;
529 max10_secure_hw_init(struct intel_max10_device *dev)
531 int offset, sysmgr_offset = 0;
534 fdt_root = dev->fdt_root;
536 dev_debug(dev, "skip init as not find Device Tree\n");
540 fdt_for_each_subnode(offset, fdt_root, 0) {
541 if (!fdt_node_check_compatible(fdt_root, offset,
542 "intel-max10,system-manager")) {
543 sysmgr_offset = offset;
548 max10_check_capability(dev);
550 max10_sensor_init(dev, sysmgr_offset);
556 max10_non_secure_hw_init(struct intel_max10_device *dev)
558 max10_check_capability(dev);
560 max10_sensor_init(dev, 0);
565 struct intel_max10_device *
566 intel_max10_device_probe(struct altera_spi_device *spi,
569 struct intel_max10_device *dev;
573 dev = opae_malloc(sizeof(*dev));
577 TAILQ_INIT(&dev->opae_sensor_list);
579 dev->spi_master = spi;
581 dev->spi_tran_dev = spi_transaction_init(spi, chipselect);
582 if (!dev->spi_tran_dev) {
583 dev_err(dev, "%s spi tran init fail\n", __func__);
587 /* check the max10 version */
588 ret = check_max10_version(dev);
590 dev_err(dev, "Failed to find max10 hardware!\n");
594 /* load the MAX10 device table */
595 ret = init_max10_device_table(dev);
597 dev_err(dev, "Init max10 device table fail\n");
601 /* init max10 devices, like sensor*/
602 if (dev->flags & MAX10_FLAGS_SECURE)
603 ret = max10_secure_hw_init(dev);
605 ret = max10_non_secure_hw_init(dev);
607 dev_err(dev, "Failed to init max10 hardware!\n");
611 /* read FPGA loading information */
612 ret = max10_sys_read(dev, FPGA_PAGE_INFO, &val);
614 dev_err(dev, "fail to get FPGA loading info\n");
615 goto release_max10_hw;
617 dev_info(dev, "FPGA loaded from %s Image\n", val ? "User" : "Factory");
622 max10_sensor_uinit(dev);
625 opae_free(dev->fdt_root);
626 if (dev->spi_tran_dev)
627 spi_transaction_remove(dev->spi_tran_dev);
634 int intel_max10_device_remove(struct intel_max10_device *dev)
639 max10_sensor_uinit(dev);
641 if (dev->spi_tran_dev)
642 spi_transaction_remove(dev->spi_tran_dev);
645 opae_free(dev->fdt_root);