1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2019 Intel Corporation
5 #include "opae_intel_max10.h"
8 int max10_reg_read(struct intel_max10_device *dev,
9 unsigned int reg, unsigned int *val)
14 dev_debug(dev, "%s: bus:0x%x, reg:0x%x\n", __func__, dev->bus, reg);
16 return spi_transaction_read(dev->spi_tran_dev,
17 reg, 4, (unsigned char *)val);
20 int max10_reg_write(struct intel_max10_device *dev,
21 unsigned int reg, unsigned int val)
23 unsigned int tmp = val;
28 dev_debug(dev, "%s: bus:0x%x, reg:0x%x, val:0x%x\n", __func__,
31 return spi_transaction_write(dev->spi_tran_dev,
32 reg, 4, (unsigned char *)&tmp);
35 int max10_sys_read(struct intel_max10_device *dev,
36 unsigned int offset, unsigned int *val)
42 return max10_reg_read(dev, dev->base + offset, val);
45 int max10_sys_write(struct intel_max10_device *dev,
46 unsigned int offset, unsigned int val)
51 return max10_reg_write(dev, dev->base + offset, val);
54 int max10_sys_update_bits(struct intel_max10_device *dev, unsigned int offset,
55 unsigned int msk, unsigned int val)
58 unsigned int temp = 0;
60 ret = max10_sys_read(dev, offset, &temp);
67 return max10_sys_write(dev, offset, temp);
70 static struct max10_compatible_id max10_id_table[] = {
71 {.compatible = MAX10_PAC,},
72 {.compatible = MAX10_PAC_N3000,},
73 {.compatible = MAX10_PAC_END,}
76 static struct max10_compatible_id *max10_match_compatible(const char *fdt_root)
78 struct max10_compatible_id *id = max10_id_table;
80 for (; strcmp(id->compatible, MAX10_PAC_END); id++) {
81 if (fdt_node_check_compatible(fdt_root, 0, id->compatible))
91 is_max10_pac_n3000(struct intel_max10_device *max10)
93 return max10->id && !strcmp(max10->id->compatible,
97 static void max10_check_capability(struct intel_max10_device *max10)
102 if (is_max10_pac_n3000(max10)) {
103 max10->flags |= MAX10_FLAGS_NO_I2C2 |
104 MAX10_FLAGS_NO_BMCIMG_FLASH;
105 dev_info(max10, "found %s card\n", max10->id->compatible);
107 max10->flags |= MAX10_FLAGS_MAC_CACHE;
110 static int altera_nor_flash_read(struct intel_max10_device *dev,
111 u32 offset, void *buffer, u32 len)
115 unsigned int *buf = (unsigned int *)buffer;
119 if (!dev || !buffer || len <= 0)
124 for (i = 0; i < word_len; i++) {
125 ret = max10_reg_read(dev, offset + i*4,
136 static int enable_nor_flash(struct intel_max10_device *dev, bool on)
138 unsigned int val = 0;
141 ret = max10_sys_read(dev, RSU_REG, &val);
143 dev_err(NULL "enabling flash error\n");
152 return max10_sys_write(dev, RSU_REG, val);
155 static int init_max10_device_table(struct intel_max10_device *max10)
157 struct altera_spi_device *spi = NULL;
158 struct max10_compatible_id *id;
159 struct fdt_header hdr;
160 char *fdt_root = NULL;
162 u32 dt_size, dt_addr, val;
165 spi = (struct altera_spi_device *)max10->spi_master;
167 dev_err(max10, "spi master is not set\n");
171 dtb_magic = *(u32 *)spi->dtb;
173 if (dtb_magic != 0xEDFE0DD0) {
174 dev_info(max10, "read DTB from NOR flash\n");
175 ret = max10_sys_read(max10, DT_AVAIL_REG, &val);
177 dev_err(max10 "cannot read DT_AVAIL_REG\n");
181 if (!(val & DT_AVAIL)) {
182 dev_err(max10 "DT not available\n");
186 ret = max10_sys_read(max10, DT_BASE_ADDR_REG, &dt_addr);
188 dev_info(max10 "cannot get base addr of device table\n");
192 ret = enable_nor_flash(max10, true);
194 dev_err(max10 "fail to enable flash\n");
198 ret = altera_nor_flash_read(max10, dt_addr, &hdr, sizeof(hdr));
200 dev_err(max10 "read fdt header fail\n");
201 goto disable_nor_flash;
204 ret = fdt_check_header(&hdr);
206 dev_err(max10 "check fdt header fail\n");
207 goto disable_nor_flash;
210 dt_size = fdt_totalsize(&hdr);
211 if (dt_size > DFT_MAX_SIZE) {
212 dev_err(max10 "invalid device table size\n");
214 goto disable_nor_flash;
217 fdt_root = opae_malloc(dt_size);
220 goto disable_nor_flash;
223 ret = altera_nor_flash_read(max10, dt_addr, fdt_root, dt_size);
227 dev_err(max10 "cannot read device table\n");
228 goto disable_nor_flash;
232 if (*spi->dtb_sz_ptr < dt_size) {
234 "share memory for dtb is smaller than required %u\n",
237 *spi->dtb_sz_ptr = dt_size;
239 /* store dtb data into share memory */
240 memcpy(spi->dtb, fdt_root, *spi->dtb_sz_ptr);
244 enable_nor_flash(max10, false);
246 if (*spi->dtb_sz_ptr > 0) {
247 dev_info(max10, "read DTB from shared memory\n");
248 fdt_root = opae_malloc(*spi->dtb_sz_ptr);
250 memcpy(fdt_root, spi->dtb, *spi->dtb_sz_ptr);
257 id = max10_match_compatible(fdt_root);
259 dev_err(max10 "max10 compatible not found\n");
262 max10->flags |= MAX10_FLAGS_DEVICE_TABLE;
264 max10->fdt_root = fdt_root;
271 static u64 fdt_get_number(const fdt32_t *cell, int size)
276 r = (r << 32) | fdt32_to_cpu(*cell++);
281 static int fdt_get_reg(const void *fdt, int node, unsigned int idx,
282 u64 *start, u64 *size)
284 const fdt32_t *prop, *end;
285 int na = 0, ns = 0, len = 0, parent;
287 parent = fdt_parent_offset(fdt, node);
291 prop = fdt_getprop(fdt, parent, "#address-cells", NULL);
292 na = prop ? fdt32_to_cpu(*prop) : 2;
294 prop = fdt_getprop(fdt, parent, "#size-cells", NULL);
295 ns = prop ? fdt32_to_cpu(*prop) : 2;
297 prop = fdt_getprop(fdt, node, "reg", &len);
299 return -FDT_ERR_NOTFOUND;
301 end = prop + len/sizeof(*prop);
302 prop = prop + (na + ns) * idx;
304 if (prop + na + ns > end)
305 return -FDT_ERR_NOTFOUND;
307 *start = fdt_get_number(prop, na);
308 *size = fdt_get_number(prop + na, ns);
313 static int __fdt_stringlist_search(const void *fdt, int offset,
314 const char *prop, const char *string)
316 int length, len, index = 0;
317 const char *list, *end;
319 list = fdt_getprop(fdt, offset, prop, &length);
323 len = strlen(string) + 1;
327 length = strnlen(list, end - list) + 1;
329 if (list + length > end)
330 return -FDT_ERR_BADVALUE;
332 if (length == len && memcmp(list, string, length) == 0)
339 return -FDT_ERR_NOTFOUND;
342 static int fdt_get_named_reg(const void *fdt, int node, const char *name,
343 u64 *start, u64 *size)
347 idx = __fdt_stringlist_search(fdt, node, "reg-names", name);
351 return fdt_get_reg(fdt, node, idx, start, size);
354 static void max10_sensor_uinit(struct intel_max10_device *dev)
356 struct opae_sensor_info *info;
358 TAILQ_FOREACH(info, &dev->opae_sensor_list, node) {
359 TAILQ_REMOVE(&dev->opae_sensor_list, info, node);
364 static bool sensor_reg_valid(struct sensor_reg *reg)
369 static int max10_add_sensor(struct intel_max10_device *dev,
370 struct raw_sensor_info *info, struct opae_sensor_info *sensor)
376 if (!info || !sensor)
379 sensor->id = info->id;
380 sensor->name = info->name;
381 sensor->type = info->type;
382 sensor->multiplier = info->multiplier;
384 for (i = SENSOR_REG_VALUE; i < SENSOR_REG_MAX; i++) {
385 if (!sensor_reg_valid(&info->regs[i]))
388 ret = max10_sys_read(dev, info->regs[i].regoff, &val);
392 if (val == 0xdeadbeef) {
393 dev_debug(dev, "%s: sensor:%s invalid 0x%x at:%d\n",
394 __func__, sensor->name, val, i);
398 val *= info->multiplier;
401 case SENSOR_REG_VALUE:
402 sensor->value_reg = info->regs[i].regoff;
403 sensor->flags |= OPAE_SENSOR_VALID;
405 case SENSOR_REG_HIGH_WARN:
406 sensor->high_warn = val;
407 sensor->flags |= OPAE_SENSOR_HIGH_WARN_VALID;
409 case SENSOR_REG_HIGH_FATAL:
410 sensor->high_fatal = val;
411 sensor->flags |= OPAE_SENSOR_HIGH_FATAL_VALID;
413 case SENSOR_REG_LOW_WARN:
414 sensor->low_warn = val;
415 sensor->flags |= OPAE_SENSOR_LOW_WARN_VALID;
417 case SENSOR_REG_LOW_FATAL:
418 sensor->low_fatal = val;
419 sensor->flags |= OPAE_SENSOR_LOW_FATAL_VALID;
421 case SENSOR_REG_HYSTERESIS:
422 sensor->hysteresis = val;
423 sensor->flags |= OPAE_SENSOR_HYSTERESIS_VALID;
432 max10_sensor_init(struct intel_max10_device *dev, int parent)
434 int i, ret = 0, offset = 0;
438 struct raw_sensor_info *raw;
439 struct opae_sensor_info *sensor;
440 char *fdt_root = dev->fdt_root;
443 dev_debug(dev, "skip sensor init as not find Device Tree\n");
447 fdt_for_each_subnode(offset, fdt_root, parent) {
448 ptr = fdt_get_name(fdt_root, offset, NULL);
450 dev_err(dev, "failed to fdt get name\n");
454 if (!strstr(ptr, "sensor")) {
455 dev_debug(dev, "%s is not a sensor node\n", ptr);
459 dev_debug(dev, "found sensor node %s\n", ptr);
461 raw = (struct raw_sensor_info *)opae_zmalloc(sizeof(*raw));
467 raw->name = fdt_getprop(fdt_root, offset, "sensor_name", NULL);
473 raw->type = fdt_getprop(fdt_root, offset, "type", NULL);
479 for (i = SENSOR_REG_VALUE; i < SENSOR_REG_MAX; i++) {
480 ret = fdt_get_named_reg(fdt_root, offset,
481 sensor_reg_name[i], &start,
484 dev_debug(dev, "no found %d: sensor node %s, %s\n",
485 ret, ptr, sensor_reg_name[i]);
486 if (i == SENSOR_REG_VALUE) {
494 /* This is a hack to compatible with non-secure
495 * solution. If sensors are included in root node,
496 * then it's non-secure dtb, which use absolute addr
497 * of non-secure solution.
500 raw->regs[i].regoff = start;
502 raw->regs[i].regoff = start -
504 raw->regs[i].size = size;
507 num = fdt_getprop(fdt_root, offset, "id", NULL);
513 raw->id = fdt32_to_cpu(*num);
514 num = fdt_getprop(fdt_root, offset, "multiplier", NULL);
515 raw->multiplier = num ? fdt32_to_cpu(*num) : 1;
517 dev_debug(dev, "found sensor from DTB: %s: %s: %u: %u\n",
518 raw->name, raw->type,
519 raw->id, raw->multiplier);
521 for (i = SENSOR_REG_VALUE; i < SENSOR_REG_MAX; i++)
522 dev_debug(dev, "sensor reg[%d]: %x: %zu\n",
523 i, raw->regs[i].regoff,
526 sensor = opae_zmalloc(sizeof(*sensor));
532 if (max10_add_sensor(dev, raw, sensor)) {
538 if (sensor->flags & OPAE_SENSOR_VALID) {
539 TAILQ_INSERT_TAIL(&dev->opae_sensor_list, sensor, node);
540 dev_info(dev, "found valid sensor: %s\n", sensor->name);
552 max10_sensor_uinit(dev);
556 static int check_max10_version(struct intel_max10_device *dev)
560 if (!max10_reg_read(dev, MAX10_SEC_BASE_ADDR + MAX10_BUILD_VER,
562 if (v != 0xffffffff) {
563 dev_info(dev, "secure MAX10 detected\n");
564 dev->base = MAX10_SEC_BASE_ADDR;
565 dev->flags |= MAX10_FLAGS_SECURE;
567 dev_info(dev, "non-secure MAX10 detected\n");
568 dev->base = MAX10_BASE_ADDR;
576 static int max10_staging_area_init(struct intel_max10_device *dev)
578 char *fdt_root = dev->fdt_root;
584 "skip staging area init as not find Device Tree\n");
588 dev->staging_area_size = 0;
590 fdt_for_each_subnode(offset, fdt_root, 0) {
591 if (fdt_node_check_compatible(fdt_root, offset,
592 "ifpga-sec-mgr,staging-area"))
595 ret = fdt_get_reg(fdt_root, offset, 0, &start, &size);
599 if ((start & 0x3) || (start > MAX_STAGING_AREA_BASE) ||
600 (size > MAX_STAGING_AREA_SIZE))
603 dev->staging_area_base = start;
604 dev->staging_area_size = size;
613 max10_secure_hw_init(struct intel_max10_device *dev)
615 int offset, sysmgr_offset = 0;
618 fdt_root = dev->fdt_root;
620 dev_debug(dev, "skip init as not find Device Tree\n");
624 fdt_for_each_subnode(offset, fdt_root, 0) {
625 if (!fdt_node_check_compatible(fdt_root, offset,
626 "intel-max10,system-manager")) {
627 sysmgr_offset = offset;
632 max10_check_capability(dev);
634 max10_sensor_init(dev, sysmgr_offset);
636 max10_staging_area_init(dev);
642 max10_non_secure_hw_init(struct intel_max10_device *dev)
644 max10_check_capability(dev);
646 max10_sensor_init(dev, 0);
651 struct intel_max10_device *
652 intel_max10_device_probe(struct altera_spi_device *spi,
655 struct intel_max10_device *dev;
659 dev = opae_malloc(sizeof(*dev));
663 TAILQ_INIT(&dev->opae_sensor_list);
665 dev->spi_master = spi;
667 dev->spi_tran_dev = spi_transaction_init(spi, chipselect);
668 if (!dev->spi_tran_dev) {
669 dev_err(dev, "%s spi tran init fail\n", __func__);
673 /* check the max10 version */
674 ret = check_max10_version(dev);
676 dev_err(dev, "Failed to find max10 hardware!\n");
680 /* load the MAX10 device table */
681 ret = init_max10_device_table(dev);
683 dev_err(dev, "Init max10 device table fail\n");
687 /* init max10 devices, like sensor*/
688 if (dev->flags & MAX10_FLAGS_SECURE)
689 ret = max10_secure_hw_init(dev);
691 ret = max10_non_secure_hw_init(dev);
693 dev_err(dev, "Failed to init max10 hardware!\n");
697 /* read FPGA loading information */
698 ret = max10_sys_read(dev, FPGA_PAGE_INFO, &val);
700 dev_err(dev, "fail to get FPGA loading info\n");
701 goto release_max10_hw;
703 dev_info(dev, "FPGA loaded from %s Image\n", val ? "User" : "Factory");
708 max10_sensor_uinit(dev);
711 opae_free(dev->fdt_root);
712 if (dev->spi_tran_dev)
713 spi_transaction_remove(dev->spi_tran_dev);
720 int intel_max10_device_remove(struct intel_max10_device *dev)
725 max10_sensor_uinit(dev);
727 if (dev->spi_tran_dev)
728 spi_transaction_remove(dev->spi_tran_dev);
731 opae_free(dev->fdt_root);