compress/qat: enable compression on GEN3
[dpdk.git] / drivers / raw / ifpga / ifpga_rawdev.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2018 Intel Corporation
3  */
4
5 #ifndef _IFPGA_RAWDEV_H_
6 #define _IFPGA_RAWDEV_H_
7
8 extern int ifpga_rawdev_logtype;
9
10 #define IFPGA_RAWDEV_NAME_FMT "IFPGA:%02x:%02x.%x"
11
12 #define IFPGA_RAWDEV_PMD_LOG(level, fmt, args...) \
13         rte_log(RTE_LOG_ ## level, ifpga_rawdev_logtype, "%s(): " fmt "\n", \
14                                 __func__, ##args)
15
16 #define IFPGA_RAWDEV_PMD_FUNC_TRACE() IFPGA_RAWDEV_PMD_LOG(DEBUG, ">>")
17
18 #define IFPGA_RAWDEV_PMD_DEBUG(fmt, args...) \
19         IFPGA_RAWDEV_PMD_LOG(DEBUG, fmt, ## args)
20 #define IFPGA_RAWDEV_PMD_INFO(fmt, args...) \
21         IFPGA_RAWDEV_PMD_LOG(INFO, fmt, ## args)
22 #define IFPGA_RAWDEV_PMD_ERR(fmt, args...) \
23         IFPGA_RAWDEV_PMD_LOG(ERR, fmt, ## args)
24 #define IFPGA_RAWDEV_PMD_WARN(fmt, args...) \
25         IFPGA_RAWDEV_PMD_LOG(WARNING, fmt, ## args)
26
27 enum ifpga_rawdev_device_state {
28         IFPGA_IDLE,
29         IFPGA_READY,
30         IFPGA_ERROR
31 };
32
33 /** Set a bit in the uint64 variable */
34 #define IFPGA_BIT_SET(var, pos) \
35         ((var) |= ((uint64_t)1 << ((pos))))
36
37 /** Reset the bit in the variable */
38 #define IFPGA_BIT_RESET(var, pos) \
39         ((var) &= ~((uint64_t)1 << ((pos))))
40
41 /** Check the bit is set in the variable */
42 #define IFPGA_BIT_ISSET(var, pos) \
43         (((var) & ((uint64_t)1 << ((pos)))) ? 1 : 0)
44
45 static inline struct opae_adapter *
46 ifpga_rawdev_get_priv(const struct rte_rawdev *rawdev)
47 {
48         return (struct opae_adapter *)rawdev->dev_private;
49 }
50
51 #define IFPGA_RAWDEV_MSIX_IRQ_NUM 7
52 #define IFPGA_RAWDEV_NUM 32
53
54 struct ifpga_rawdev {
55         int dev_id;
56         struct rte_rawdev *rawdev;
57         int aer_enable;
58         int intr_fd[IFPGA_RAWDEV_MSIX_IRQ_NUM+1];
59         uint32_t aer_old[2];
60         char fvl_bdf[8][16];
61         char parent_bdf[16];
62 };
63
64 struct ifpga_rawdev *
65 ifpga_rawdev_get(const struct rte_rawdev *rawdev);
66
67 enum ifpga_irq_type {
68         IFPGA_FME_IRQ = 0,
69         IFPGA_AFU_IRQ = 1,
70 };
71
72 int
73 ifpga_register_msix_irq(struct rte_rawdev *dev, int port_id,
74                 enum ifpga_irq_type type, int vec_start, int count,
75                 rte_intr_callback_fn handler, const char *name,
76                 void *arg);
77 int
78 ifpga_unregister_msix_irq(enum ifpga_irq_type type,
79                 int vec_start, rte_intr_callback_fn handler, void *arg);
80
81 struct rte_pci_bus *ifpga_get_pci_bus(void);
82 int ifpga_rawdev_partial_reconfigure(struct rte_rawdev *dev, int port,
83         const char *file);
84 void ifpga_rawdev_cleanup(void);
85
86 #endif /* _IFPGA_RAWDEV_H_ */