1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019 Intel Corporation
5 #ifndef _OPAE_INTEL_MAX10_H_
6 #define _OPAE_INTEL_MAX10_H_
8 #include "opae_osdep.h"
11 /* max10 capability flags */
12 #define MAX10_FLAGS_NO_I2C2 BIT(0)
13 #define MAX10_FLAGS_NO_BMCIMG_FLASH BIT(1)
14 #define MAX10_FLAGS_DEVICE_TABLE BIT(2)
15 #define MAX10_FLAGS_SPI BIT(3)
16 #define MAX10_FLGAS_NIOS_SPI BIT(4)
17 #define MAX10_FLAGS_PKVL BIT(5)
19 struct intel_max10_device {
20 unsigned int flags; /*max10 hardware capability*/
21 struct altera_spi_device *spi_master;
22 struct spi_transaction_dev *spi_tran_dev;
38 struct opae_retimer_info {
39 unsigned int nums_retimer;
40 unsigned int ports_per_retimer;
41 unsigned int nums_fvl;
42 unsigned int ports_per_fvl;
43 enum retimer_speed support_speed;
47 struct opae_retimer_status {
48 enum retimer_speed speed;
50 * retimer line link status bitmap:
51 * bit 0: Retimer0 Port0 link status
52 * bit 1: Retimer0 Port1 link status
53 * bit 2: Retimer0 Port2 link status
54 * bit 3: Retimer0 Port3 link status
56 * bit 4: Retimer1 Port0 link status
57 * bit 5: Retimer1 Port1 link status
58 * bit 6: Retimer1 Port2 link status
59 * bit 7: Retimer1 Port3 link status
61 unsigned int line_link_bitmap;
64 #define FLASH_BASE 0x10000000
65 #define FLASH_OPTION_BITS 0x10000
67 #define NIOS2_FW_VERSION_OFF 0x300400
68 #define RSU_REG_OFF 0x30042c
69 #define FPGA_RP_LOAD BIT(3)
70 #define NIOS2_PRERESET BIT(4)
71 #define NIOS2_HANG BIT(5)
72 #define RSU_ENABLE BIT(6)
73 #define NIOS2_RESET BIT(7)
74 #define NIOS2_I2C2_POLL_STOP BIT(13)
75 #define FPGA_RECONF_REG_OFF 0x300430
76 #define COUNTDOWN_START BIT(18)
77 #define MAX10_BUILD_VER_OFF 0x300468
78 #define PCB_INFO GENMASK(31, 24)
79 #define MAX10_BUILD_VERION GENMASK(23, 0)
80 #define FPGA_PAGE_INFO_OFF 0x30046c
81 #define DT_AVAIL_REG_OFF 0x300490
82 #define DT_AVAIL BIT(0)
83 #define DT_BASE_ADDR_REG_OFF 0x300494
84 #define PKVL_POLLING_CTRL 0x300480
85 #define PKVL_LINK_STATUS 0x300564
87 #define DFT_MAX_SIZE 0x7e0000
89 int max10_reg_read(unsigned int reg, unsigned int *val);
90 int max10_reg_write(unsigned int reg, unsigned int val);
91 struct intel_max10_device *
92 intel_max10_device_probe(struct altera_spi_device *spi,
94 int intel_max10_device_remove(struct intel_max10_device *dev);