1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (C) 2020 Marvell International Ltd.
8 #include <rte_malloc.h>
9 #include <rte_memzone.h>
10 #include <rte_regexdev.h>
11 #include <rte_regexdev_core.h>
12 #include <rte_regexdev_driver.h>
15 /* REE common headers */
16 #include "cn9k_regexdev.h"
17 #include "cn9k_regexdev_compiler.h"
20 /* HW matches are at offset 0x80 from RES_PTR_ADDR
21 * In op structure matches starts at W5 (0x28)
22 * There is a need to copy to 0x28 to 0x80 The matches that are at the tail
23 * Which are 88 B. Each match holds 8 B, so up to 11 matches can be copied
25 #define REE_NUM_MATCHES_ALIGN 11
26 /* The REE co-processor will write up to 254 job match structures
27 * (REE_MATCH_S) starting at address [RES_PTR_ADDR] + 0x80.
29 #define REE_MATCH_OFFSET 0x80
31 #define REE_MAX_RULES_PER_GROUP 0xFFFF
32 #define REE_MAX_GROUPS 0xFFFF
35 #define REE_RULE_DB_VERSION 2
36 #define REE_RULE_DB_REVISION 0
38 struct ree_rule_db_entry {
47 uint32_t number_of_entries;
48 struct ree_rule_db_entry entries[];
52 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
54 snprintf(name, size, "cn9k_ree_lf_mem_%u:%u", dev_id, qp_id);
57 static struct roc_ree_qp *
58 ree_qp_create(const struct rte_regexdev *dev, uint16_t qp_id)
60 struct cn9k_ree_data *data = dev->data->dev_private;
61 uint64_t pg_sz = sysconf(_SC_PAGESIZE);
62 struct roc_ree_vf *vf = &data->vf;
63 const struct rte_memzone *lf_mem;
64 uint32_t len, iq_len, size_div2;
65 char name[RTE_MEMZONE_NAMESIZE];
66 uint64_t used_len, iova;
67 struct roc_ree_qp *qp;
71 /* Allocate queue pair */
72 qp = rte_zmalloc("CN9K Regex PMD Queue Pair", sizeof(*qp),
75 cn9k_err("Could not allocate queue pair");
82 * Queue size must be in units of 128B 2 * REE_INST_S (which is 64B),
84 * effective queue size to software is (size - 1) * 128
86 size_div2 = iq_len >> 1;
88 /* For pending queue */
89 len = iq_len * RTE_ALIGN(sizeof(struct roc_ree_rid), 8);
91 /* So that instruction queues start as pg size aligned */
92 len = RTE_ALIGN(len, pg_sz);
94 /* For instruction queues */
95 len += REE_IQ_LEN * sizeof(union roc_ree_inst);
97 /* Waste after instruction queues */
98 len = RTE_ALIGN(len, pg_sz);
100 qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
103 lf_mem = rte_memzone_reserve_aligned(name, len, rte_socket_id(),
104 RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
105 RTE_CACHE_LINE_SIZE);
106 if (lf_mem == NULL) {
107 cn9k_err("Could not allocate reserved memzone");
116 /* Initialize pending queue */
117 qp->pend_q.rid_queue = (struct roc_ree_rid *)va;
118 qp->pend_q.enq_tail = 0;
119 qp->pend_q.deq_head = 0;
120 qp->pend_q.pending_count = 0;
122 used_len = iq_len * RTE_ALIGN(sizeof(struct roc_ree_rid), 8);
123 used_len = RTE_ALIGN(used_len, pg_sz);
126 qp->iq_dma_addr = iova;
128 qp->base = roc_ree_qp_get_base(vf, qp_id);
129 qp->roc_regexdev_jobid = 0;
130 qp->write_offset = 0;
132 ret = roc_ree_iq_enable(vf, qp, REE_QUEUE_HI_PRIO, size_div2);
134 cn9k_err("Could not enable instruction queue");
146 ree_qp_destroy(const struct rte_regexdev *dev, struct roc_ree_qp *qp)
148 const struct rte_memzone *lf_mem;
149 char name[RTE_MEMZONE_NAMESIZE];
152 roc_ree_iq_disable(qp);
154 qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
157 lf_mem = rte_memzone_lookup(name);
159 ret = rte_memzone_free(lf_mem);
169 ree_queue_pair_release(struct rte_regexdev *dev, uint16_t qp_id)
171 struct cn9k_ree_data *data = dev->data->dev_private;
172 struct roc_ree_qp *qp = data->queue_pairs[qp_id];
175 ree_func_trace("Queue=%d", qp_id);
180 ret = ree_qp_destroy(dev, qp);
182 cn9k_err("Could not destroy queue pair %d", qp_id);
186 data->queue_pairs[qp_id] = NULL;
191 static struct rte_regexdev *
192 ree_dev_register(const char *name)
194 struct rte_regexdev *dev;
196 cn9k_ree_dbg("Creating regexdev %s\n", name);
198 /* allocate device structure */
199 dev = rte_regexdev_register(name);
201 cn9k_err("Failed to allocate regex device for %s", name);
205 /* allocate private device structure */
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 dev->data->dev_private =
208 rte_zmalloc_socket("regexdev device private",
209 sizeof(struct cn9k_ree_data),
213 if (dev->data->dev_private == NULL) {
214 cn9k_err("Cannot allocate memory for dev %s private data",
217 rte_regexdev_unregister(dev);
226 ree_dev_unregister(struct rte_regexdev *dev)
228 cn9k_ree_dbg("Closing regex device %s", dev->device->name);
230 /* free regex device */
231 rte_regexdev_unregister(dev);
233 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
234 rte_free(dev->data->dev_private);
240 ree_dev_fini(struct rte_regexdev *dev)
242 struct cn9k_ree_data *data = dev->data->dev_private;
243 struct roc_ree_vf *vf = &data->vf;
248 for (i = 0; i < data->nb_queue_pairs; i++) {
249 ret = ree_queue_pair_release(dev, i);
254 ret = roc_ree_queues_detach(vf);
256 cn9k_err("Could not detach queues");
258 /* TEMP : should be in lib */
259 if (data->queue_pairs)
260 rte_free(data->queue_pairs);
262 rte_free(data->rules);
264 roc_ree_dev_fini(vf);
266 ret = ree_dev_unregister(dev);
268 cn9k_err("Could not destroy PMD");
274 ree_enqueue(struct roc_ree_qp *qp, struct rte_regex_ops *op,
275 struct roc_ree_pending_queue *pend_q)
277 union roc_ree_inst inst;
281 if (unlikely(pend_q->pending_count >= REE_DEFAULT_CMD_QLEN)) {
282 cn9k_err("Pending count %" PRIu64 " is greater than Q size %d",
283 pend_q->pending_count, REE_DEFAULT_CMD_QLEN);
286 if (unlikely(op->mbuf->data_len > REE_MAX_PAYLOAD_SIZE ||
287 op->mbuf->data_len == 0)) {
288 cn9k_err("Packet length %d is greater than MAX payload %d",
289 op->mbuf->data_len, REE_MAX_PAYLOAD_SIZE);
296 inst.cn98xx.doneint = 0;
298 inst.cn98xx.inp_ptr_addr = rte_pktmbuf_mtod(op->mbuf, uint64_t);
300 inst.cn98xx.inp_ptr_ctl = op->mbuf->data_len & 0x7FFF;
301 inst.cn98xx.inp_ptr_ctl = inst.cn98xx.inp_ptr_ctl << 32;
304 inst.cn98xx.res_ptr_addr = (uint64_t)op;
306 inst.cn98xx.wq_ptr = 0;
308 inst.cn98xx.ggrp = 0;
312 inst.cn98xx.ree_job_length = op->mbuf->data_len & 0x7FFF;
313 if (op->req_flags & RTE_REGEX_OPS_REQ_STOP_ON_MATCH_F)
314 inst.cn98xx.ree_job_ctrl = (0x2 << 8);
315 else if (op->req_flags & RTE_REGEX_OPS_REQ_MATCH_HIGH_PRIORITY_F)
316 inst.cn98xx.ree_job_ctrl = (0x1 << 8);
318 inst.cn98xx.ree_job_ctrl = 0;
319 inst.cn98xx.ree_job_id = qp->roc_regexdev_jobid;
321 inst.cn98xx.ree_job_subset_id_0 = op->group_id0;
322 if (op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID1_VALID_F)
323 inst.cn98xx.ree_job_subset_id_1 = op->group_id1;
325 inst.cn98xx.ree_job_subset_id_1 = op->group_id0;
326 if (op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID2_VALID_F)
327 inst.cn98xx.ree_job_subset_id_2 = op->group_id2;
329 inst.cn98xx.ree_job_subset_id_2 = op->group_id0;
330 if (op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID3_VALID_F)
331 inst.cn98xx.ree_job_subset_id_3 = op->group_id3;
333 inst.cn98xx.ree_job_subset_id_3 = op->group_id0;
335 /* Copy REE command to Q */
336 offset = qp->write_offset * sizeof(inst);
337 memcpy((void *)(qp->iq_dma_addr + offset), &inst, sizeof(inst));
339 pend_q->rid_queue[pend_q->enq_tail].rid = (uintptr_t)op;
340 pend_q->rid_queue[pend_q->enq_tail].user_id = op->user_id;
342 /* Mark result as not done */
343 res = (union ree_res *)(op);
347 /* We will use soft queue length here to limit requests */
348 REE_MOD_INC(pend_q->enq_tail, REE_DEFAULT_CMD_QLEN);
349 pend_q->pending_count += 1;
350 REE_MOD_INC(qp->roc_regexdev_jobid, 0xFFFFFF);
351 REE_MOD_INC(qp->write_offset, REE_IQ_LEN);
357 cn9k_ree_enqueue_burst(struct rte_regexdev *dev, uint16_t qp_id,
358 struct rte_regex_ops **ops, uint16_t nb_ops)
360 struct cn9k_ree_data *data = dev->data->dev_private;
361 struct roc_ree_qp *qp = data->queue_pairs[qp_id];
362 struct roc_ree_pending_queue *pend_q;
363 uint16_t nb_allowed, count = 0;
364 struct rte_regex_ops *op;
367 pend_q = &qp->pend_q;
369 nb_allowed = REE_DEFAULT_CMD_QLEN - pend_q->pending_count;
370 if (nb_ops > nb_allowed)
373 for (count = 0; count < nb_ops; count++) {
375 ret = ree_enqueue(qp, op, pend_q);
382 * Make sure all instructions are written before DOORBELL is activated
386 /* Update Doorbell */
387 plt_write64(count, qp->base + REE_LF_DOORBELL);
393 ree_dequeue_post_process(struct rte_regex_ops *ops)
395 uint8_t ree_res_mcnt, ree_res_dmcnt;
396 int off = REE_MATCH_OFFSET;
397 struct ree_res_s_98 *res;
398 uint16_t ree_res_status;
401 res = (struct ree_res_s_98 *)ops;
402 /* store res values on stack since ops and res
403 * are using the same memory
405 ree_res_status = res->ree_res_status;
406 ree_res_mcnt = res->ree_res_mcnt;
407 ree_res_dmcnt = res->ree_res_dmcnt;
409 ops->nb_actual_matches = ree_res_dmcnt;
410 ops->nb_matches = ree_res_mcnt;
411 if (unlikely(res->ree_err)) {
412 ops->nb_actual_matches = 0;
416 if (unlikely(ree_res_status != REE_TYPE_RESULT_DESC)) {
417 if (ree_res_status & REE_STATUS_PMI_SOJ_BIT)
418 ops->rsp_flags |= RTE_REGEX_OPS_RSP_PMI_SOJ_F;
419 if (ree_res_status & REE_STATUS_PMI_EOJ_BIT)
420 ops->rsp_flags |= RTE_REGEX_OPS_RSP_PMI_EOJ_F;
421 if (ree_res_status & REE_STATUS_ML_CNT_DET_BIT)
422 ops->rsp_flags |= RTE_REGEX_OPS_RSP_MAX_SCAN_TIMEOUT_F;
423 if (ree_res_status & REE_STATUS_MM_CNT_DET_BIT)
424 ops->rsp_flags |= RTE_REGEX_OPS_RSP_MAX_MATCH_F;
425 if (ree_res_status & REE_STATUS_MP_CNT_DET_BIT)
426 ops->rsp_flags |= RTE_REGEX_OPS_RSP_MAX_PREFIX_F;
428 if (ops->nb_matches > 0) {
429 /* Move the matches to the correct offset */
430 off = ((ops->nb_matches < REE_NUM_MATCHES_ALIGN) ?
431 ops->nb_matches : REE_NUM_MATCHES_ALIGN);
432 match = (uint64_t)ops + REE_MATCH_OFFSET;
433 match += (ops->nb_matches - off) *
434 sizeof(union ree_match);
435 memcpy((void *)ops->matches, (void *)match,
436 off * sizeof(union ree_match));
441 cn9k_ree_dequeue_burst(struct rte_regexdev *dev, uint16_t qp_id,
442 struct rte_regex_ops **ops, uint16_t nb_ops)
444 struct cn9k_ree_data *data = dev->data->dev_private;
445 struct roc_ree_qp *qp = data->queue_pairs[qp_id];
446 struct roc_ree_pending_queue *pend_q;
447 int i, nb_pending, nb_completed = 0;
448 volatile struct ree_res_s_98 *res;
449 struct roc_ree_rid *rid;
451 pend_q = &qp->pend_q;
453 nb_pending = pend_q->pending_count;
455 if (nb_ops > nb_pending)
458 for (i = 0; i < nb_ops; i++) {
459 rid = &pend_q->rid_queue[pend_q->deq_head];
460 res = (volatile struct ree_res_s_98 *)(rid->rid);
462 /* Check response header done bit if completed */
463 if (unlikely(!res->done))
466 ops[i] = (struct rte_regex_ops *)(rid->rid);
467 ops[i]->user_id = rid->user_id;
469 REE_MOD_INC(pend_q->deq_head, REE_DEFAULT_CMD_QLEN);
470 pend_q->pending_count -= 1;
475 for (i = 0; i < nb_completed; i++)
476 ree_dequeue_post_process(ops[i]);
482 cn9k_ree_dev_info_get(struct rte_regexdev *dev, struct rte_regexdev_info *info)
484 struct cn9k_ree_data *data = dev->data->dev_private;
485 struct roc_ree_vf *vf = &data->vf;
492 info->driver_name = dev->device->driver->name;
493 info->dev = dev->device;
495 info->max_queue_pairs = vf->max_queues;
496 info->max_matches = vf->max_matches;
497 info->max_payload_size = REE_MAX_PAYLOAD_SIZE;
498 info->max_rules_per_group = data->max_rules_per_group;
499 info->max_groups = data->max_groups;
500 info->regexdev_capa = data->regexdev_capa;
501 info->rule_flags = data->rule_flags;
507 cn9k_ree_dev_config(struct rte_regexdev *dev,
508 const struct rte_regexdev_config *cfg)
510 struct cn9k_ree_data *data = dev->data->dev_private;
511 struct roc_ree_vf *vf = &data->vf;
512 const struct ree_rule_db *rule_db;
513 uint32_t rule_db_len;
518 if (cfg->nb_queue_pairs > vf->max_queues) {
519 cn9k_err("Invalid number of queue pairs requested");
523 if (cfg->nb_max_matches != vf->max_matches) {
524 cn9k_err("Invalid number of max matches requested");
528 if (cfg->dev_cfg_flags != 0) {
529 cn9k_err("Invalid device configuration flags requested");
533 /* Unregister error interrupts */
534 if (vf->err_intr_registered)
535 roc_ree_err_intr_unregister(vf);
539 ret = roc_ree_queues_detach(vf);
541 cn9k_err("Could not detach REE queues");
546 /* TEMP : should be in lib */
547 if (data->queue_pairs == NULL) { /* first time configuration */
548 data->queue_pairs = rte_zmalloc("regexdev->queue_pairs",
549 sizeof(data->queue_pairs[0]) *
550 cfg->nb_queue_pairs, RTE_CACHE_LINE_SIZE);
552 if (data->queue_pairs == NULL) {
553 data->nb_queue_pairs = 0;
554 cn9k_err("Failed to get memory for qp meta data, nb_queues %u",
555 cfg->nb_queue_pairs);
558 } else { /* re-configure */
559 uint16_t old_nb_queues = data->nb_queue_pairs;
563 qp = data->queue_pairs;
565 for (i = cfg->nb_queue_pairs; i < old_nb_queues; i++) {
566 ret = ree_queue_pair_release(dev, i);
571 qp = rte_realloc(qp, sizeof(qp[0]) * cfg->nb_queue_pairs,
572 RTE_CACHE_LINE_SIZE);
574 cn9k_err("Failed to realloc qp meta data, nb_queues %u",
575 cfg->nb_queue_pairs);
579 if (cfg->nb_queue_pairs > old_nb_queues) {
580 uint16_t new_qs = cfg->nb_queue_pairs - old_nb_queues;
581 memset(qp + old_nb_queues, 0, sizeof(qp[0]) * new_qs);
584 data->queue_pairs = qp;
586 data->nb_queue_pairs = cfg->nb_queue_pairs;
589 cn9k_ree_dbg("Attach %d queues", cfg->nb_queue_pairs);
590 ret = roc_ree_queues_attach(vf, cfg->nb_queue_pairs);
592 cn9k_err("Could not attach queues");
596 ret = roc_ree_msix_offsets_get(vf);
598 cn9k_err("Could not get MSI-X offsets");
602 if (cfg->rule_db && cfg->rule_db_len) {
603 cn9k_ree_dbg("rule_db length %d", cfg->rule_db_len);
604 rule_db = (const struct ree_rule_db *)cfg->rule_db;
605 rule_db_len = rule_db->number_of_entries *
606 sizeof(struct ree_rule_db_entry);
607 cn9k_ree_dbg("rule_db number of entries %d",
608 rule_db->number_of_entries);
609 if (rule_db_len > cfg->rule_db_len) {
610 cn9k_err("Could not program rule db");
614 ret = roc_ree_rule_db_prog(vf, (const char *)rule_db->entries,
615 rule_db_len, NULL, REE_NON_INC_PROG);
617 cn9k_err("Could not program rule db");
622 dev->enqueue = cn9k_ree_enqueue_burst;
623 dev->dequeue = cn9k_ree_dequeue_burst;
629 roc_ree_queues_detach(vf);
634 cn9k_ree_stop(struct rte_regexdev *dev)
643 cn9k_ree_start(struct rte_regexdev *dev)
645 struct cn9k_ree_data *data = dev->data->dev_private;
646 struct roc_ree_vf *vf = &data->vf;
647 uint32_t rule_db_len = 0;
652 ret = roc_ree_rule_db_len_get(vf, &rule_db_len, NULL);
655 if (rule_db_len == 0) {
656 cn9k_err("Rule db not programmed");
664 cn9k_ree_close(struct rte_regexdev *dev)
666 return ree_dev_fini(dev);
670 cn9k_ree_queue_pair_setup(struct rte_regexdev *dev, uint16_t qp_id,
671 const struct rte_regexdev_qp_conf *qp_conf)
673 struct cn9k_ree_data *data = dev->data->dev_private;
674 struct roc_ree_qp *qp;
676 ree_func_trace("Queue=%d", qp_id);
678 if (data->queue_pairs[qp_id] != NULL)
679 ree_queue_pair_release(dev, qp_id);
681 if (qp_conf->nb_desc > REE_DEFAULT_CMD_QLEN) {
682 cn9k_err("Could not setup queue pair for %u descriptors",
686 if (qp_conf->qp_conf_flags != 0) {
687 cn9k_err("Could not setup queue pair with configuration flags 0x%x",
688 qp_conf->qp_conf_flags);
692 qp = ree_qp_create(dev, qp_id);
694 cn9k_err("Could not create queue pair %d", qp_id);
697 data->queue_pairs[qp_id] = qp;
703 cn9k_ree_rule_db_compile_activate(struct rte_regexdev *dev)
705 return cn9k_ree_rule_db_compile_prog(dev);
709 cn9k_ree_rule_db_update(struct rte_regexdev *dev,
710 const struct rte_regexdev_rule *rules, uint16_t nb_rules)
712 struct cn9k_ree_data *data = dev->data->dev_private;
713 struct rte_regexdev_rule *old_ptr;
714 uint32_t i, sum_nb_rules;
716 ree_func_trace("nb_rules=%d", nb_rules);
718 for (i = 0; i < nb_rules; i++) {
719 if (rules[i].op == RTE_REGEX_RULE_OP_REMOVE)
721 if (rules[i].group_id >= data->max_groups)
723 if (rules[i].rule_id >= data->max_rules_per_group)
725 /* logical implication
732 if ((~(rules[i].rule_flags) | data->rule_flags) == 0)
737 if (data->nb_rules == 0) {
739 data->rules = rte_malloc("rte_regexdev_rules",
740 nb_rules*sizeof(struct rte_regexdev_rule), 0);
741 if (data->rules == NULL)
744 memcpy(data->rules, rules,
745 nb_rules*sizeof(struct rte_regexdev_rule));
746 data->nb_rules = nb_rules;
749 old_ptr = data->rules;
750 sum_nb_rules = data->nb_rules + nb_rules;
751 data->rules = rte_realloc(data->rules,
752 sum_nb_rules * sizeof(struct rte_regexdev_rule),
754 if (data->rules == NULL) {
755 data->rules = old_ptr;
758 memcpy(&data->rules[data->nb_rules], rules,
759 nb_rules*sizeof(struct rte_regexdev_rule));
760 data->nb_rules = sum_nb_rules;
766 cn9k_ree_rule_db_import(struct rte_regexdev *dev, const char *rule_db,
767 uint32_t rule_db_len)
769 struct cn9k_ree_data *data = dev->data->dev_private;
770 struct roc_ree_vf *vf = &data->vf;
771 const struct ree_rule_db *ree_rule_db;
772 uint32_t ree_rule_db_len;
775 ree_func_trace("rule_db_len=%d", rule_db_len);
777 ree_rule_db = (const struct ree_rule_db *)rule_db;
778 ree_rule_db_len = ree_rule_db->number_of_entries *
779 sizeof(struct ree_rule_db_entry);
780 if (ree_rule_db_len > rule_db_len) {
781 cn9k_err("Could not program rule db");
784 ret = roc_ree_rule_db_prog(vf, (const char *)ree_rule_db->entries,
785 ree_rule_db_len, NULL, REE_NON_INC_PROG);
787 cn9k_err("Could not program rule db");
794 cn9k_ree_rule_db_export(struct rte_regexdev *dev, char *rule_db)
796 struct cn9k_ree_data *data = dev->data->dev_private;
797 struct roc_ree_vf *vf = &data->vf;
798 struct ree_rule_db *ree_rule_db;
799 uint32_t rule_dbi_len;
800 uint32_t rule_db_len;
805 ret = roc_ree_rule_db_len_get(vf, &rule_db_len, &rule_dbi_len);
809 if (rule_db == NULL) {
810 rule_db_len += sizeof(struct ree_rule_db);
814 ree_rule_db = (struct ree_rule_db *)rule_db;
815 ret = roc_ree_rule_db_get(vf, (char *)ree_rule_db->entries,
816 rule_db_len, NULL, 0);
818 cn9k_err("Could not export rule db");
821 ree_rule_db->number_of_entries =
822 rule_db_len/sizeof(struct ree_rule_db_entry);
823 ree_rule_db->revision = REE_RULE_DB_REVISION;
824 ree_rule_db->version = REE_RULE_DB_VERSION;
829 static struct rte_regexdev_ops cn9k_ree_ops = {
830 .dev_info_get = cn9k_ree_dev_info_get,
831 .dev_configure = cn9k_ree_dev_config,
832 .dev_qp_setup = cn9k_ree_queue_pair_setup,
833 .dev_start = cn9k_ree_start,
834 .dev_stop = cn9k_ree_stop,
835 .dev_close = cn9k_ree_close,
836 .dev_attr_get = NULL,
837 .dev_attr_set = NULL,
838 .dev_rule_db_update = cn9k_ree_rule_db_update,
839 .dev_rule_db_compile_activate =
840 cn9k_ree_rule_db_compile_activate,
841 .dev_db_import = cn9k_ree_rule_db_import,
842 .dev_db_export = cn9k_ree_rule_db_export,
843 .dev_xstats_names_get = NULL,
844 .dev_xstats_get = NULL,
845 .dev_xstats_by_name_get = NULL,
846 .dev_xstats_reset = NULL,
847 .dev_selftest = NULL,
852 cn9k_ree_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
853 struct rte_pci_device *pci_dev)
855 char name[RTE_REGEXDEV_NAME_MAX_LEN];
856 struct cn9k_ree_data *data;
857 struct rte_regexdev *dev;
858 struct roc_ree_vf *vf;
861 ret = roc_plt_init();
863 plt_err("Failed to initialize platform model");
867 rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
869 dev = ree_dev_register(name);
875 dev->dev_ops = &cn9k_ree_ops;
876 dev->device = &pci_dev->device;
878 /* Get private data space allocated */
879 data = dev->data->dev_private;
881 vf->pci_dev = pci_dev;
882 ret = roc_ree_dev_init(vf);
884 plt_err("Failed to initialize roc cpt rc=%d", ret);
888 data->rule_flags = RTE_REGEX_PCRE_RULE_ALLOW_EMPTY_F |
889 RTE_REGEX_PCRE_RULE_ANCHORED_F;
890 data->regexdev_capa = 0;
891 data->max_groups = REE_MAX_GROUPS;
892 data->max_rules_per_group = REE_MAX_RULES_PER_GROUP;
895 dev->state = RTE_REGEXDEV_READY;
899 ree_dev_unregister(dev);
901 cn9k_err("Could not create device (vendor_id: 0x%x device_id: 0x%x)",
902 pci_dev->id.vendor_id, pci_dev->id.device_id);
907 cn9k_ree_pci_remove(struct rte_pci_device *pci_dev)
909 char name[RTE_REGEXDEV_NAME_MAX_LEN];
910 struct rte_regexdev *dev = NULL;
915 rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
917 dev = rte_regexdev_get_device_by_name(name);
922 return ree_dev_fini(dev);
925 static struct rte_pci_id pci_id_ree_table[] = {
927 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
928 PCI_DEVID_CNXK_RVU_REE_PF)
935 static struct rte_pci_driver cn9k_regexdev_pmd = {
936 .id_table = pci_id_ree_table,
937 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
938 .probe = cn9k_ree_pci_probe,
939 .remove = cn9k_ree_pci_remove,
943 RTE_PMD_REGISTER_PCI(REGEXDEV_NAME_CN9K_PMD, cn9k_regexdev_pmd);
944 RTE_PMD_REGISTER_PCI_TABLE(REGEXDEV_NAME_CN9K_PMD, pci_id_ree_table);