drivers/regex/mlx5/mlx5_regex.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2020 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <rte_malloc.h>
   6 #include <rte_log.h>
   7 #include <rte_errno.h>
   8 #include <rte_pci.h>
   9 #include <rte_regexdev.h>
  10 #include <rte_regexdev_core.h>
  11 #include <rte_regexdev_driver.h>
  12 #include <rte_bus_pci.h>
  13
  14 #include <mlx5_common.h>
  15 #include <mlx5_common_mr.h>
  16 #include <mlx5_glue.h>
  17 #include <mlx5_devx_cmds.h>
  18 #include <mlx5_prm.h>
  19
  20 #include "mlx5_regex.h"
  21 #include "mlx5_regex_utils.h"
  22 #include "mlx5_rxp_csrs.h"
  23
  24 #define MLX5_REGEX_DRIVER_NAME regex_mlx5
  25
  26 int mlx5_regex_logtype;
  27
  28 const struct rte_regexdev_ops mlx5_regexdev_ops = {
  29         .dev_info_get = mlx5_regex_info_get,
  30         .dev_configure = mlx5_regex_configure,
  31         .dev_db_import = mlx5_regex_rules_db_import,
  32         .dev_qp_setup = mlx5_regex_qp_setup,
  33         .dev_start = mlx5_regex_start,
  34         .dev_stop = mlx5_regex_stop,
  35         .dev_close = mlx5_regex_close,
  36 };
  37
  38 int
  39 mlx5_regex_start(struct rte_regexdev *dev)
  40 {
  41         struct mlx5_regex_priv *priv = dev->data->dev_private;
  42
  43         return mlx5_dev_mempool_subscribe(priv->cdev);
  44 }
  45
  46 int
  47 mlx5_regex_stop(struct rte_regexdev *dev __rte_unused)
  48 {
  49         struct mlx5_regex_priv *priv = dev->data->dev_private;
  50         uint32_t i;
  51
  52         mlx5_regex_clean_ctrl(dev);
  53         rte_free(priv->qps);
  54         priv->qps = NULL;
  55
  56         for (i = 0; i < priv->nb_engines; i++)
  57                 /* Stop engine. */
  58                 mlx5_devx_regex_database_stop(priv->cdev->ctx, i);
  59
  60         return 0;
  61 }
  62
  63 int
  64 mlx5_regex_close(struct rte_regexdev *dev __rte_unused)
  65 {
  66         return 0;
  67 }
  68
  69 static int
  70 mlx5_regex_engines_status(struct ibv_context *ctx, int num_engines)
  71 {
  72         uint32_t fpga_ident = 0;
  73         int err;
  74         int i;
  75
  76         for (i = 0; i < num_engines; i++) {
  77                 err = mlx5_devx_regex_register_read(ctx, i,
  78                                                     MLX5_RXP_CSR_IDENTIFIER,
  79                                                     &fpga_ident);
  80                 fpga_ident = (fpga_ident & (0x0000FFFF));
  81                 if (err || fpga_ident != MLX5_RXP_IDENTIFIER) {
  82                         DRV_LOG(ERR, "Failed setup RXP %d err %d database "
  83                                 "memory 0x%x", i, err, fpga_ident);
  84                         if (!err)
  85                                 err = EINVAL;
  86                         return err;
  87                 }
  88         }
  89         return 0;
  90 }
  91
  92 static void
  93 mlx5_regex_get_name(char *name, struct rte_device *dev)
  94 {
  95         sprintf(name, "mlx5_regex_%s", dev->name);
  96 }
  97
  98 static int
  99 mlx5_regex_dev_probe(struct mlx5_common_device *cdev)
 100 {
 101         struct mlx5_regex_priv *priv = NULL;
 102         struct mlx5_hca_attr *attr = &cdev->config.hca_attr;
 103         char name[RTE_REGEXDEV_NAME_MAX_LEN];
 104
 105         if ((!attr->regexp_params && !attr->mmo_regex_sq_en && !attr->mmo_regex_qp_en)
 106             || attr->regexp_num_of_engines == 0) {
 107                 DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe "
 108                         "old FW/OFED version?");
 109                 rte_errno = ENOTSUP;
 110                 return -rte_errno;
 111         }
 112         if (mlx5_regex_engines_status(cdev->ctx, 2)) {
 113                 DRV_LOG(ERR, "RegEx engine error.");
 114                 rte_errno = ENOMEM;
 115                 return -rte_errno;
 116         }
 117         priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv),
 118                            RTE_CACHE_LINE_SIZE);
 119         if (!priv) {
 120                 DRV_LOG(ERR, "Failed to allocate private memory.");
 121                 rte_errno = ENOMEM;
 122                 return -rte_errno;
 123         }
 124         priv->mmo_regex_qp_cap = attr->mmo_regex_qp_en;
 125         priv->mmo_regex_sq_cap = attr->mmo_regex_sq_en;
 126         priv->cdev = cdev;
 127         priv->nb_engines = 2; /* attr.regexp_num_of_engines */
 128         if (attr->regexp_version == MLX5_RXP_BF2_IDENTIFIER)
 129                 priv->is_bf2 = 1;
 130         /* Default RXP programming mode to Shared. */
 131         priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE;
 132         mlx5_regex_get_name(name, cdev->dev);
 133         priv->regexdev = rte_regexdev_register(name);
 134         if (priv->regexdev == NULL) {
 135                 DRV_LOG(ERR, "Failed to register RegEx device.");
 136                 rte_errno = rte_errno ? rte_errno : EINVAL;
 137                 goto dev_error;
 138         }
 139         /*
 140          * This PMD always claims the write memory barrier on UAR
 141          * registers writings, it is safe to allocate UAR with any
 142          * memory mapping type.
 143          */
 144         priv->uar = mlx5_devx_alloc_uar(priv->cdev->ctx, -1);
 145         if (!priv->uar) {
 146                 DRV_LOG(ERR, "can't allocate uar.");
 147                 rte_errno = ENOMEM;
 148                 goto error;
 149         }
 150         priv->regexdev->dev_ops = &mlx5_regexdev_ops;
 151         priv->regexdev->enqueue = mlx5_regexdev_enqueue;
 152 #ifdef HAVE_MLX5_UMR_IMKEY
 153         if (!attr->umr_indirect_mkey_disabled &&
 154             !attr->umr_modify_entity_size_disabled)
 155                 priv->has_umr = 1;
 156         if (priv->has_umr)
 157                 priv->regexdev->enqueue = mlx5_regexdev_enqueue_gga;
 158 #endif
 159         priv->regexdev->dequeue = mlx5_regexdev_dequeue;
 160         priv->regexdev->device = cdev->dev;
 161         priv->regexdev->data->dev_private = priv;
 162         priv->regexdev->state = RTE_REGEXDEV_READY;
 163         DRV_LOG(INFO, "RegEx GGA is %s.",
 164                 priv->has_umr ? "supported" : "unsupported");
 165         return 0;
 166
 167 error:
 168         if (priv->uar)
 169                 mlx5_glue->devx_free_uar(priv->uar);
 170         if (priv->regexdev)
 171                 rte_regexdev_unregister(priv->regexdev);
 172 dev_error:
 173         if (priv)
 174                 rte_free(priv);
 175         return -rte_errno;
 176 }
 177
 178 static int
 179 mlx5_regex_dev_remove(struct mlx5_common_device *cdev)
 180 {
 181         char name[RTE_REGEXDEV_NAME_MAX_LEN];
 182         struct rte_regexdev *dev;
 183         struct mlx5_regex_priv *priv = NULL;
 184
 185         mlx5_regex_get_name(name, cdev->dev);
 186         dev = rte_regexdev_get_device_by_name(name);
 187         if (!dev)
 188                 return 0;
 189         priv = dev->data->dev_private;
 190         if (priv) {
 191                 if (priv->uar)
 192                         mlx5_glue->devx_free_uar(priv->uar);
 193                 if (priv->regexdev)
 194                         rte_regexdev_unregister(priv->regexdev);
 195                 rte_free(priv);
 196         }
 197         return 0;
 198 }
 199
 200 static const struct rte_pci_id mlx5_regex_pci_id_map[] = {
 201         {
 202                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
 203                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF)
 204         },
 205         {
 206                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
 207                                 PCI_DEVICE_ID_MELLANOX_CONNECTX7BF)
 208         },
 209         {
 210                 .vendor_id = 0
 211         }
 212 };
 213
 214 static struct mlx5_class_driver mlx5_regex_driver = {
 215         .drv_class = MLX5_CLASS_REGEX,
 216         .name = RTE_STR(MLX5_REGEX_DRIVER_NAME),
 217         .id_table = mlx5_regex_pci_id_map,
 218         .probe = mlx5_regex_dev_probe,
 219         .remove = mlx5_regex_dev_remove,
 220 };
 221
 222 RTE_INIT(rte_mlx5_regex_init)
 223 {
 224         mlx5_common_init();
 225         if (mlx5_glue)
 226                 mlx5_class_driver_register(&mlx5_regex_driver);
 227 }
 228
 229 RTE_LOG_REGISTER_DEFAULT(mlx5_regex_logtype, NOTICE)
 230 RTE_PMD_EXPORT_NAME(MLX5_REGEX_DRIVER_NAME, __COUNTER__);
 231 RTE_PMD_REGISTER_PCI_TABLE(MLX5_REGEX_DRIVER_NAME, mlx5_regex_pci_id_map);
 232 RTE_PMD_REGISTER_KMOD_DEP(MLX5_REGEX_DRIVER_NAME, "* ib_uverbs & mlx5_core & mlx5_ib");