drivers/regex/mlx5/mlx5_regex.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2020 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <rte_malloc.h>
   6 #include <rte_log.h>
   7 #include <rte_errno.h>
   8 #include <rte_pci.h>
   9 #include <rte_regexdev.h>
  10 #include <rte_regexdev_core.h>
  11 #include <rte_regexdev_driver.h>
  12 #include <rte_bus_pci.h>
  13
  14 #include <mlx5_common.h>
  15 #include <mlx5_common_mr.h>
  16 #include <mlx5_glue.h>
  17 #include <mlx5_devx_cmds.h>
  18 #include <mlx5_prm.h>
  19
  20 #include "mlx5_regex.h"
  21 #include "mlx5_regex_utils.h"
  22 #include "mlx5_rxp_csrs.h"
  23
  24 #define MLX5_REGEX_DRIVER_NAME regex_mlx5
  25
  26 int mlx5_regex_logtype;
  27
  28 const struct rte_regexdev_ops mlx5_regexdev_ops = {
  29         .dev_info_get = mlx5_regex_info_get,
  30         .dev_configure = mlx5_regex_configure,
  31         .dev_db_import = mlx5_regex_rules_db_import,
  32         .dev_qp_setup = mlx5_regex_qp_setup,
  33         .dev_start = mlx5_regex_start,
  34         .dev_stop = mlx5_regex_stop,
  35         .dev_close = mlx5_regex_close,
  36 };
  37
  38 int
  39 mlx5_regex_start(struct rte_regexdev *dev)
  40 {
  41         struct mlx5_regex_priv *priv = dev->data->dev_private;
  42
  43         return mlx5_dev_mempool_subscribe(priv->cdev);
  44 }
  45
  46 int
  47 mlx5_regex_stop(struct rte_regexdev *dev __rte_unused)
  48 {
  49         struct mlx5_regex_priv *priv = dev->data->dev_private;
  50         uint32_t i;
  51
  52         mlx5_regex_clean_ctrl(dev);
  53         rte_free(priv->qps);
  54         priv->qps = NULL;
  55
  56         for (i = 0; i < (priv->nb_engines + MLX5_RXP_EM_COUNT); i++) {
  57                 if (priv->db[i].umem.umem)
  58                         mlx5_glue->devx_umem_dereg(priv->db[i].umem.umem);
  59                 rte_free(priv->db[i].ptr);
  60                 priv->db[i].ptr = NULL;
  61         }
  62
  63         return 0;
  64 }
  65
  66 int
  67 mlx5_regex_close(struct rte_regexdev *dev __rte_unused)
  68 {
  69         return 0;
  70 }
  71
  72 static int
  73 mlx5_regex_engines_status(struct ibv_context *ctx, int num_engines)
  74 {
  75         uint32_t fpga_ident = 0;
  76         int err;
  77         int i;
  78
  79         for (i = 0; i < num_engines; i++) {
  80                 err = mlx5_devx_regex_register_read(ctx, i,
  81                                                     MLX5_RXP_CSR_IDENTIFIER,
  82                                                     &fpga_ident);
  83                 fpga_ident = (fpga_ident & (0x0000FFFF));
  84                 if (err || fpga_ident != MLX5_RXP_IDENTIFIER) {
  85                         DRV_LOG(ERR, "Failed setup RXP %d err %d database "
  86                                 "memory 0x%x", i, err, fpga_ident);
  87                         if (!err)
  88                                 err = EINVAL;
  89                         return err;
  90                 }
  91         }
  92         return 0;
  93 }
  94
  95 static void
  96 mlx5_regex_get_name(char *name, struct rte_device *dev)
  97 {
  98         sprintf(name, "mlx5_regex_%s", dev->name);
  99 }
 100
 101 static int
 102 mlx5_regex_dev_probe(struct mlx5_common_device *cdev)
 103 {
 104         struct mlx5_regex_priv *priv = NULL;
 105         struct mlx5_hca_attr *attr = &cdev->config.hca_attr;
 106         char name[RTE_REGEXDEV_NAME_MAX_LEN];
 107
 108         if ((!attr->regexp_params && !attr->mmo_regex_sq_en && !attr->mmo_regex_qp_en)
 109             || attr->regexp_num_of_engines == 0) {
 110                 DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe "
 111                         "old FW/OFED version?");
 112                 rte_errno = ENOTSUP;
 113                 return -rte_errno;
 114         }
 115         if (mlx5_regex_engines_status(cdev->ctx, 2)) {
 116                 DRV_LOG(ERR, "RegEx engine error.");
 117                 rte_errno = ENOMEM;
 118                 return -rte_errno;
 119         }
 120         priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv),
 121                            RTE_CACHE_LINE_SIZE);
 122         if (!priv) {
 123                 DRV_LOG(ERR, "Failed to allocate private memory.");
 124                 rte_errno = ENOMEM;
 125                 return -rte_errno;
 126         }
 127         priv->mmo_regex_qp_cap = attr->mmo_regex_qp_en;
 128         priv->mmo_regex_sq_cap = attr->mmo_regex_sq_en;
 129         priv->cdev = cdev;
 130         priv->nb_engines = 2; /* attr.regexp_num_of_engines */
 131         if (attr->regexp_version == MLX5_RXP_BF2_IDENTIFIER)
 132                 priv->is_bf2 = 1;
 133         /* Default RXP programming mode to Shared. */
 134         priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE;
 135         mlx5_regex_get_name(name, cdev->dev);
 136         priv->regexdev = rte_regexdev_register(name);
 137         if (priv->regexdev == NULL) {
 138                 DRV_LOG(ERR, "Failed to register RegEx device.");
 139                 rte_errno = rte_errno ? rte_errno : EINVAL;
 140                 goto dev_error;
 141         }
 142         /*
 143          * This PMD always claims the write memory barrier on UAR
 144          * registers writings, it is safe to allocate UAR with any
 145          * memory mapping type.
 146          */
 147         priv->uar = mlx5_devx_alloc_uar(priv->cdev->ctx, -1);
 148         if (!priv->uar) {
 149                 DRV_LOG(ERR, "can't allocate uar.");
 150                 rte_errno = ENOMEM;
 151                 goto error;
 152         }
 153         priv->regexdev->dev_ops = &mlx5_regexdev_ops;
 154         priv->regexdev->enqueue = mlx5_regexdev_enqueue;
 155 #ifdef HAVE_MLX5_UMR_IMKEY
 156         if (!attr->umr_indirect_mkey_disabled &&
 157             !attr->umr_modify_entity_size_disabled)
 158                 priv->has_umr = 1;
 159         if (priv->has_umr)
 160                 priv->regexdev->enqueue = mlx5_regexdev_enqueue_gga;
 161 #endif
 162         priv->regexdev->dequeue = mlx5_regexdev_dequeue;
 163         priv->regexdev->device = cdev->dev;
 164         priv->regexdev->data->dev_private = priv;
 165         priv->regexdev->state = RTE_REGEXDEV_READY;
 166         DRV_LOG(INFO, "RegEx GGA is %s.",
 167                 priv->has_umr ? "supported" : "unsupported");
 168         return 0;
 169
 170 error:
 171         if (priv->uar)
 172                 mlx5_glue->devx_free_uar(priv->uar);
 173         if (priv->regexdev)
 174                 rte_regexdev_unregister(priv->regexdev);
 175 dev_error:
 176         if (priv)
 177                 rte_free(priv);
 178         return -rte_errno;
 179 }
 180
 181 static int
 182 mlx5_regex_dev_remove(struct mlx5_common_device *cdev)
 183 {
 184         char name[RTE_REGEXDEV_NAME_MAX_LEN];
 185         struct rte_regexdev *dev;
 186         struct mlx5_regex_priv *priv = NULL;
 187
 188         mlx5_regex_get_name(name, cdev->dev);
 189         dev = rte_regexdev_get_device_by_name(name);
 190         if (!dev)
 191                 return 0;
 192         priv = dev->data->dev_private;
 193         if (priv) {
 194                 if (priv->uar)
 195                         mlx5_glue->devx_free_uar(priv->uar);
 196                 if (priv->regexdev)
 197                         rte_regexdev_unregister(priv->regexdev);
 198                 rte_free(priv);
 199         }
 200         return 0;
 201 }
 202
 203 static const struct rte_pci_id mlx5_regex_pci_id_map[] = {
 204         {
 205                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
 206                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF)
 207         },
 208         {
 209                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
 210                                 PCI_DEVICE_ID_MELLANOX_CONNECTX7BF)
 211         },
 212         {
 213                 .vendor_id = 0
 214         }
 215 };
 216
 217 static struct mlx5_class_driver mlx5_regex_driver = {
 218         .drv_class = MLX5_CLASS_REGEX,
 219         .name = RTE_STR(MLX5_REGEX_DRIVER_NAME),
 220         .id_table = mlx5_regex_pci_id_map,
 221         .probe = mlx5_regex_dev_probe,
 222         .remove = mlx5_regex_dev_remove,
 223 };
 224
 225 RTE_INIT(rte_mlx5_regex_init)
 226 {
 227         mlx5_common_init();
 228         if (mlx5_glue)
 229                 mlx5_class_driver_register(&mlx5_regex_driver);
 230 }
 231
 232 RTE_LOG_REGISTER_DEFAULT(mlx5_regex_logtype, NOTICE)
 233 RTE_PMD_EXPORT_NAME(MLX5_REGEX_DRIVER_NAME, __COUNTER__);
 234 RTE_PMD_REGISTER_PCI_TABLE(MLX5_REGEX_DRIVER_NAME, mlx5_regex_pci_id_map);
 235 RTE_PMD_REGISTER_KMOD_DEP(MLX5_REGEX_DRIVER_NAME, "* ib_uverbs & mlx5_core & mlx5_ib");