1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
8 #include <rte_regexdev.h>
10 #include <infiniband/verbs.h>
11 #include <infiniband/mlx5dv.h>
13 #include <mlx5_common.h>
14 #include <mlx5_common_mr.h>
15 #include <mlx5_common_devx.h>
18 #include "mlx5_regex_utils.h"
20 struct mlx5_regex_sq {
21 uint16_t log_nb_desc; /* Log 2 number of desc for this object. */
22 struct mlx5_devx_sq sq_obj; /* The SQ DevX object. */
28 struct mlx5_regex_cq {
29 uint32_t log_nb_desc; /* Log 2 number of desc for this object. */
30 struct mlx5_devx_cq cq_obj; /* The CQ DevX object. */
34 struct mlx5_regex_qp {
35 uint32_t flags; /* QP user flags. */
36 uint32_t nb_desc; /* Total number of desc for this qp. */
37 struct mlx5_regex_sq *sqs; /* Pointer to sq array. */
38 uint16_t nb_obj; /* Number of sq objects. */
39 struct mlx5_regex_cq cq; /* CQ struct. */
41 struct mlx5_regex_job *jobs;
42 struct ibv_mr *metadata;
43 struct ibv_mr *outputs;
44 struct ibv_mr *imkey_addr; /* Indirect mkey array region. */
46 struct mlx5_mr_ctrl mr_ctrl;
49 struct mlx5_regex_db {
50 void *ptr; /* Pointer to the db memory. */
51 uint32_t len; /* The memory len. */
52 bool active; /* Active flag. */
53 uint8_t db_assigned_to_eng_num;
54 /**< To which engine the db is connected. */
55 struct mlx5_regex_umem umem;
56 /**< The umem struct. */
59 struct mlx5_regex_priv {
60 TAILQ_ENTRY(mlx5_regex_priv) next;
61 struct ibv_context *ctx; /* Device context. */
62 struct rte_regexdev *regexdev; /* Pointer to the RegEx dev. */
63 uint16_t nb_queues; /* Number of queues. */
64 struct mlx5_regex_qp *qps; /* Pointer to the qp array. */
65 uint16_t nb_max_matches; /* Max number of matches. */
66 enum mlx5_rxp_program_mode prog_mode;
67 struct mlx5_regex_db db[MLX5_RXP_MAX_ENGINES +
69 uint32_t nb_engines; /* Number of RegEx engines. */
70 struct mlx5dv_devx_uar *uar; /* UAR object. */
72 TAILQ_ENTRY(mlx5_regex_priv) mem_event_cb;
73 /**< Called by memory event callback. */
74 struct mlx5_mr_share_cache mr_scache; /* Global shared MR cache. */
75 uint8_t is_bf2; /* The device is BF2 device. */
76 uint8_t sq_ts_format; /* Whether SQ supports timestamp formats. */
77 uint8_t has_umr; /* The device supports UMR. */
80 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
82 regex_get_pdn(void *pd, uint32_t *pdn)
84 struct mlx5dv_obj obj;
85 struct mlx5dv_pd pd_info;
89 obj.pd.out = &pd_info;
90 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
92 DRV_LOG(DEBUG, "Fail to get PD object info");
101 int mlx5_regex_start(struct rte_regexdev *dev);
102 int mlx5_regex_stop(struct rte_regexdev *dev);
103 int mlx5_regex_close(struct rte_regexdev *dev);
106 int mlx5_regex_info_get(struct rte_regexdev *dev,
107 struct rte_regexdev_info *info);
108 int mlx5_regex_configure(struct rte_regexdev *dev,
109 const struct rte_regexdev_config *cfg);
110 int mlx5_regex_rules_db_import(struct rte_regexdev *dev,
111 const char *rule_db, uint32_t rule_db_len);
113 /* mlx5_regex_devx.c */
114 int mlx5_devx_regex_register_write(struct ibv_context *ctx, int engine_id,
115 uint32_t addr, uint32_t data);
116 int mlx5_devx_regex_register_read(struct ibv_context *ctx, int engine_id,
117 uint32_t addr, uint32_t *data);
118 int mlx5_devx_regex_database_stop(void *ctx, uint8_t engine);
119 int mlx5_devx_regex_database_resume(void *ctx, uint8_t engine);
120 int mlx5_devx_regex_database_program(void *ctx, uint8_t engine,
121 uint32_t umem_id, uint64_t umem_offset);
123 /* mlx5_regex_control.c */
124 int mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind,
125 const struct rte_regexdev_qp_conf *cfg);
127 /* mlx5_regex_fastpath.c */
128 int mlx5_regexdev_setup_fastpath(struct mlx5_regex_priv *priv, uint32_t qp_id);
129 void mlx5_regexdev_teardown_fastpath(struct mlx5_regex_priv *priv,
131 uint16_t mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id,
132 struct rte_regex_ops **ops, uint16_t nb_ops);
133 uint16_t mlx5_regexdev_dequeue(struct rte_regexdev *dev, uint16_t qp_id,
134 struct rte_regex_ops **ops, uint16_t nb_ops);
135 uint16_t mlx5_regexdev_enqueue_gga(struct rte_regexdev *dev, uint16_t qp_id,
136 struct rte_regex_ops **ops, uint16_t nb_ops);
137 #endif /* MLX5_REGEX_H */