1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
9 #include <rte_malloc.h>
10 #include <rte_regexdev.h>
11 #include <rte_regexdev_core.h>
12 #include <rte_regexdev_driver.h>
14 #include <mlx5_common.h>
15 #include <mlx5_glue.h>
16 #include <mlx5_devx_cmds.h>
18 #include <mlx5_common_os.h>
20 #include "mlx5_regex.h"
21 #include "mlx5_regex_utils.h"
22 #include "mlx5_rxp_csrs.h"
25 #define MLX5_REGEX_NUM_WQE_PER_PAGE (4096/64)
28 * Returns the number of qp obj to be created.
31 * The number of descriptors for the queue.
34 * The number of obj to be created.
37 regex_ctrl_get_nb_obj(uint16_t nb_desc)
39 return ((nb_desc / MLX5_REGEX_NUM_WQE_PER_PAGE) +
40 !!(nb_desc % MLX5_REGEX_NUM_WQE_PER_PAGE));
47 * Pointer to the priv object.
49 * Pointer to the CQ to be destroyed.
52 * 0 on success, a negative errno value otherwise and rte_errno is set.
55 regex_ctrl_destroy_cq(struct mlx5_regex_priv *priv, struct mlx5_regex_cq *cq)
58 mlx5_glue->devx_umem_dereg(cq->cqe_umem);
62 rte_free((void *)(uintptr_t)cq->cqe);
66 mlx5_release_dbr(&priv->dbrpgs, cq->dbr_umem, cq->dbr_offset);
70 mlx5_devx_cmd_destroy(cq->obj);
77 * create the CQ object.
80 * Pointer to the priv object.
82 * Pointer to the CQ to be created.
85 * 0 on success, a negative errno value otherwise and rte_errno is set.
88 regex_ctrl_create_cq(struct mlx5_regex_priv *priv, struct mlx5_regex_cq *cq)
90 struct mlx5_devx_cq_attr attr = {
95 struct mlx5_devx_dbr_page *dbr_page = NULL;
97 size_t pgsize = sysconf(_SC_PAGESIZE);
98 uint32_t cq_size = 1 << cq->log_nb_desc;
101 cq->dbr_offset = mlx5_get_dbr(priv->ctx, &priv->dbrpgs, &dbr_page);
102 if (cq->dbr_offset < 0) {
103 DRV_LOG(ERR, "Can't allocate cq door bell record.");
107 cq->dbr_umem = mlx5_os_get_umem_id(dbr_page->umem);
108 cq->dbr = (uint32_t *)((uintptr_t)dbr_page->dbrs +
109 (uintptr_t)cq->dbr_offset);
111 buf = rte_calloc(NULL, 1, sizeof(struct mlx5_cqe) * cq_size, 4096);
113 DRV_LOG(ERR, "Can't allocate cqe buffer.");
118 for (i = 0; i < cq_size; i++)
119 cq->cqe[i].op_own = 0xff;
120 cq->cqe_umem = mlx5_glue->devx_umem_reg(priv->ctx, buf,
121 sizeof(struct mlx5_cqe) *
125 DRV_LOG(ERR, "Can't register cqe mem.");
129 attr.db_umem_offset = cq->dbr_offset;
130 attr.db_umem_id = cq->dbr_umem;
131 attr.q_umem_id = mlx5_os_get_umem_id(cq->cqe_umem);
132 attr.log_cq_size = cq->log_nb_desc;
133 attr.uar_page_id = priv->uar->page_id;
134 attr.log_page_size = rte_log2_u32(pgsize);
135 cq->obj = mlx5_devx_cmd_create_cq(priv->ctx, &attr);
137 DRV_LOG(ERR, "Can't create cq object.");
144 mlx5_glue->devx_umem_dereg(cq->cqe_umem);
148 mlx5_release_dbr(&priv->dbrpgs, cq->dbr_umem, cq->dbr_offset);
152 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
154 regex_get_pdn(void *pd, uint32_t *pdn)
156 struct mlx5dv_obj obj;
157 struct mlx5dv_pd pd_info;
161 obj.pd.out = &pd_info;
162 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
164 DRV_LOG(DEBUG, "Fail to get PD object info");
173 * create the SQ object.
176 * Pointer to the priv object.
178 * Pointer to the QP element
180 * The index of the queue.
182 * Log 2 of the number of descriptors to be used.
185 * 0 on success, a negative errno value otherwise and rte_errno is set.
188 regex_ctrl_create_sq(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
189 uint16_t q_ind, uint16_t log_nb_desc)
191 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
192 struct mlx5_devx_create_sq_attr attr = { 0 };
193 struct mlx5_devx_modify_sq_attr modify_attr = { 0 };
194 struct mlx5_devx_wq_attr *wq_attr = &attr.wq_attr;
195 struct mlx5_devx_dbr_page *dbr_page = NULL;
196 struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
202 sq->log_nb_desc = log_nb_desc;
203 sq_size = 1 << sq->log_nb_desc;
204 sq->dbr_offset = mlx5_get_dbr(priv->ctx, &priv->dbrpgs, &dbr_page);
205 if (sq->dbr_offset < 0) {
206 DRV_LOG(ERR, "Can't allocate sq door bell record.");
210 sq->dbr_umem = mlx5_os_get_umem_id(dbr_page->umem);
211 sq->dbr = (uint32_t *)((uintptr_t)dbr_page->dbrs +
212 (uintptr_t)sq->dbr_offset);
214 buf = rte_calloc(NULL, 1, 64 * sq_size, 4096);
216 DRV_LOG(ERR, "Can't allocate wqe buffer.");
221 sq->wqe_umem = mlx5_glue->devx_umem_reg(priv->ctx, buf, 64 * sq_size,
226 DRV_LOG(ERR, "Can't register wqe mem.");
230 attr.state = MLX5_SQC_STATE_RST;
233 attr.user_index = q_ind;
234 attr.cqn = qp->cq.obj->id;
235 wq_attr->uar_page = priv->uar->page_id;
236 regex_get_pdn(priv->pd, &pd_num);
237 wq_attr->pd = pd_num;
238 wq_attr->wq_type = MLX5_WQ_TYPE_CYCLIC;
239 wq_attr->dbr_umem_id = sq->dbr_umem;
240 wq_attr->dbr_addr = sq->dbr_offset;
241 wq_attr->dbr_umem_valid = 1;
242 wq_attr->wq_umem_id = mlx5_os_get_umem_id(sq->wqe_umem);
243 wq_attr->wq_umem_offset = 0;
244 wq_attr->wq_umem_valid = 1;
245 wq_attr->log_wq_stride = 6;
246 wq_attr->log_wq_sz = sq->log_nb_desc;
247 sq->obj = mlx5_devx_cmd_create_sq(priv->ctx, &attr);
249 DRV_LOG(ERR, "Can't create sq object.");
253 modify_attr.state = MLX5_SQC_STATE_RDY;
254 ret = mlx5_devx_cmd_modify_sq(sq->obj, &modify_attr);
256 DRV_LOG(ERR, "Can't change sq state to ready.");
264 mlx5_glue->devx_umem_dereg(sq->wqe_umem);
268 mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset);
275 DRV_LOG(ERR, "Cannot get pdn - no DV support.");
281 * Destroy the SQ object.
284 * Pointer to the priv object.
286 * Pointer to the QP element
288 * The index of the queue.
291 * 0 on success, a negative errno value otherwise and rte_errno is set.
294 regex_ctrl_destroy_sq(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
297 struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
300 mlx5_glue->devx_umem_dereg(sq->wqe_umem);
304 rte_free((void *)(uintptr_t)sq->wqe);
307 if (sq->dbr_offset) {
308 mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset);
312 mlx5_devx_cmd_destroy(sq->obj);
322 * Pointer to RegEx dev structure.
324 * The queue index to setup.
326 * The queue requested configuration.
329 * 0 on success, a negative errno value otherwise and rte_errno is set.
332 mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind,
333 const struct rte_regexdev_qp_conf *cfg)
335 struct mlx5_regex_priv *priv = dev->data->dev_private;
336 struct mlx5_regex_qp *qp;
341 qp = &priv->qps[qp_ind];
342 qp->flags = cfg->qp_conf_flags;
343 qp->cq.log_nb_desc = rte_log2_u32(cfg->nb_desc);
344 qp->nb_desc = 1 << qp->cq.log_nb_desc;
345 if (qp->flags & RTE_REGEX_QUEUE_PAIR_CFG_OOS_F)
346 qp->nb_obj = regex_ctrl_get_nb_obj(qp->nb_desc);
349 qp->sqs = rte_malloc(NULL,
350 qp->nb_obj * sizeof(struct mlx5_regex_sq), 64);
352 DRV_LOG(ERR, "Can't allocate sq array memory.");
356 log_desc = rte_log2_u32(qp->nb_desc / qp->nb_obj);
357 ret = regex_ctrl_create_cq(priv, &qp->cq);
359 DRV_LOG(ERR, "Can't create cq.");
362 for (i = 0; i < qp->nb_obj; i++) {
363 ret = regex_ctrl_create_sq(priv, qp, i, log_desc);
365 DRV_LOG(ERR, "Can't create sq.");
370 ret = mlx5_regexdev_setup_fastpath(priv, qp_ind);
372 DRV_LOG(ERR, "Fail to setup fastpath.");
378 for (i = 0; i < qp->nb_obj; i++)
379 ret = regex_ctrl_destroy_sq(priv, qp, i);
381 regex_ctrl_destroy_cq(priv, &qp->cq);