1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2019 Mellanox Technologies, Ltd
6 #include <rte_malloc.h>
8 #include <rte_common.h>
9 #include <rte_sched_common.h>
12 #include <mlx5_common.h>
14 #include "mlx5_vdpa_utils.h"
15 #include "mlx5_vdpa.h"
18 mlx5_vdpa_mem_dereg(struct mlx5_vdpa_priv *priv)
20 struct mlx5_vdpa_query_mr *entry;
21 struct mlx5_vdpa_query_mr *next;
23 entry = SLIST_FIRST(&priv->mr_list);
25 next = SLIST_NEXT(entry, next);
26 claim_zero(mlx5_devx_cmd_destroy(entry->mkey));
27 if (!entry->is_indirect)
28 claim_zero(mlx5_glue->devx_umem_dereg(entry->umem));
29 SLIST_REMOVE(&priv->mr_list, entry, mlx5_vdpa_query_mr, next);
33 SLIST_INIT(&priv->mr_list);
35 claim_zero(mlx5_glue->dereg_mr(priv->null_mr));
45 mlx5_vdpa_regions_addr_cmp(const void *a, const void *b)
47 const struct rte_vhost_mem_region *region_a = a;
48 const struct rte_vhost_mem_region *region_b = b;
50 if (region_a->guest_phys_addr < region_b->guest_phys_addr)
52 if (region_a->guest_phys_addr > region_b->guest_phys_addr)
57 #define KLM_NUM_MAX_ALIGN(sz) (RTE_ALIGN_CEIL(sz, MLX5_MAX_KLM_BYTE_COUNT) / \
58 MLX5_MAX_KLM_BYTE_COUNT)
61 * Allocate and sort the region list and choose indirect mkey mode:
62 * 1. Calculate GCD, guest memory size and indirect mkey entries num per mode.
63 * 2. Align GCD to the maximum allowed size(2G) and to be power of 2.
64 * 2. Decide the indirect mkey mode according to the next rules:
65 * a. If both KLM_FBS entries number and KLM entries number are bigger
66 * than the maximum allowed(MLX5_DEVX_MAX_KLM_ENTRIES) - error.
67 * b. KLM mode if KLM_FBS entries number is bigger than the maximum
68 * allowed(MLX5_DEVX_MAX_KLM_ENTRIES).
69 * c. KLM mode if GCD is smaller than the minimum allowed(4K).
70 * d. KLM mode if the total size of KLM entries is in one cache line
71 * and the total size of KLM_FBS entries is not in one cache line.
72 * e. Otherwise, KLM_FBS mode.
74 static struct rte_vhost_memory *
75 mlx5_vdpa_vhost_mem_regions_prepare(int vid, uint8_t *mode, uint64_t *mem_size,
76 uint64_t *gcd, uint32_t *entries_num)
78 struct rte_vhost_memory *mem;
80 uint64_t klm_entries_num = 0;
81 uint64_t klm_fbs_entries_num;
83 int ret = rte_vhost_get_mem_table(vid, &mem);
86 DRV_LOG(ERR, "Failed to get VM memory layout vid =%d.", vid);
90 qsort(mem->regions, mem->nregions, sizeof(mem->regions[0]),
91 mlx5_vdpa_regions_addr_cmp);
92 *mem_size = (mem->regions[(mem->nregions - 1)].guest_phys_addr) +
93 (mem->regions[(mem->nregions - 1)].size) -
94 (mem->regions[0].guest_phys_addr);
96 for (i = 0; i < mem->nregions; ++i) {
97 DRV_LOG(INFO, "Region %u: HVA 0x%" PRIx64 ", GPA 0x%" PRIx64
98 ", size 0x%" PRIx64 ".", i,
99 mem->regions[i].host_user_addr,
100 mem->regions[i].guest_phys_addr, mem->regions[i].size);
103 size = mem->regions[i].guest_phys_addr -
104 (mem->regions[i - 1].guest_phys_addr +
105 mem->regions[i - 1].size);
106 *gcd = rte_get_gcd(*gcd, size);
107 klm_entries_num += KLM_NUM_MAX_ALIGN(size);
109 size = mem->regions[i].size;
110 *gcd = rte_get_gcd(*gcd, size);
111 klm_entries_num += KLM_NUM_MAX_ALIGN(size);
113 if (*gcd > MLX5_MAX_KLM_BYTE_COUNT)
114 *gcd = rte_get_gcd(*gcd, MLX5_MAX_KLM_BYTE_COUNT);
115 if (!RTE_IS_POWER_OF_2(*gcd)) {
116 uint64_t candidate_gcd = rte_align64prevpow2(*gcd);
118 while (candidate_gcd > 1 && (*gcd % candidate_gcd))
120 DRV_LOG(DEBUG, "GCD 0x%" PRIx64 " is not power of 2. Adjusted "
121 "GCD is 0x%" PRIx64 ".", *gcd, candidate_gcd);
122 *gcd = candidate_gcd;
124 klm_fbs_entries_num = *mem_size / *gcd;
125 if (*gcd < MLX5_MIN_KLM_FIXED_BUFFER_SIZE || klm_fbs_entries_num >
126 MLX5_DEVX_MAX_KLM_ENTRIES ||
127 ((klm_entries_num * sizeof(struct mlx5_klm)) <=
128 RTE_CACHE_LINE_SIZE && (klm_fbs_entries_num *
129 sizeof(struct mlx5_klm)) >
130 RTE_CACHE_LINE_SIZE)) {
131 *mode = MLX5_MKC_ACCESS_MODE_KLM;
132 *entries_num = klm_entries_num;
133 DRV_LOG(INFO, "Indirect mkey mode is KLM.");
135 *mode = MLX5_MKC_ACCESS_MODE_KLM_FBS;
136 *entries_num = klm_fbs_entries_num;
137 DRV_LOG(INFO, "Indirect mkey mode is KLM Fixed Buffer Size.");
139 DRV_LOG(DEBUG, "Memory registration information: nregions = %u, "
140 "mem_size = 0x%" PRIx64 ", GCD = 0x%" PRIx64
141 ", klm_fbs_entries_num = 0x%" PRIx64 ", klm_entries_num = 0x%"
142 PRIx64 ".", mem->nregions, *mem_size, *gcd, klm_fbs_entries_num,
144 if (*entries_num > MLX5_DEVX_MAX_KLM_ENTRIES) {
145 DRV_LOG(ERR, "Failed to prepare memory of vid %d - memory is "
146 "too fragmented.", vid);
153 #define KLM_SIZE_MAX_ALIGN(sz) ((sz) > MLX5_MAX_KLM_BYTE_COUNT ? \
154 MLX5_MAX_KLM_BYTE_COUNT : (sz))
157 * The target here is to group all the physical memory regions of the
158 * virtio device in one indirect mkey.
159 * For KLM Fixed Buffer Size mode (HW find the translation entry in one
160 * read according to the guest phisical address):
161 * All the sub-direct mkeys of it must be in the same size, hence, each
162 * one of them should be in the GCD size of all the virtio memory
163 * regions and the holes between them.
164 * For KLM mode (each entry may be in different size so HW must iterate
166 * Each virtio memory region and each hole between them have one entry,
167 * just need to cover the maximum allowed size(2G) by splitting entries
168 * which their associated memory regions are bigger than 2G.
169 * It means that each virtio memory region may be mapped to more than
170 * one direct mkey in the 2 modes.
171 * All the holes of invalid memory between the virtio memory regions
172 * will be mapped to the null memory region for security.
175 mlx5_vdpa_mem_register(struct mlx5_vdpa_priv *priv)
177 struct mlx5_devx_mkey_attr mkey_attr;
178 struct mlx5_vdpa_query_mr *entry = NULL;
179 struct rte_vhost_mem_region *reg = NULL;
181 uint32_t entries_num = 0;
189 struct rte_vhost_memory *mem = mlx5_vdpa_vhost_mem_regions_prepare
190 (priv->vid, &mode, &mem_size, &gcd, &entries_num);
191 struct mlx5_klm klm_array[entries_num];
196 priv->null_mr = mlx5_glue->alloc_null_mr(priv->pd);
197 if (!priv->null_mr) {
198 DRV_LOG(ERR, "Failed to allocate null MR.");
202 DRV_LOG(DEBUG, "Dump fill Mkey = %u.", priv->null_mr->lkey);
203 memset(&mkey_attr, 0, sizeof(mkey_attr));
204 for (i = 0; i < mem->nregions; i++) {
205 reg = &mem->regions[i];
206 entry = rte_zmalloc(__func__, sizeof(*entry), 0);
209 DRV_LOG(ERR, "Failed to allocate mem entry memory.");
212 entry->umem = mlx5_glue->devx_umem_reg(priv->ctx,
213 (void *)(uintptr_t)reg->host_user_addr,
214 reg->size, IBV_ACCESS_LOCAL_WRITE);
216 DRV_LOG(ERR, "Failed to register Umem by Devx.");
220 mkey_attr.addr = (uintptr_t)(reg->guest_phys_addr);
221 mkey_attr.size = reg->size;
222 mkey_attr.umem_id = entry->umem->umem_id;
223 mkey_attr.pd = priv->pdn;
224 mkey_attr.pg_access = 1;
225 entry->mkey = mlx5_devx_cmd_mkey_create(priv->ctx, &mkey_attr);
227 DRV_LOG(ERR, "Failed to create direct Mkey.");
231 entry->addr = (void *)(uintptr_t)(reg->host_user_addr);
232 entry->length = reg->size;
233 entry->is_indirect = 0;
236 uint64_t empty_region_sz = reg->guest_phys_addr -
237 (mem->regions[i - 1].guest_phys_addr +
238 mem->regions[i - 1].size);
240 if (empty_region_sz > 0) {
241 sadd = mem->regions[i - 1].guest_phys_addr +
242 mem->regions[i - 1].size;
243 klm_size = mode == MLX5_MKC_ACCESS_MODE_KLM ?
244 KLM_SIZE_MAX_ALIGN(empty_region_sz) : gcd;
245 for (k = 0; k < empty_region_sz;
247 klm_array[klm_index].byte_count =
248 k + klm_size > empty_region_sz ?
249 empty_region_sz - k : klm_size;
250 klm_array[klm_index].mkey =
252 klm_array[klm_index].address = sadd + k;
257 klm_size = mode == MLX5_MKC_ACCESS_MODE_KLM ?
258 KLM_SIZE_MAX_ALIGN(reg->size) : gcd;
259 for (k = 0; k < reg->size; k += klm_size) {
260 klm_array[klm_index].byte_count = k + klm_size >
261 reg->size ? reg->size - k : klm_size;
262 klm_array[klm_index].mkey = entry->mkey->id;
263 klm_array[klm_index].address = reg->guest_phys_addr + k;
266 SLIST_INSERT_HEAD(&priv->mr_list, entry, next);
268 mkey_attr.addr = (uintptr_t)(mem->regions[0].guest_phys_addr);
269 mkey_attr.size = mem_size;
270 mkey_attr.pd = priv->pdn;
271 mkey_attr.umem_id = 0;
272 /* Must be zero for KLM mode. */
273 mkey_attr.log_entity_size = mode == MLX5_MKC_ACCESS_MODE_KLM_FBS ?
274 rte_log2_u64(gcd) : 0;
275 mkey_attr.pg_access = 0;
276 mkey_attr.klm_array = klm_array;
277 mkey_attr.klm_num = klm_index;
278 entry = rte_zmalloc(__func__, sizeof(*entry), 0);
280 DRV_LOG(ERR, "Failed to allocate memory for indirect entry.");
284 entry->mkey = mlx5_devx_cmd_mkey_create(priv->ctx, &mkey_attr);
286 DRV_LOG(ERR, "Failed to create indirect Mkey.");
290 entry->is_indirect = 1;
291 SLIST_INSERT_HEAD(&priv->mr_list, entry, next);
292 priv->gpa_mkey_index = entry->mkey->id;
297 mlx5_devx_cmd_destroy(entry->mkey);
299 mlx5_glue->devx_umem_dereg(entry->umem);
302 mlx5_vdpa_mem_dereg(priv);