1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2019 Mellanox Technologies, Ltd
6 #include <rte_malloc.h>
8 #include <rte_common.h>
9 #include <rte_sched_common.h>
12 #include <mlx5_common.h>
14 #include "mlx5_vdpa_utils.h"
15 #include "mlx5_vdpa.h"
18 mlx5_vdpa_mem_dereg(struct mlx5_vdpa_priv *priv)
20 struct mlx5_vdpa_query_mr *entry;
21 struct mlx5_vdpa_query_mr *next;
23 entry = SLIST_FIRST(&priv->mr_list);
25 next = SLIST_NEXT(entry, next);
26 if (entry->is_indirect)
27 claim_zero(mlx5_devx_cmd_destroy(entry->mkey));
29 claim_zero(mlx5_glue->dereg_mr(entry->mr));
30 SLIST_REMOVE(&priv->mr_list, entry, mlx5_vdpa_query_mr, next);
34 SLIST_INIT(&priv->mr_list);
36 mlx5_os_wrapped_mkey_destroy(&priv->lm_mr);
38 claim_zero(mlx5_glue->dereg_mr(priv->null_mr));
48 mlx5_vdpa_regions_addr_cmp(const void *a, const void *b)
50 const struct rte_vhost_mem_region *region_a = a;
51 const struct rte_vhost_mem_region *region_b = b;
53 if (region_a->guest_phys_addr < region_b->guest_phys_addr)
55 if (region_a->guest_phys_addr > region_b->guest_phys_addr)
60 #define KLM_NUM_MAX_ALIGN(sz) (RTE_ALIGN_CEIL(sz, MLX5_MAX_KLM_BYTE_COUNT) / \
61 MLX5_MAX_KLM_BYTE_COUNT)
64 * Allocate and sort the region list and choose indirect mkey mode:
65 * 1. Calculate GCD, guest memory size and indirect mkey entries num per mode.
66 * 2. Align GCD to the maximum allowed size(2G) and to be power of 2.
67 * 2. Decide the indirect mkey mode according to the next rules:
68 * a. If both KLM_FBS entries number and KLM entries number are bigger
69 * than the maximum allowed(MLX5_DEVX_MAX_KLM_ENTRIES) - error.
70 * b. KLM mode if KLM_FBS entries number is bigger than the maximum
71 * allowed(MLX5_DEVX_MAX_KLM_ENTRIES).
72 * c. KLM mode if GCD is smaller than the minimum allowed(4K).
73 * d. KLM mode if the total size of KLM entries is in one cache line
74 * and the total size of KLM_FBS entries is not in one cache line.
75 * e. Otherwise, KLM_FBS mode.
77 static struct rte_vhost_memory *
78 mlx5_vdpa_vhost_mem_regions_prepare(int vid, uint8_t *mode, uint64_t *mem_size,
79 uint64_t *gcd, uint32_t *entries_num)
81 struct rte_vhost_memory *mem;
83 uint64_t klm_entries_num = 0;
84 uint64_t klm_fbs_entries_num;
86 int ret = rte_vhost_get_mem_table(vid, &mem);
89 DRV_LOG(ERR, "Failed to get VM memory layout vid =%d.", vid);
93 qsort(mem->regions, mem->nregions, sizeof(mem->regions[0]),
94 mlx5_vdpa_regions_addr_cmp);
95 *mem_size = (mem->regions[(mem->nregions - 1)].guest_phys_addr) +
96 (mem->regions[(mem->nregions - 1)].size) -
97 (mem->regions[0].guest_phys_addr);
99 for (i = 0; i < mem->nregions; ++i) {
100 DRV_LOG(INFO, "Region %u: HVA 0x%" PRIx64 ", GPA 0x%" PRIx64
101 ", size 0x%" PRIx64 ".", i,
102 mem->regions[i].host_user_addr,
103 mem->regions[i].guest_phys_addr, mem->regions[i].size);
106 size = mem->regions[i].guest_phys_addr -
107 (mem->regions[i - 1].guest_phys_addr +
108 mem->regions[i - 1].size);
109 *gcd = rte_get_gcd64(*gcd, size);
110 klm_entries_num += KLM_NUM_MAX_ALIGN(size);
112 size = mem->regions[i].size;
113 *gcd = rte_get_gcd64(*gcd, size);
114 klm_entries_num += KLM_NUM_MAX_ALIGN(size);
116 if (*gcd > MLX5_MAX_KLM_BYTE_COUNT)
117 *gcd = rte_get_gcd64(*gcd, MLX5_MAX_KLM_BYTE_COUNT);
118 if (!RTE_IS_POWER_OF_2(*gcd)) {
119 uint64_t candidate_gcd = rte_align64prevpow2(*gcd);
121 while (candidate_gcd > 1 && (*gcd % candidate_gcd))
123 DRV_LOG(DEBUG, "GCD 0x%" PRIx64 " is not power of 2. Adjusted "
124 "GCD is 0x%" PRIx64 ".", *gcd, candidate_gcd);
125 *gcd = candidate_gcd;
127 klm_fbs_entries_num = *mem_size / *gcd;
128 if (*gcd < MLX5_MIN_KLM_FIXED_BUFFER_SIZE || klm_fbs_entries_num >
129 MLX5_DEVX_MAX_KLM_ENTRIES ||
130 ((klm_entries_num * sizeof(struct mlx5_klm)) <=
131 RTE_CACHE_LINE_SIZE && (klm_fbs_entries_num *
132 sizeof(struct mlx5_klm)) >
133 RTE_CACHE_LINE_SIZE)) {
134 *mode = MLX5_MKC_ACCESS_MODE_KLM;
135 *entries_num = klm_entries_num;
136 DRV_LOG(INFO, "Indirect mkey mode is KLM.");
138 *mode = MLX5_MKC_ACCESS_MODE_KLM_FBS;
139 *entries_num = klm_fbs_entries_num;
140 DRV_LOG(INFO, "Indirect mkey mode is KLM Fixed Buffer Size.");
142 DRV_LOG(DEBUG, "Memory registration information: nregions = %u, "
143 "mem_size = 0x%" PRIx64 ", GCD = 0x%" PRIx64
144 ", klm_fbs_entries_num = 0x%" PRIx64 ", klm_entries_num = 0x%"
145 PRIx64 ".", mem->nregions, *mem_size, *gcd, klm_fbs_entries_num,
147 if (*entries_num > MLX5_DEVX_MAX_KLM_ENTRIES) {
148 DRV_LOG(ERR, "Failed to prepare memory of vid %d - memory is "
149 "too fragmented.", vid);
156 #define KLM_SIZE_MAX_ALIGN(sz) ((sz) > MLX5_MAX_KLM_BYTE_COUNT ? \
157 MLX5_MAX_KLM_BYTE_COUNT : (sz))
160 * The target here is to group all the physical memory regions of the
161 * virtio device in one indirect mkey.
162 * For KLM Fixed Buffer Size mode (HW find the translation entry in one
163 * read according to the guest phisical address):
164 * All the sub-direct mkeys of it must be in the same size, hence, each
165 * one of them should be in the GCD size of all the virtio memory
166 * regions and the holes between them.
167 * For KLM mode (each entry may be in different size so HW must iterate
169 * Each virtio memory region and each hole between them have one entry,
170 * just need to cover the maximum allowed size(2G) by splitting entries
171 * which their associated memory regions are bigger than 2G.
172 * It means that each virtio memory region may be mapped to more than
173 * one direct mkey in the 2 modes.
174 * All the holes of invalid memory between the virtio memory regions
175 * will be mapped to the null memory region for security.
178 mlx5_vdpa_mem_register(struct mlx5_vdpa_priv *priv)
180 struct mlx5_devx_mkey_attr mkey_attr;
181 struct mlx5_vdpa_query_mr *entry = NULL;
182 struct rte_vhost_mem_region *reg = NULL;
184 uint32_t entries_num = 0;
192 struct rte_vhost_memory *mem = mlx5_vdpa_vhost_mem_regions_prepare
193 (priv->vid, &mode, &mem_size, &gcd, &entries_num);
194 struct mlx5_klm klm_array[entries_num];
199 priv->null_mr = mlx5_glue->alloc_null_mr(priv->cdev->pd);
200 if (!priv->null_mr) {
201 DRV_LOG(ERR, "Failed to allocate null MR.");
205 DRV_LOG(DEBUG, "Dump fill Mkey = %u.", priv->null_mr->lkey);
206 for (i = 0; i < mem->nregions; i++) {
207 reg = &mem->regions[i];
208 entry = rte_zmalloc(__func__, sizeof(*entry), 0);
211 DRV_LOG(ERR, "Failed to allocate mem entry memory.");
214 entry->mr = mlx5_glue->reg_mr_iova(priv->cdev->pd,
215 (void *)(uintptr_t)(reg->host_user_addr),
216 reg->size, reg->guest_phys_addr,
217 IBV_ACCESS_LOCAL_WRITE);
219 DRV_LOG(ERR, "Failed to create direct Mkey.");
223 entry->is_indirect = 0;
226 uint64_t empty_region_sz = reg->guest_phys_addr -
227 (mem->regions[i - 1].guest_phys_addr +
228 mem->regions[i - 1].size);
230 if (empty_region_sz > 0) {
231 sadd = mem->regions[i - 1].guest_phys_addr +
232 mem->regions[i - 1].size;
233 klm_size = mode == MLX5_MKC_ACCESS_MODE_KLM ?
234 KLM_SIZE_MAX_ALIGN(empty_region_sz) : gcd;
235 for (k = 0; k < empty_region_sz;
237 klm_array[klm_index].byte_count =
238 k + klm_size > empty_region_sz ?
239 empty_region_sz - k : klm_size;
240 klm_array[klm_index].mkey =
242 klm_array[klm_index].address = sadd + k;
247 klm_size = mode == MLX5_MKC_ACCESS_MODE_KLM ?
248 KLM_SIZE_MAX_ALIGN(reg->size) : gcd;
249 for (k = 0; k < reg->size; k += klm_size) {
250 klm_array[klm_index].byte_count = k + klm_size >
251 reg->size ? reg->size - k : klm_size;
252 klm_array[klm_index].mkey = entry->mr->lkey;
253 klm_array[klm_index].address = reg->guest_phys_addr + k;
256 SLIST_INSERT_HEAD(&priv->mr_list, entry, next);
258 memset(&mkey_attr, 0, sizeof(mkey_attr));
259 mkey_attr.addr = (uintptr_t)(mem->regions[0].guest_phys_addr);
260 mkey_attr.size = mem_size;
261 mkey_attr.pd = priv->cdev->pdn;
262 mkey_attr.umem_id = 0;
263 /* Must be zero for KLM mode. */
264 mkey_attr.log_entity_size = mode == MLX5_MKC_ACCESS_MODE_KLM_FBS ?
265 rte_log2_u64(gcd) : 0;
266 mkey_attr.pg_access = 0;
267 mkey_attr.klm_array = klm_array;
268 mkey_attr.klm_num = klm_index;
269 entry = rte_zmalloc(__func__, sizeof(*entry), 0);
271 DRV_LOG(ERR, "Failed to allocate memory for indirect entry.");
275 entry->mkey = mlx5_devx_cmd_mkey_create(priv->cdev->ctx, &mkey_attr);
277 DRV_LOG(ERR, "Failed to create indirect Mkey.");
281 entry->is_indirect = 1;
282 SLIST_INSERT_HEAD(&priv->mr_list, entry, next);
283 priv->gpa_mkey_index = entry->mkey->id;
288 mlx5_vdpa_mem_dereg(priv);