1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2019 Mellanox Technologies, Ltd
7 #include <sys/eventfd.h>
9 #include <rte_malloc.h>
10 #include <rte_errno.h>
13 #include <mlx5_common.h>
15 #include "mlx5_vdpa_utils.h"
16 #include "mlx5_vdpa.h"
20 mlx5_vdpa_virtq_handler(void *cb_arg)
22 struct mlx5_vdpa_virtq *virtq = cb_arg;
23 struct mlx5_vdpa_priv *priv = virtq->priv;
27 if (rte_intr_fd_get(virtq->intr_handle) < 0)
31 nbytes = read(rte_intr_fd_get(virtq->intr_handle), &buf,
35 errno == EWOULDBLOCK ||
38 DRV_LOG(ERR, "Failed to read kickfd of virtq %d: %s",
39 virtq->index, strerror(errno));
43 rte_write32(virtq->index, priv->virtq_db_addr);
44 if (virtq->notifier_state == MLX5_VDPA_NOTIFIER_STATE_DISABLED) {
45 if (rte_vhost_host_notifier_ctrl(priv->vid, virtq->index, true))
46 virtq->notifier_state = MLX5_VDPA_NOTIFIER_STATE_ERR;
48 virtq->notifier_state =
49 MLX5_VDPA_NOTIFIER_STATE_ENABLED;
50 DRV_LOG(INFO, "Virtq %u notifier state is %s.", virtq->index,
51 virtq->notifier_state ==
52 MLX5_VDPA_NOTIFIER_STATE_ENABLED ? "enabled" :
55 DRV_LOG(DEBUG, "Ring virtq %u doorbell.", virtq->index);
59 mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq *virtq)
62 int retries = MLX5_VDPA_INTR_RETRIES;
65 if (rte_intr_fd_get(virtq->intr_handle) != -1) {
66 while (retries-- && ret == -EAGAIN) {
67 ret = rte_intr_callback_unregister(virtq->intr_handle,
68 mlx5_vdpa_virtq_handler,
71 DRV_LOG(DEBUG, "Try again to unregister fd %d "
72 "of virtq %d interrupt, retries = %d.",
73 rte_intr_fd_get(virtq->intr_handle),
74 (int)virtq->index, retries);
76 usleep(MLX5_VDPA_INTR_RETRIES_USEC);
79 rte_intr_fd_set(virtq->intr_handle, -1);
81 rte_intr_instance_free(virtq->intr_handle);
83 ret = mlx5_vdpa_virtq_stop(virtq->priv, virtq->index);
85 DRV_LOG(WARNING, "Failed to stop virtq %d.",
87 claim_zero(mlx5_devx_cmd_destroy(virtq->virtq));
90 for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
91 if (virtq->umems[i].obj)
92 claim_zero(mlx5_glue->devx_umem_dereg
93 (virtq->umems[i].obj));
94 rte_free(virtq->umems[i].buf);
96 memset(&virtq->umems, 0, sizeof(virtq->umems));
98 mlx5_vdpa_event_qp_destroy(&virtq->eqp);
99 virtq->notifier_state = MLX5_VDPA_NOTIFIER_STATE_DISABLED;
104 mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv)
107 struct mlx5_vdpa_virtq *virtq;
109 for (i = 0; i < priv->nr_virtqs; i++) {
110 virtq = &priv->virtqs[i];
111 mlx5_vdpa_virtq_unset(virtq);
113 claim_zero(mlx5_devx_cmd_destroy(virtq->counters));
115 for (i = 0; i < priv->num_lag_ports; i++) {
117 claim_zero(mlx5_devx_cmd_destroy(priv->tiss[i]));
118 priv->tiss[i] = NULL;
122 claim_zero(mlx5_devx_cmd_destroy(priv->td));
125 if (priv->virtq_db_addr) {
126 claim_zero(munmap(priv->virtq_db_addr, priv->var->length));
127 priv->virtq_db_addr = NULL;
130 memset(priv->virtqs, 0, sizeof(*virtq) * priv->nr_virtqs);
135 mlx5_vdpa_virtq_modify(struct mlx5_vdpa_virtq *virtq, int state)
137 struct mlx5_devx_virtq_attr attr = {
138 .type = MLX5_VIRTQ_MODIFY_TYPE_STATE,
139 .state = state ? MLX5_VIRTQ_STATE_RDY :
140 MLX5_VIRTQ_STATE_SUSPEND,
141 .queue_index = virtq->index,
144 return mlx5_devx_cmd_modify_virtq(virtq->virtq, &attr);
148 mlx5_vdpa_virtq_stop(struct mlx5_vdpa_priv *priv, int index)
150 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
155 ret = mlx5_vdpa_virtq_modify(virtq, 0);
158 virtq->stopped = true;
159 DRV_LOG(DEBUG, "vid %u virtq %u was stopped.", priv->vid, index);
160 return mlx5_vdpa_virtq_query(priv, index);
164 mlx5_vdpa_virtq_query(struct mlx5_vdpa_priv *priv, int index)
166 struct mlx5_devx_virtq_attr attr = {0};
167 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
170 if (mlx5_devx_cmd_query_virtq(virtq->virtq, &attr)) {
171 DRV_LOG(ERR, "Failed to query virtq %d.", index);
174 DRV_LOG(INFO, "Query vid %d vring %d: hw_available_idx=%d, "
175 "hw_used_index=%d", priv->vid, index,
176 attr.hw_available_index, attr.hw_used_index);
177 ret = rte_vhost_set_vring_base(priv->vid, index,
178 attr.hw_available_index,
181 DRV_LOG(ERR, "Failed to set virtq %d base.", index);
184 if (attr.state == MLX5_VIRTQ_STATE_ERROR)
185 DRV_LOG(WARNING, "vid %d vring %d hw error=%hhu",
186 priv->vid, index, attr.error_type);
191 mlx5_vdpa_hva_to_gpa(struct rte_vhost_memory *mem, uint64_t hva)
193 struct rte_vhost_mem_region *reg;
197 for (i = 0; i < mem->nregions; i++) {
198 reg = &mem->regions[i];
199 if (hva >= reg->host_user_addr &&
200 hva < reg->host_user_addr + reg->size) {
201 gpa = hva - reg->host_user_addr + reg->guest_phys_addr;
209 mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index)
211 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
212 struct rte_vhost_vring vq;
213 struct mlx5_devx_virtq_attr attr = {0};
217 uint16_t last_avail_idx;
218 uint16_t last_used_idx;
219 uint16_t event_num = MLX5_EVENT_TYPE_OBJECT_CHANGE;
222 ret = rte_vhost_get_vhost_vring(priv->vid, index, &vq);
225 virtq->index = index;
226 virtq->vq_size = vq.size;
227 attr.tso_ipv4 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4));
228 attr.tso_ipv6 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6));
229 attr.tx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_CSUM));
230 attr.rx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM));
231 attr.virtio_version_1_0 = !!(priv->features & (1ULL <<
232 VIRTIO_F_VERSION_1));
233 attr.type = (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) ?
234 MLX5_VIRTQ_TYPE_PACKED : MLX5_VIRTQ_TYPE_SPLIT;
236 * No need event QPs creation when the guest in poll mode or when the
237 * capability allows it.
239 attr.event_mode = vq.callfd != -1 || !(priv->caps.event_mode & (1 <<
240 MLX5_VIRTQ_EVENT_MODE_NO_MSIX)) ?
241 MLX5_VIRTQ_EVENT_MODE_QP :
242 MLX5_VIRTQ_EVENT_MODE_NO_MSIX;
243 if (attr.event_mode == MLX5_VIRTQ_EVENT_MODE_QP) {
244 ret = mlx5_vdpa_event_qp_create(priv, vq.size, vq.callfd,
247 DRV_LOG(ERR, "Failed to create event QPs for virtq %d.",
251 attr.qp_id = virtq->eqp.fw_qp->id;
253 DRV_LOG(INFO, "Virtq %d is, for sure, working by poll mode, no"
254 " need event QPs and event mechanism.", index);
256 if (priv->caps.queue_counters_valid) {
257 if (!virtq->counters)
258 virtq->counters = mlx5_devx_cmd_create_virtio_q_counters
260 if (!virtq->counters) {
261 DRV_LOG(ERR, "Failed to create virtq couners for virtq"
265 attr.counters_obj_id = virtq->counters->id;
267 /* Setup 3 UMEMs for each virtq. */
268 for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
269 virtq->umems[i].size = priv->caps.umems[i].a * vq.size +
270 priv->caps.umems[i].b;
271 virtq->umems[i].buf = rte_zmalloc(__func__,
272 virtq->umems[i].size, 4096);
273 if (!virtq->umems[i].buf) {
274 DRV_LOG(ERR, "Cannot allocate umem %d memory for virtq"
278 virtq->umems[i].obj = mlx5_glue->devx_umem_reg(priv->cdev->ctx,
280 virtq->umems[i].size,
281 IBV_ACCESS_LOCAL_WRITE);
282 if (!virtq->umems[i].obj) {
283 DRV_LOG(ERR, "Failed to register umem %d for virtq %u.",
287 attr.umems[i].id = virtq->umems[i].obj->umem_id;
288 attr.umems[i].offset = 0;
289 attr.umems[i].size = virtq->umems[i].size;
291 if (attr.type == MLX5_VIRTQ_TYPE_SPLIT) {
292 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
293 (uint64_t)(uintptr_t)vq.desc);
295 DRV_LOG(ERR, "Failed to get descriptor ring GPA.");
298 attr.desc_addr = gpa;
299 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
300 (uint64_t)(uintptr_t)vq.used);
302 DRV_LOG(ERR, "Failed to get GPA for used ring.");
305 attr.used_addr = gpa;
306 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
307 (uint64_t)(uintptr_t)vq.avail);
309 DRV_LOG(ERR, "Failed to get GPA for available ring.");
312 attr.available_addr = gpa;
314 ret = rte_vhost_get_vring_base(priv->vid, index, &last_avail_idx,
319 DRV_LOG(WARNING, "Couldn't get vring base, idx are set to 0");
321 DRV_LOG(INFO, "vid %d: Init last_avail_idx=%d, last_used_idx=%d for "
322 "virtq %d.", priv->vid, last_avail_idx,
323 last_used_idx, index);
325 attr.hw_available_index = last_avail_idx;
326 attr.hw_used_index = last_used_idx;
327 attr.q_size = vq.size;
328 attr.mkey = priv->gpa_mkey_index;
329 attr.tis_id = priv->tiss[(index / 2) % priv->num_lag_ports]->id;
330 attr.queue_index = index;
331 attr.pd = priv->cdev->pdn;
332 attr.hw_latency_mode = priv->hw_latency_mode;
333 attr.hw_max_latency_us = priv->hw_max_latency_us;
334 attr.hw_max_pending_comp = priv->hw_max_pending_comp;
335 virtq->virtq = mlx5_devx_cmd_create_virtq(priv->cdev->ctx, &attr);
339 claim_zero(rte_vhost_enable_guest_notification(priv->vid, index, 1));
340 if (mlx5_vdpa_virtq_modify(virtq, 1))
343 rte_write32(virtq->index, priv->virtq_db_addr);
344 /* Setup doorbell mapping. */
346 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
347 if (virtq->intr_handle == NULL) {
348 DRV_LOG(ERR, "Fail to allocate intr_handle");
352 if (rte_intr_fd_set(virtq->intr_handle, vq.kickfd))
355 if (rte_intr_fd_get(virtq->intr_handle) == -1) {
356 DRV_LOG(WARNING, "Virtq %d kickfd is invalid.", index);
358 if (rte_intr_type_set(virtq->intr_handle, RTE_INTR_HANDLE_EXT))
361 if (rte_intr_callback_register(virtq->intr_handle,
362 mlx5_vdpa_virtq_handler,
364 rte_intr_fd_set(virtq->intr_handle, -1);
365 DRV_LOG(ERR, "Failed to register virtq %d interrupt.",
369 DRV_LOG(DEBUG, "Register fd %d interrupt for virtq %d.",
370 rte_intr_fd_get(virtq->intr_handle),
374 /* Subscribe virtq error event. */
376 cookie = ((uint64_t)virtq->version << 32) + index;
377 ret = mlx5_glue->devx_subscribe_devx_event(priv->err_chnl,
382 DRV_LOG(ERR, "Failed to subscribe device %d virtq %d error event.",
387 virtq->stopped = false;
388 /* Initial notification to ask Qemu handling completed buffers. */
389 if (virtq->eqp.cq.callfd != -1)
390 eventfd_write(virtq->eqp.cq.callfd, (eventfd_t)1);
391 DRV_LOG(DEBUG, "vid %u virtq %u was created successfully.", priv->vid,
395 mlx5_vdpa_virtq_unset(virtq);
400 mlx5_vdpa_features_validate(struct mlx5_vdpa_priv *priv)
402 if (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) {
403 if (!(priv->caps.virtio_queue_type & (1 <<
404 MLX5_VIRTQ_TYPE_PACKED))) {
405 DRV_LOG(ERR, "Failed to configure PACKED mode for vdev "
406 "%d - it was not reported by HW/driver"
407 " capability.", priv->vid);
411 if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) {
412 if (!priv->caps.tso_ipv4) {
413 DRV_LOG(ERR, "Failed to enable TSO4 for vdev %d - TSO4"
414 " was not reported by HW/driver capability.",
419 if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) {
420 if (!priv->caps.tso_ipv6) {
421 DRV_LOG(ERR, "Failed to enable TSO6 for vdev %d - TSO6"
422 " was not reported by HW/driver capability.",
427 if (priv->features & (1ULL << VIRTIO_NET_F_CSUM)) {
428 if (!priv->caps.tx_csum) {
429 DRV_LOG(ERR, "Failed to enable CSUM for vdev %d - CSUM"
430 " was not reported by HW/driver capability.",
435 if (priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM)) {
436 if (!priv->caps.rx_csum) {
437 DRV_LOG(ERR, "Failed to enable GUEST CSUM for vdev %d"
438 " GUEST CSUM was not reported by HW/driver "
439 "capability.", priv->vid);
443 if (priv->features & (1ULL << VIRTIO_F_VERSION_1)) {
444 if (!priv->caps.virtio_version_1_0) {
445 DRV_LOG(ERR, "Failed to enable version 1 for vdev %d "
446 "version 1 was not reported by HW/driver"
447 " capability.", priv->vid);
455 mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv)
457 struct mlx5_devx_tis_attr tis_attr = {0};
458 struct ibv_context *ctx = priv->cdev->ctx;
460 uint16_t nr_vring = rte_vhost_get_vring_num(priv->vid);
461 int ret = rte_vhost_get_negotiated_features(priv->vid, &priv->features);
463 if (ret || mlx5_vdpa_features_validate(priv)) {
464 DRV_LOG(ERR, "Failed to configure negotiated features.");
467 if ((priv->features & (1ULL << VIRTIO_NET_F_CSUM)) == 0 &&
468 ((priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) > 0 ||
469 (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) > 0)) {
470 /* Packet may be corrupted if TSO is enabled without CSUM. */
471 DRV_LOG(INFO, "TSO is enabled without CSUM, force CSUM.");
472 priv->features |= (1ULL << VIRTIO_NET_F_CSUM);
474 if (nr_vring > priv->caps.max_num_virtio_queues * 2) {
475 DRV_LOG(ERR, "Do not support more than %d virtqs(%d).",
476 (int)priv->caps.max_num_virtio_queues * 2,
480 /* Always map the entire page. */
481 priv->virtq_db_addr = mmap(NULL, priv->var->length, PROT_READ |
482 PROT_WRITE, MAP_SHARED, ctx->cmd_fd,
483 priv->var->mmap_off);
484 if (priv->virtq_db_addr == MAP_FAILED) {
485 DRV_LOG(ERR, "Failed to map doorbell page %u.", errno);
486 priv->virtq_db_addr = NULL;
489 DRV_LOG(DEBUG, "VAR address of doorbell mapping is %p.",
490 priv->virtq_db_addr);
492 priv->td = mlx5_devx_cmd_create_td(ctx);
494 DRV_LOG(ERR, "Failed to create transport domain.");
497 tis_attr.transport_domain = priv->td->id;
498 for (i = 0; i < priv->num_lag_ports; i++) {
499 /* 0 is auto affinity, non-zero value to propose port. */
500 tis_attr.lag_tx_port_affinity = i + 1;
501 priv->tiss[i] = mlx5_devx_cmd_create_tis(ctx, &tis_attr);
502 if (!priv->tiss[i]) {
503 DRV_LOG(ERR, "Failed to create TIS %u.", i);
507 priv->nr_virtqs = nr_vring;
508 for (i = 0; i < nr_vring; i++)
509 if (priv->virtqs[i].enable && mlx5_vdpa_virtq_setup(priv, i))
513 mlx5_vdpa_virtqs_release(priv);
518 mlx5_vdpa_virtq_is_modified(struct mlx5_vdpa_priv *priv,
519 struct mlx5_vdpa_virtq *virtq)
521 struct rte_vhost_vring vq;
522 int ret = rte_vhost_get_vhost_vring(priv->vid, virtq->index, &vq);
526 if (vq.size != virtq->vq_size || vq.kickfd !=
527 rte_intr_fd_get(virtq->intr_handle))
529 if (virtq->eqp.cq.cq_obj.cq) {
530 if (vq.callfd != virtq->eqp.cq.callfd)
532 } else if (vq.callfd != -1) {
539 mlx5_vdpa_virtq_enable(struct mlx5_vdpa_priv *priv, int index, int enable)
541 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
544 DRV_LOG(INFO, "Update virtq %d status %sable -> %sable.", index,
545 virtq->enable ? "en" : "dis", enable ? "en" : "dis");
546 if (!priv->configured) {
547 virtq->enable = !!enable;
550 if (virtq->enable == !!enable) {
553 ret = mlx5_vdpa_virtq_is_modified(priv, virtq);
555 DRV_LOG(ERR, "Virtq %d modify check failed.", index);
560 DRV_LOG(INFO, "Virtq %d was modified, recreate it.", index);
564 if (is_virtq_recvq(virtq->index, priv->nr_virtqs)) {
565 ret = mlx5_vdpa_steer_update(priv);
567 DRV_LOG(WARNING, "Failed to disable steering "
568 "for virtq %d.", index);
570 mlx5_vdpa_virtq_unset(virtq);
573 ret = mlx5_vdpa_virtq_setup(priv, index);
575 DRV_LOG(ERR, "Failed to setup virtq %d.", index);
579 if (is_virtq_recvq(virtq->index, priv->nr_virtqs)) {
580 ret = mlx5_vdpa_steer_update(priv);
582 DRV_LOG(WARNING, "Failed to enable steering "
583 "for virtq %d.", index);
590 mlx5_vdpa_virtq_stats_get(struct mlx5_vdpa_priv *priv, int qid,
591 struct rte_vdpa_stat *stats, unsigned int n)
593 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
594 struct mlx5_devx_virtio_q_couners_attr attr = {0};
597 if (!virtq->counters) {
598 DRV_LOG(ERR, "Failed to read virtq %d statistics - virtq "
602 ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters, &attr);
604 DRV_LOG(ERR, "Failed to read virtq %d stats from HW.", qid);
607 ret = (int)RTE_MIN(n, (unsigned int)MLX5_VDPA_STATS_MAX);
608 if (ret == MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS)
610 stats[MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS] = (struct rte_vdpa_stat) {
611 .id = MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS,
612 .value = attr.received_desc - virtq->reset.received_desc,
614 if (ret == MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS)
616 stats[MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS] = (struct rte_vdpa_stat) {
617 .id = MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS,
618 .value = attr.completed_desc - virtq->reset.completed_desc,
620 if (ret == MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS)
622 stats[MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS] = (struct rte_vdpa_stat) {
623 .id = MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS,
624 .value = attr.bad_desc_errors - virtq->reset.bad_desc_errors,
626 if (ret == MLX5_VDPA_STATS_EXCEED_MAX_CHAIN)
628 stats[MLX5_VDPA_STATS_EXCEED_MAX_CHAIN] = (struct rte_vdpa_stat) {
629 .id = MLX5_VDPA_STATS_EXCEED_MAX_CHAIN,
630 .value = attr.exceed_max_chain - virtq->reset.exceed_max_chain,
632 if (ret == MLX5_VDPA_STATS_INVALID_BUFFER)
634 stats[MLX5_VDPA_STATS_INVALID_BUFFER] = (struct rte_vdpa_stat) {
635 .id = MLX5_VDPA_STATS_INVALID_BUFFER,
636 .value = attr.invalid_buffer - virtq->reset.invalid_buffer,
638 if (ret == MLX5_VDPA_STATS_COMPLETION_ERRORS)
640 stats[MLX5_VDPA_STATS_COMPLETION_ERRORS] = (struct rte_vdpa_stat) {
641 .id = MLX5_VDPA_STATS_COMPLETION_ERRORS,
642 .value = attr.error_cqes - virtq->reset.error_cqes,
648 mlx5_vdpa_virtq_stats_reset(struct mlx5_vdpa_priv *priv, int qid)
650 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
653 if (!virtq->counters) {
654 DRV_LOG(ERR, "Failed to read virtq %d statistics - virtq "
658 ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters,
661 DRV_LOG(ERR, "Failed to read virtq %d reset stats from HW.",