1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2019 Mellanox Technologies, Ltd
8 #include <rte_malloc.h>
12 #include <mlx5_common.h>
14 #include "mlx5_vdpa_utils.h"
15 #include "mlx5_vdpa.h"
19 mlx5_vdpa_virtq_handler(void *cb_arg)
21 struct mlx5_vdpa_virtq *virtq = cb_arg;
22 struct mlx5_vdpa_priv *priv = virtq->priv;
27 nbytes = read(virtq->intr_handle.fd, &buf, 8);
30 errno == EWOULDBLOCK ||
33 DRV_LOG(ERR, "Failed to read kickfd of virtq %d: %s",
34 virtq->index, strerror(errno));
38 rte_write32(virtq->index, priv->virtq_db_addr);
39 if (virtq->notifier_state == MLX5_VDPA_NOTIFIER_STATE_DISABLED) {
40 if (rte_vhost_host_notifier_ctrl(priv->vid, virtq->index, true))
41 virtq->notifier_state = MLX5_VDPA_NOTIFIER_STATE_ERR;
43 virtq->notifier_state =
44 MLX5_VDPA_NOTIFIER_STATE_ENABLED;
45 DRV_LOG(INFO, "Virtq %u notifier state is %s.", virtq->index,
46 virtq->notifier_state ==
47 MLX5_VDPA_NOTIFIER_STATE_ENABLED ? "enabled" :
50 DRV_LOG(DEBUG, "Ring virtq %u doorbell.", virtq->index);
54 mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq *virtq)
57 int retries = MLX5_VDPA_INTR_RETRIES;
60 if (virtq->intr_handle.fd != -1) {
61 while (retries-- && ret == -EAGAIN) {
62 ret = rte_intr_callback_unregister(&virtq->intr_handle,
63 mlx5_vdpa_virtq_handler,
66 DRV_LOG(DEBUG, "Try again to unregister fd %d "
67 "of virtq %d interrupt, retries = %d.",
68 virtq->intr_handle.fd,
69 (int)virtq->index, retries);
70 usleep(MLX5_VDPA_INTR_RETRIES_USEC);
73 virtq->intr_handle.fd = -1;
76 claim_zero(mlx5_devx_cmd_destroy(virtq->virtq));
78 for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
79 if (virtq->umems[i].obj)
80 claim_zero(mlx5_glue->devx_umem_dereg
81 (virtq->umems[i].obj));
82 if (virtq->umems[i].buf)
83 rte_free(virtq->umems[i].buf);
85 memset(&virtq->umems, 0, sizeof(virtq->umems));
86 if (virtq->counters) {
87 claim_zero(mlx5_devx_cmd_destroy(virtq->counters));
88 virtq->counters = NULL;
90 memset(&virtq->reset, 0, sizeof(virtq->reset));
92 mlx5_vdpa_event_qp_destroy(&virtq->eqp);
93 virtq->notifier_state = MLX5_VDPA_NOTIFIER_STATE_DISABLED;
98 mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv)
102 for (i = 0; i < priv->nr_virtqs; i++)
103 mlx5_vdpa_virtq_unset(&priv->virtqs[i]);
105 claim_zero(mlx5_devx_cmd_destroy(priv->tis));
109 claim_zero(mlx5_devx_cmd_destroy(priv->td));
112 if (priv->virtq_db_addr) {
113 claim_zero(munmap(priv->virtq_db_addr, priv->var->length));
114 priv->virtq_db_addr = NULL;
121 mlx5_vdpa_virtq_modify(struct mlx5_vdpa_virtq *virtq, int state)
123 struct mlx5_devx_virtq_attr attr = {
124 .type = MLX5_VIRTQ_MODIFY_TYPE_STATE,
125 .state = state ? MLX5_VIRTQ_STATE_RDY :
126 MLX5_VIRTQ_STATE_SUSPEND,
127 .queue_index = virtq->index,
130 return mlx5_devx_cmd_modify_virtq(virtq->virtq, &attr);
134 mlx5_vdpa_virtq_stop(struct mlx5_vdpa_priv *priv, int index)
136 struct mlx5_devx_virtq_attr attr = {0};
137 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
138 int ret = mlx5_vdpa_virtq_modify(virtq, 0);
142 if (mlx5_devx_cmd_query_virtq(virtq->virtq, &attr)) {
143 DRV_LOG(ERR, "Failed to query virtq %d.", index);
146 DRV_LOG(INFO, "Query vid %d vring %d: hw_available_idx=%d, "
147 "hw_used_index=%d", priv->vid, index,
148 attr.hw_available_index, attr.hw_used_index);
149 ret = rte_vhost_set_vring_base(priv->vid, index,
150 attr.hw_available_index,
153 DRV_LOG(ERR, "Failed to set virtq %d base.", index);
156 DRV_LOG(DEBUG, "vid %u virtq %u was stopped.", priv->vid, index);
161 mlx5_vdpa_hva_to_gpa(struct rte_vhost_memory *mem, uint64_t hva)
163 struct rte_vhost_mem_region *reg;
167 for (i = 0; i < mem->nregions; i++) {
168 reg = &mem->regions[i];
169 if (hva >= reg->host_user_addr &&
170 hva < reg->host_user_addr + reg->size) {
171 gpa = hva - reg->host_user_addr + reg->guest_phys_addr;
179 mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index)
181 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
182 struct rte_vhost_vring vq;
183 struct mlx5_devx_virtq_attr attr = {0};
187 uint16_t last_avail_idx;
188 uint16_t last_used_idx;
190 ret = rte_vhost_get_vhost_vring(priv->vid, index, &vq);
193 virtq->index = index;
194 virtq->vq_size = vq.size;
195 attr.tso_ipv4 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4));
196 attr.tso_ipv6 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6));
197 attr.tx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_CSUM));
198 attr.rx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM));
199 attr.virtio_version_1_0 = !!(priv->features & (1ULL <<
200 VIRTIO_F_VERSION_1));
201 attr.type = (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) ?
202 MLX5_VIRTQ_TYPE_PACKED : MLX5_VIRTQ_TYPE_SPLIT;
204 * No need event QPs creation when the guest in poll mode or when the
205 * capability allows it.
207 attr.event_mode = vq.callfd != -1 || !(priv->caps.event_mode & (1 <<
208 MLX5_VIRTQ_EVENT_MODE_NO_MSIX)) ?
209 MLX5_VIRTQ_EVENT_MODE_QP :
210 MLX5_VIRTQ_EVENT_MODE_NO_MSIX;
211 if (attr.event_mode == MLX5_VIRTQ_EVENT_MODE_QP) {
212 ret = mlx5_vdpa_event_qp_create(priv, vq.size, vq.callfd,
215 DRV_LOG(ERR, "Failed to create event QPs for virtq %d.",
219 attr.qp_id = virtq->eqp.fw_qp->id;
221 DRV_LOG(INFO, "Virtq %d is, for sure, working by poll mode, no"
222 " need event QPs and event mechanism.", index);
224 if (priv->caps.queue_counters_valid) {
225 virtq->counters = mlx5_devx_cmd_create_virtio_q_counters
227 if (!virtq->counters) {
228 DRV_LOG(ERR, "Failed to create virtq couners for virtq"
232 attr.counters_obj_id = virtq->counters->id;
234 /* Setup 3 UMEMs for each virtq. */
235 for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
236 virtq->umems[i].size = priv->caps.umems[i].a * vq.size +
237 priv->caps.umems[i].b;
238 virtq->umems[i].buf = rte_zmalloc(__func__,
239 virtq->umems[i].size, 4096);
240 if (!virtq->umems[i].buf) {
241 DRV_LOG(ERR, "Cannot allocate umem %d memory for virtq"
245 virtq->umems[i].obj = mlx5_glue->devx_umem_reg(priv->ctx,
247 virtq->umems[i].size,
248 IBV_ACCESS_LOCAL_WRITE);
249 if (!virtq->umems[i].obj) {
250 DRV_LOG(ERR, "Failed to register umem %d for virtq %u.",
254 attr.umems[i].id = virtq->umems[i].obj->umem_id;
255 attr.umems[i].offset = 0;
256 attr.umems[i].size = virtq->umems[i].size;
258 if (attr.type == MLX5_VIRTQ_TYPE_SPLIT) {
259 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
260 (uint64_t)(uintptr_t)vq.desc);
262 DRV_LOG(ERR, "Failed to get descriptor ring GPA.");
265 attr.desc_addr = gpa;
266 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
267 (uint64_t)(uintptr_t)vq.used);
269 DRV_LOG(ERR, "Failed to get GPA for used ring.");
272 attr.used_addr = gpa;
273 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
274 (uint64_t)(uintptr_t)vq.avail);
276 DRV_LOG(ERR, "Failed to get GPA for available ring.");
279 attr.available_addr = gpa;
281 ret = rte_vhost_get_vring_base(priv->vid, index, &last_avail_idx,
286 DRV_LOG(WARNING, "Couldn't get vring base, idx are set to 0");
288 DRV_LOG(INFO, "vid %d: Init last_avail_idx=%d, last_used_idx=%d for "
289 "virtq %d.", priv->vid, last_avail_idx,
290 last_used_idx, index);
292 attr.hw_available_index = last_avail_idx;
293 attr.hw_used_index = last_used_idx;
294 attr.q_size = vq.size;
295 attr.mkey = priv->gpa_mkey_index;
296 attr.tis_id = priv->tis->id;
297 attr.queue_index = index;
299 virtq->virtq = mlx5_devx_cmd_create_virtq(priv->ctx, &attr);
303 claim_zero(rte_vhost_enable_guest_notification(priv->vid, index, 1));
304 if (mlx5_vdpa_virtq_modify(virtq, 1))
307 rte_write32(virtq->index, priv->virtq_db_addr);
308 /* Setup doorbell mapping. */
309 virtq->intr_handle.fd = vq.kickfd;
310 if (virtq->intr_handle.fd == -1) {
311 DRV_LOG(WARNING, "Virtq %d kickfd is invalid.", index);
313 virtq->intr_handle.type = RTE_INTR_HANDLE_EXT;
314 if (rte_intr_callback_register(&virtq->intr_handle,
315 mlx5_vdpa_virtq_handler,
317 virtq->intr_handle.fd = -1;
318 DRV_LOG(ERR, "Failed to register virtq %d interrupt.",
322 DRV_LOG(DEBUG, "Register fd %d interrupt for virtq %d.",
323 virtq->intr_handle.fd, index);
326 DRV_LOG(DEBUG, "vid %u virtq %u was created successfully.", priv->vid,
330 mlx5_vdpa_virtq_unset(virtq);
335 mlx5_vdpa_features_validate(struct mlx5_vdpa_priv *priv)
337 if (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) {
338 if (!(priv->caps.virtio_queue_type & (1 <<
339 MLX5_VIRTQ_TYPE_PACKED))) {
340 DRV_LOG(ERR, "Failed to configur PACKED mode for vdev "
341 "%d - it was not reported by HW/driver"
342 " capability.", priv->vid);
346 if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) {
347 if (!priv->caps.tso_ipv4) {
348 DRV_LOG(ERR, "Failed to enable TSO4 for vdev %d - TSO4"
349 " was not reported by HW/driver capability.",
354 if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) {
355 if (!priv->caps.tso_ipv6) {
356 DRV_LOG(ERR, "Failed to enable TSO6 for vdev %d - TSO6"
357 " was not reported by HW/driver capability.",
362 if (priv->features & (1ULL << VIRTIO_NET_F_CSUM)) {
363 if (!priv->caps.tx_csum) {
364 DRV_LOG(ERR, "Failed to enable CSUM for vdev %d - CSUM"
365 " was not reported by HW/driver capability.",
370 if (priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM)) {
371 if (!priv->caps.rx_csum) {
372 DRV_LOG(ERR, "Failed to enable GUEST CSUM for vdev %d"
373 " GUEST CSUM was not reported by HW/driver "
374 "capability.", priv->vid);
378 if (priv->features & (1ULL << VIRTIO_F_VERSION_1)) {
379 if (!priv->caps.virtio_version_1_0) {
380 DRV_LOG(ERR, "Failed to enable version 1 for vdev %d "
381 "version 1 was not reported by HW/driver"
382 " capability.", priv->vid);
390 mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv)
392 struct mlx5_devx_tis_attr tis_attr = {0};
394 uint16_t nr_vring = rte_vhost_get_vring_num(priv->vid);
395 int ret = rte_vhost_get_negotiated_features(priv->vid, &priv->features);
397 if (ret || mlx5_vdpa_features_validate(priv)) {
398 DRV_LOG(ERR, "Failed to configure negotiated features.");
401 if (nr_vring > priv->caps.max_num_virtio_queues * 2) {
402 DRV_LOG(ERR, "Do not support more than %d virtqs(%d).",
403 (int)priv->caps.max_num_virtio_queues * 2,
407 /* Always map the entire page. */
408 priv->virtq_db_addr = mmap(NULL, priv->var->length, PROT_READ |
409 PROT_WRITE, MAP_SHARED, priv->ctx->cmd_fd,
410 priv->var->mmap_off);
411 if (priv->virtq_db_addr == MAP_FAILED) {
412 DRV_LOG(ERR, "Failed to map doorbell page %u.", errno);
413 priv->virtq_db_addr = NULL;
416 DRV_LOG(DEBUG, "VAR address of doorbell mapping is %p.",
417 priv->virtq_db_addr);
419 priv->td = mlx5_devx_cmd_create_td(priv->ctx);
421 DRV_LOG(ERR, "Failed to create transport domain.");
424 tis_attr.transport_domain = priv->td->id;
425 priv->tis = mlx5_devx_cmd_create_tis(priv->ctx, &tis_attr);
427 DRV_LOG(ERR, "Failed to create TIS.");
430 priv->nr_virtqs = nr_vring;
431 for (i = 0; i < nr_vring; i++)
432 if (priv->virtqs[i].enable && mlx5_vdpa_virtq_setup(priv, i))
436 mlx5_vdpa_virtqs_release(priv);
441 mlx5_vdpa_virtq_is_modified(struct mlx5_vdpa_priv *priv,
442 struct mlx5_vdpa_virtq *virtq)
444 struct rte_vhost_vring vq;
445 int ret = rte_vhost_get_vhost_vring(priv->vid, virtq->index, &vq);
449 if (vq.size != virtq->vq_size || vq.kickfd != virtq->intr_handle.fd)
451 if (virtq->eqp.cq.cq) {
452 if (vq.callfd != virtq->eqp.cq.callfd)
454 } else if (vq.callfd != -1) {
461 mlx5_vdpa_virtq_enable(struct mlx5_vdpa_priv *priv, int index, int enable)
463 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
466 DRV_LOG(INFO, "Update virtq %d status %sable -> %sable.", index,
467 virtq->enable ? "en" : "dis", enable ? "en" : "dis");
468 if (!priv->configured) {
469 virtq->enable = !!enable;
472 if (virtq->enable == !!enable) {
475 ret = mlx5_vdpa_virtq_is_modified(priv, virtq);
477 DRV_LOG(ERR, "Virtq %d modify check failed.", index);
482 DRV_LOG(INFO, "Virtq %d was modified, recreate it.", index);
485 ret = mlx5_vdpa_virtq_stop(priv, index);
487 DRV_LOG(WARNING, "Failed to stop virtq %d.", index);
488 mlx5_vdpa_virtq_unset(virtq);
491 ret = mlx5_vdpa_virtq_setup(priv, index);
493 DRV_LOG(ERR, "Failed to setup virtq %d.", index);
497 virtq->enable = !!enable;
498 if (is_virtq_recvq(virtq->index, priv->nr_virtqs)) {
499 /* Need to add received virtq to the RQT table of the TIRs. */
500 ret = mlx5_vdpa_steer_update(priv);
502 virtq->enable = !enable;
510 mlx5_vdpa_virtq_stats_get(struct mlx5_vdpa_priv *priv, int qid,
511 struct rte_vdpa_stat *stats, unsigned int n)
513 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
514 struct mlx5_devx_virtio_q_couners_attr attr = {0};
517 if (!virtq->virtq || !virtq->enable) {
518 DRV_LOG(ERR, "Failed to read virtq %d statistics - virtq "
522 MLX5_ASSERT(virtq->counters);
523 ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters, &attr);
525 DRV_LOG(ERR, "Failed to read virtq %d stats from HW.", qid);
528 ret = (int)RTE_MIN(n, (unsigned int)MLX5_VDPA_STATS_MAX);
529 if (ret == MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS)
531 stats[MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS] = (struct rte_vdpa_stat) {
532 .id = MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS,
533 .value = attr.received_desc - virtq->reset.received_desc,
535 if (ret == MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS)
537 stats[MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS] = (struct rte_vdpa_stat) {
538 .id = MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS,
539 .value = attr.completed_desc - virtq->reset.completed_desc,
541 if (ret == MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS)
543 stats[MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS] = (struct rte_vdpa_stat) {
544 .id = MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS,
545 .value = attr.bad_desc_errors - virtq->reset.bad_desc_errors,
547 if (ret == MLX5_VDPA_STATS_EXCEED_MAX_CHAIN)
549 stats[MLX5_VDPA_STATS_EXCEED_MAX_CHAIN] = (struct rte_vdpa_stat) {
550 .id = MLX5_VDPA_STATS_EXCEED_MAX_CHAIN,
551 .value = attr.exceed_max_chain - virtq->reset.exceed_max_chain,
553 if (ret == MLX5_VDPA_STATS_INVALID_BUFFER)
555 stats[MLX5_VDPA_STATS_INVALID_BUFFER] = (struct rte_vdpa_stat) {
556 .id = MLX5_VDPA_STATS_INVALID_BUFFER,
557 .value = attr.invalid_buffer - virtq->reset.invalid_buffer,
559 if (ret == MLX5_VDPA_STATS_COMPLETION_ERRORS)
561 stats[MLX5_VDPA_STATS_COMPLETION_ERRORS] = (struct rte_vdpa_stat) {
562 .id = MLX5_VDPA_STATS_COMPLETION_ERRORS,
563 .value = attr.error_cqes - virtq->reset.error_cqes,
569 mlx5_vdpa_virtq_stats_reset(struct mlx5_vdpa_priv *priv, int qid)
571 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
574 if (!virtq->virtq || !virtq->enable) {
575 DRV_LOG(ERR, "Failed to read virtq %d statistics - virtq "
579 MLX5_ASSERT(virtq->counters);
580 ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters,
583 DRV_LOG(ERR, "Failed to read virtq %d reset stats from HW.",