drivers/vdpa/mlx5/mlx5_vdpa_virtq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2019 Mellanox Technologies, Ltd
   3  */
   4 #include <string.h>
   5 #include <unistd.h>
   6 #include <sys/eventfd.h>
   7
   8 #include <rte_malloc.h>
   9 #include <rte_errno.h>
  10 #include <rte_io.h>
  11
  12 #include <mlx5_common.h>
  13
  14 #include "mlx5_vdpa_utils.h"
  15 #include "mlx5_vdpa.h"
  16
  17
  18 static void
  19 mlx5_vdpa_virtq_kick_handler(void *cb_arg)
  20 {
  21         struct mlx5_vdpa_virtq *virtq = cb_arg;
  22         struct mlx5_vdpa_priv *priv = virtq->priv;
  23         uint64_t buf;
  24         int nbytes;
  25         int retry;
  26
  27         pthread_mutex_lock(&virtq->virtq_lock);
  28         if (priv->state != MLX5_VDPA_STATE_CONFIGURED && !virtq->enable) {
  29                 pthread_mutex_unlock(&virtq->virtq_lock);
  30                 DRV_LOG(ERR,  "device %d queue %d down, skip kick handling",
  31                         priv->vid, virtq->index);
  32                 return;
  33         }
  34         if (rte_intr_fd_get(virtq->intr_handle) < 0) {
  35                 pthread_mutex_unlock(&virtq->virtq_lock);
  36                 return;
  37         }
  38         for (retry = 0; retry < 3; ++retry) {
  39                 nbytes = read(rte_intr_fd_get(virtq->intr_handle), &buf,
  40                               8);
  41                 if (nbytes < 0) {
  42                         if (errno == EINTR ||
  43                             errno == EWOULDBLOCK ||
  44                             errno == EAGAIN)
  45                                 continue;
  46                         DRV_LOG(ERR,  "Failed to read kickfd of virtq %d: %s.",
  47                                 virtq->index, strerror(errno));
  48                 }
  49                 break;
  50         }
  51         if (nbytes < 0) {
  52                 pthread_mutex_unlock(&virtq->virtq_lock);
  53                 return;
  54         }
  55         rte_spinlock_lock(&priv->db_lock);
  56         rte_write32(virtq->index, priv->virtq_db_addr);
  57         rte_spinlock_unlock(&priv->db_lock);
  58         pthread_mutex_unlock(&virtq->virtq_lock);
  59         if (priv->state != MLX5_VDPA_STATE_CONFIGURED && !virtq->enable) {
  60                 DRV_LOG(ERR,  "device %d queue %d down, skip kick handling.",
  61                         priv->vid, virtq->index);
  62                 return;
  63         }
  64         if (virtq->notifier_state == MLX5_VDPA_NOTIFIER_STATE_DISABLED) {
  65                 if (rte_vhost_host_notifier_ctrl(priv->vid, virtq->index, true))
  66                         virtq->notifier_state = MLX5_VDPA_NOTIFIER_STATE_ERR;
  67                 else
  68                         virtq->notifier_state =
  69                                                MLX5_VDPA_NOTIFIER_STATE_ENABLED;
  70                 DRV_LOG(INFO, "Virtq %u notifier state is %s.", virtq->index,
  71                         virtq->notifier_state ==
  72                                 MLX5_VDPA_NOTIFIER_STATE_ENABLED ? "enabled" :
  73                                                                     "disabled");
  74         }
  75         DRV_LOG(DEBUG, "Ring virtq %u doorbell.", virtq->index);
  76 }
  77
  78 /* Virtq must be locked before calling this function. */
  79 static void
  80 mlx5_vdpa_virtq_unregister_intr_handle(struct mlx5_vdpa_virtq *virtq)
  81 {
  82         int ret = -EAGAIN;
  83
  84         if (!virtq->intr_handle)
  85                 return;
  86         if (rte_intr_fd_get(virtq->intr_handle) >= 0) {
  87                 while (ret == -EAGAIN) {
  88                         ret = rte_intr_callback_unregister(virtq->intr_handle,
  89                                         mlx5_vdpa_virtq_kick_handler, virtq);
  90                         if (ret == -EAGAIN) {
  91                                 DRV_LOG(DEBUG, "Try again to unregister fd %d of virtq %hu interrupt",
  92                                         rte_intr_fd_get(virtq->intr_handle),
  93                                         virtq->index);
  94                                 pthread_mutex_unlock(&virtq->virtq_lock);
  95                                 usleep(MLX5_VDPA_INTR_RETRIES_USEC);
  96                                 pthread_mutex_lock(&virtq->virtq_lock);
  97                         }
  98                 }
  99                 (void)rte_intr_fd_set(virtq->intr_handle, -1);
 100         }
 101         rte_intr_instance_free(virtq->intr_handle);
 102         virtq->intr_handle = NULL;
 103 }
 104
 105 /* Release cached VQ resources. */
 106 void
 107 mlx5_vdpa_virtqs_cleanup(struct mlx5_vdpa_priv *priv)
 108 {
 109         unsigned int i, j;
 110
 111         for (i = 0; i < priv->caps.max_num_virtio_queues; i++) {
 112                 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[i];
 113
 114                 pthread_mutex_lock(&virtq->virtq_lock);
 115                 virtq->configured = 0;
 116                 for (j = 0; j < RTE_DIM(virtq->umems); ++j) {
 117                         if (virtq->umems[j].obj) {
 118                                 claim_zero(mlx5_glue->devx_umem_dereg
 119                                                         (virtq->umems[j].obj));
 120                                 virtq->umems[j].obj = NULL;
 121                         }
 122                         if (virtq->umems[j].buf) {
 123                                 rte_free(virtq->umems[j].buf);
 124                                 virtq->umems[j].buf = NULL;
 125                         }
 126                         virtq->umems[j].size = 0;
 127                 }
 128                 if (virtq->eqp.fw_qp)
 129                         mlx5_vdpa_event_qp_destroy(&virtq->eqp);
 130                 pthread_mutex_unlock(&virtq->virtq_lock);
 131         }
 132 }
 133
 134
 135 static int
 136 mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq *virtq)
 137 {
 138         int ret = -EAGAIN;
 139
 140         mlx5_vdpa_virtq_unregister_intr_handle(virtq);
 141         if (virtq->configured) {
 142                 ret = mlx5_vdpa_virtq_stop(virtq->priv, virtq->index);
 143                 if (ret)
 144                         DRV_LOG(WARNING, "Failed to stop virtq %d.",
 145                                 virtq->index);
 146                 virtq->configured = 0;
 147                 claim_zero(mlx5_devx_cmd_destroy(virtq->virtq));
 148         }
 149         virtq->virtq = NULL;
 150         virtq->notifier_state = MLX5_VDPA_NOTIFIER_STATE_DISABLED;
 151         return 0;
 152 }
 153
 154 void
 155 mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv)
 156 {
 157         struct mlx5_vdpa_virtq *virtq;
 158         int i;
 159
 160         for (i = 0; i < priv->nr_virtqs; i++) {
 161                 virtq = &priv->virtqs[i];
 162                 pthread_mutex_lock(&virtq->virtq_lock);
 163                 mlx5_vdpa_virtq_unset(virtq);
 164                 pthread_mutex_unlock(&virtq->virtq_lock);
 165         }
 166         priv->features = 0;
 167         priv->nr_virtqs = 0;
 168 }
 169
 170 int
 171 mlx5_vdpa_virtq_modify(struct mlx5_vdpa_virtq *virtq, int state)
 172 {
 173         struct mlx5_devx_virtq_attr attr = {
 174                         .mod_fields_bitmap = MLX5_VIRTQ_MODIFY_TYPE_STATE,
 175                         .state = state ? MLX5_VIRTQ_STATE_RDY :
 176                                          MLX5_VIRTQ_STATE_SUSPEND,
 177                         .queue_index = virtq->index,
 178         };
 179
 180         return mlx5_devx_cmd_modify_virtq(virtq->virtq, &attr);
 181 }
 182
 183 int
 184 mlx5_vdpa_virtq_stop(struct mlx5_vdpa_priv *priv, int index)
 185 {
 186         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
 187         int ret;
 188
 189         if (virtq->stopped || !virtq->configured)
 190                 return 0;
 191         ret = mlx5_vdpa_virtq_modify(virtq, 0);
 192         if (ret)
 193                 return -1;
 194         virtq->stopped = true;
 195         DRV_LOG(DEBUG, "vid %u virtq %u was stopped.", priv->vid, index);
 196         return mlx5_vdpa_virtq_query(priv, index);
 197 }
 198
 199 int
 200 mlx5_vdpa_virtq_query(struct mlx5_vdpa_priv *priv, int index)
 201 {
 202         struct mlx5_devx_virtq_attr attr = {0};
 203         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
 204         int ret;
 205
 206         if (mlx5_devx_cmd_query_virtq(virtq->virtq, &attr)) {
 207                 DRV_LOG(ERR, "Failed to query virtq %d.", index);
 208                 return -1;
 209         }
 210         DRV_LOG(INFO, "Query vid %d vring %d: hw_available_idx=%d, "
 211                 "hw_used_index=%d", priv->vid, index,
 212                 attr.hw_available_index, attr.hw_used_index);
 213         ret = rte_vhost_set_vring_base(priv->vid, index,
 214                                        attr.hw_available_index,
 215                                        attr.hw_used_index);
 216         if (ret) {
 217                 DRV_LOG(ERR, "Failed to set virtq %d base.", index);
 218                 return -1;
 219         }
 220         if (attr.state == MLX5_VIRTQ_STATE_ERROR)
 221                 DRV_LOG(WARNING, "vid %d vring %d hw error=%hhu.",
 222                         priv->vid, index, attr.error_type);
 223         return 0;
 224 }
 225
 226 static uint64_t
 227 mlx5_vdpa_hva_to_gpa(struct rte_vhost_memory *mem, uint64_t hva)
 228 {
 229         struct rte_vhost_mem_region *reg;
 230         uint32_t i;
 231         uint64_t gpa = 0;
 232
 233         for (i = 0; i < mem->nregions; i++) {
 234                 reg = &mem->regions[i];
 235                 if (hva >= reg->host_user_addr &&
 236                     hva < reg->host_user_addr + reg->size) {
 237                         gpa = hva - reg->host_user_addr + reg->guest_phys_addr;
 238                         break;
 239                 }
 240         }
 241         return gpa;
 242 }
 243
 244 static int
 245 mlx5_vdpa_virtq_sub_objs_prepare(struct mlx5_vdpa_priv *priv,
 246                 struct mlx5_devx_virtq_attr *attr,
 247                 struct rte_vhost_vring *vq, int index)
 248 {
 249         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
 250         uint64_t gpa;
 251         int ret;
 252         unsigned int i;
 253         uint16_t last_avail_idx = 0;
 254         uint16_t last_used_idx = 0;
 255
 256         if (virtq->virtq)
 257                 attr->mod_fields_bitmap = MLX5_VIRTQ_MODIFY_TYPE_STATE |
 258                         MLX5_VIRTQ_MODIFY_TYPE_ADDR |
 259                         MLX5_VIRTQ_MODIFY_TYPE_HW_AVAILABLE_INDEX |
 260                         MLX5_VIRTQ_MODIFY_TYPE_HW_USED_INDEX |
 261                         MLX5_VIRTQ_MODIFY_TYPE_VERSION_1_0 |
 262                         MLX5_VIRTQ_MODIFY_TYPE_Q_TYPE |
 263                         MLX5_VIRTQ_MODIFY_TYPE_Q_MKEY |
 264                         MLX5_VIRTQ_MODIFY_TYPE_QUEUE_FEATURE_BIT_MASK |
 265                         MLX5_VIRTQ_MODIFY_TYPE_EVENT_MODE;
 266         attr->tso_ipv4 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4));
 267         attr->tso_ipv6 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6));
 268         attr->tx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_CSUM));
 269         attr->rx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM));
 270         attr->virtio_version_1_0 =
 271                 !!(priv->features & (1ULL << VIRTIO_F_VERSION_1));
 272         attr->q_type =
 273                 (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) ?
 274                         MLX5_VIRTQ_TYPE_PACKED : MLX5_VIRTQ_TYPE_SPLIT;
 275         /*
 276          * No need event QPs creation when the guest in poll mode or when the
 277          * capability allows it.
 278          */
 279         attr->event_mode = vq->callfd != -1 ||
 280         !(priv->caps.event_mode & (1 << MLX5_VIRTQ_EVENT_MODE_NO_MSIX)) ?
 281         MLX5_VIRTQ_EVENT_MODE_QP : MLX5_VIRTQ_EVENT_MODE_NO_MSIX;
 282         if (attr->event_mode == MLX5_VIRTQ_EVENT_MODE_QP) {
 283                 ret = mlx5_vdpa_event_qp_prepare(priv,
 284                                 vq->size, vq->callfd, virtq);
 285                 if (ret) {
 286                         DRV_LOG(ERR,
 287                                 "Failed to create event QPs for virtq %d.",
 288                                 index);
 289                         return -1;
 290                 }
 291                 attr->mod_fields_bitmap |= MLX5_VIRTQ_MODIFY_TYPE_EVENT_MODE;
 292                 attr->qp_id = virtq->eqp.fw_qp->id;
 293         } else {
 294                 DRV_LOG(INFO, "Virtq %d is, for sure, working by poll mode, no"
 295                         " need event QPs and event mechanism.", index);
 296         }
 297         if (priv->caps.queue_counters_valid) {
 298                 if (!virtq->counters)
 299                         virtq->counters = mlx5_devx_cmd_create_virtio_q_counters
 300                                                               (priv->cdev->ctx);
 301                 if (!virtq->counters) {
 302                         DRV_LOG(ERR, "Failed to create virtq couners for virtq"
 303                                 " %d.", index);
 304                         return -1;
 305                 }
 306                 attr->counters_obj_id = virtq->counters->id;
 307         }
 308         /* Setup 3 UMEMs for each virtq. */
 309         if (virtq->virtq) {
 310                 for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
 311                         uint32_t size;
 312                         void *buf;
 313                         struct mlx5dv_devx_umem *obj;
 314
 315                         size =
 316                 priv->caps.umems[i].a * vq->size + priv->caps.umems[i].b;
 317                         if (virtq->umems[i].size == size &&
 318                                 virtq->umems[i].obj != NULL) {
 319                                 /* Reuse registered memory. */
 320                                 memset(virtq->umems[i].buf, 0, size);
 321                                 goto reuse;
 322                         }
 323                         if (virtq->umems[i].obj)
 324                                 claim_zero(mlx5_glue->devx_umem_dereg
 325                                    (virtq->umems[i].obj));
 326                         if (virtq->umems[i].buf)
 327                                 rte_free(virtq->umems[i].buf);
 328                         virtq->umems[i].size = 0;
 329                         virtq->umems[i].obj = NULL;
 330                         virtq->umems[i].buf = NULL;
 331                         buf = rte_zmalloc(__func__,
 332                                 size, 4096);
 333                         if (buf == NULL) {
 334                                 DRV_LOG(ERR, "Cannot allocate umem %d memory for virtq"
 335                                 " %u.", i, index);
 336                                 return -1;
 337                         }
 338                         obj = mlx5_glue->devx_umem_reg(priv->cdev->ctx,
 339                                 buf, size, IBV_ACCESS_LOCAL_WRITE);
 340                         if (obj == NULL) {
 341                                 DRV_LOG(ERR, "Failed to register umem %d for virtq %u.",
 342                                 i, index);
 343                                 rte_free(buf);
 344                                 return -1;
 345                         }
 346                         virtq->umems[i].size = size;
 347                         virtq->umems[i].buf = buf;
 348                         virtq->umems[i].obj = obj;
 349 reuse:
 350                         attr->umems[i].id = virtq->umems[i].obj->umem_id;
 351                         attr->umems[i].offset = 0;
 352                         attr->umems[i].size = virtq->umems[i].size;
 353                 }
 354         }
 355         if (attr->q_type == MLX5_VIRTQ_TYPE_SPLIT) {
 356                 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
 357                                            (uint64_t)(uintptr_t)vq->desc);
 358                 if (!gpa) {
 359                         DRV_LOG(ERR, "Failed to get descriptor ring GPA.");
 360                         return -1;
 361                 }
 362                 attr->desc_addr = gpa;
 363                 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
 364                                            (uint64_t)(uintptr_t)vq->used);
 365                 if (!gpa) {
 366                         DRV_LOG(ERR, "Failed to get GPA for used ring.");
 367                         return -1;
 368                 }
 369                 attr->used_addr = gpa;
 370                 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
 371                                            (uint64_t)(uintptr_t)vq->avail);
 372                 if (!gpa) {
 373                         DRV_LOG(ERR, "Failed to get GPA for available ring.");
 374                         return -1;
 375                 }
 376                 attr->available_addr = gpa;
 377         }
 378         ret = rte_vhost_get_vring_base(priv->vid,
 379                         index, &last_avail_idx, &last_used_idx);
 380         if (ret) {
 381                 last_avail_idx = 0;
 382                 last_used_idx = 0;
 383                 DRV_LOG(WARNING, "Couldn't get vring base, idx are set to 0.");
 384         } else {
 385                 DRV_LOG(INFO, "vid %d: Init last_avail_idx=%d, last_used_idx=%d for "
 386                                 "virtq %d.", priv->vid, last_avail_idx,
 387                                 last_used_idx, index);
 388         }
 389         attr->hw_available_index = last_avail_idx;
 390         attr->hw_used_index = last_used_idx;
 391         attr->q_size = vq->size;
 392         attr->mkey = priv->gpa_mkey_index;
 393         attr->tis_id = priv->tiss[(index / 2) % priv->num_lag_ports]->id;
 394         attr->queue_index = index;
 395         attr->pd = priv->cdev->pdn;
 396         attr->hw_latency_mode = priv->hw_latency_mode;
 397         attr->hw_max_latency_us = priv->hw_max_latency_us;
 398         attr->hw_max_pending_comp = priv->hw_max_pending_comp;
 399         if (attr->hw_latency_mode || attr->hw_max_latency_us ||
 400                 attr->hw_max_pending_comp)
 401                 attr->mod_fields_bitmap |= MLX5_VIRTQ_MODIFY_TYPE_QUEUE_PERIOD;
 402         return 0;
 403 }
 404
 405 bool
 406 mlx5_vdpa_is_modify_virtq_supported(struct mlx5_vdpa_priv *priv)
 407 {
 408         return (priv->caps.vnet_modify_ext &&
 409                         priv->caps.virtio_net_q_addr_modify &&
 410                         priv->caps.virtio_q_index_modify) ? true : false;
 411 }
 412
 413 static int
 414 mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index)
 415 {
 416         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
 417         struct rte_vhost_vring vq;
 418         struct mlx5_devx_virtq_attr attr = {0};
 419         int ret;
 420         uint16_t event_num = MLX5_EVENT_TYPE_OBJECT_CHANGE;
 421         uint64_t cookie;
 422
 423         ret = rte_vhost_get_vhost_vring(priv->vid, index, &vq);
 424         if (ret)
 425                 return -1;
 426         if (vq.size == 0)
 427                 return 0;
 428         virtq->priv = priv;
 429         virtq->stopped = 0;
 430         ret = mlx5_vdpa_virtq_sub_objs_prepare(priv, &attr,
 431                                 &vq, index);
 432         if (ret) {
 433                 DRV_LOG(ERR, "Failed to setup update virtq attr %d.",
 434                         index);
 435                 goto error;
 436         }
 437         if (!virtq->virtq) {
 438                 virtq->index = index;
 439                 virtq->vq_size = vq.size;
 440                 virtq->virtq = mlx5_devx_cmd_create_virtq(priv->cdev->ctx,
 441                         &attr);
 442                 if (!virtq->virtq)
 443                         goto error;
 444                 attr.mod_fields_bitmap = MLX5_VIRTQ_MODIFY_TYPE_STATE;
 445         }
 446         attr.state = MLX5_VIRTQ_STATE_RDY;
 447         ret = mlx5_devx_cmd_modify_virtq(virtq->virtq, &attr);
 448         if (ret) {
 449                 DRV_LOG(ERR, "Failed to modify virtq %d.", index);
 450                 goto error;
 451         }
 452         claim_zero(rte_vhost_enable_guest_notification(priv->vid, index, 1));
 453         virtq->configured = 1;
 454         rte_spinlock_lock(&priv->db_lock);
 455         rte_write32(virtq->index, priv->virtq_db_addr);
 456         rte_spinlock_unlock(&priv->db_lock);
 457         /* Setup doorbell mapping. */
 458         virtq->intr_handle =
 459                 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
 460         if (virtq->intr_handle == NULL) {
 461                 DRV_LOG(ERR, "Fail to allocate intr_handle");
 462                 goto error;
 463         }
 464
 465         if (rte_intr_fd_set(virtq->intr_handle, vq.kickfd))
 466                 goto error;
 467
 468         if (rte_intr_fd_get(virtq->intr_handle) == -1) {
 469                 DRV_LOG(WARNING, "Virtq %d kickfd is invalid.", index);
 470         } else {
 471                 if (rte_intr_type_set(virtq->intr_handle, RTE_INTR_HANDLE_EXT))
 472                         goto error;
 473
 474                 if (rte_intr_callback_register(virtq->intr_handle,
 475                                                mlx5_vdpa_virtq_kick_handler,
 476                                                virtq)) {
 477                         (void)rte_intr_fd_set(virtq->intr_handle, -1);
 478                         DRV_LOG(ERR, "Failed to register virtq %d interrupt.",
 479                                 index);
 480                         goto error;
 481                 } else {
 482                         DRV_LOG(DEBUG, "Register fd %d interrupt for virtq %d.",
 483                                 rte_intr_fd_get(virtq->intr_handle),
 484                                 index);
 485                 }
 486         }
 487         /* Subscribe virtq error event. */
 488         virtq->version++;
 489         cookie = ((uint64_t)virtq->version << 32) + index;
 490         ret = mlx5_glue->devx_subscribe_devx_event(priv->err_chnl,
 491                                                    virtq->virtq->obj,
 492                                                    sizeof(event_num),
 493                                                    &event_num, cookie);
 494         if (ret) {
 495                 DRV_LOG(ERR, "Failed to subscribe device %d virtq %d error event.",
 496                         priv->vid, index);
 497                 rte_errno = errno;
 498                 goto error;
 499         }
 500         virtq->stopped = false;
 501         /* Initial notification to ask Qemu handling completed buffers. */
 502         if (virtq->eqp.cq.callfd != -1)
 503                 eventfd_write(virtq->eqp.cq.callfd, (eventfd_t)1);
 504         DRV_LOG(DEBUG, "vid %u virtq %u was created successfully.", priv->vid,
 505                 index);
 506         return 0;
 507 error:
 508         mlx5_vdpa_virtq_unset(virtq);
 509         return -1;
 510 }
 511
 512 static int
 513 mlx5_vdpa_features_validate(struct mlx5_vdpa_priv *priv)
 514 {
 515         if (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) {
 516                 if (!(priv->caps.virtio_queue_type & (1 <<
 517                                                      MLX5_VIRTQ_TYPE_PACKED))) {
 518                         DRV_LOG(ERR, "Failed to configure PACKED mode for vdev "
 519                                 "%d - it was not reported by HW/driver"
 520                                 " capability.", priv->vid);
 521                         return -ENOTSUP;
 522                 }
 523         }
 524         if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) {
 525                 if (!priv->caps.tso_ipv4) {
 526                         DRV_LOG(ERR, "Failed to enable TSO4 for vdev %d - TSO4"
 527                                 " was not reported by HW/driver capability.",
 528                                 priv->vid);
 529                         return -ENOTSUP;
 530                 }
 531         }
 532         if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) {
 533                 if (!priv->caps.tso_ipv6) {
 534                         DRV_LOG(ERR, "Failed to enable TSO6 for vdev %d - TSO6"
 535                                 " was not reported by HW/driver capability.",
 536                                 priv->vid);
 537                         return -ENOTSUP;
 538                 }
 539         }
 540         if (priv->features & (1ULL << VIRTIO_NET_F_CSUM)) {
 541                 if (!priv->caps.tx_csum) {
 542                         DRV_LOG(ERR, "Failed to enable CSUM for vdev %d - CSUM"
 543                                 " was not reported by HW/driver capability.",
 544                                 priv->vid);
 545                         return -ENOTSUP;
 546                 }
 547         }
 548         if (priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM)) {
 549                 if (!priv->caps.rx_csum) {
 550                         DRV_LOG(ERR, "Failed to enable GUEST CSUM for vdev %d"
 551                                 " GUEST CSUM was not reported by HW/driver "
 552                                 "capability.", priv->vid);
 553                         return -ENOTSUP;
 554                 }
 555         }
 556         if (priv->features & (1ULL << VIRTIO_F_VERSION_1)) {
 557                 if (!priv->caps.virtio_version_1_0) {
 558                         DRV_LOG(ERR, "Failed to enable version 1 for vdev %d "
 559                                 "version 1 was not reported by HW/driver"
 560                                 " capability.", priv->vid);
 561                         return -ENOTSUP;
 562                 }
 563         }
 564         return 0;
 565 }
 566
 567 int
 568 mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv)
 569 {
 570         uint32_t i;
 571         uint16_t nr_vring = rte_vhost_get_vring_num(priv->vid);
 572         int ret = rte_vhost_get_negotiated_features(priv->vid, &priv->features);
 573         struct mlx5_vdpa_virtq *virtq;
 574
 575         if (ret || mlx5_vdpa_features_validate(priv)) {
 576                 DRV_LOG(ERR, "Failed to configure negotiated features.");
 577                 return -1;
 578         }
 579         if ((priv->features & (1ULL << VIRTIO_NET_F_CSUM)) == 0 &&
 580             ((priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) > 0 ||
 581              (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) > 0)) {
 582                 /* Packet may be corrupted if TSO is enabled without CSUM. */
 583                 DRV_LOG(INFO, "TSO is enabled without CSUM, force CSUM.");
 584                 priv->features |= (1ULL << VIRTIO_NET_F_CSUM);
 585         }
 586         if (nr_vring > priv->caps.max_num_virtio_queues) {
 587                 DRV_LOG(ERR, "Do not support more than %d virtqs(%d).",
 588                         (int)priv->caps.max_num_virtio_queues,
 589                         (int)nr_vring);
 590                 return -1;
 591         }
 592         priv->nr_virtqs = nr_vring;
 593         for (i = 0; i < nr_vring; i++) {
 594                 virtq = &priv->virtqs[i];
 595                 if (virtq->enable) {
 596                         pthread_mutex_lock(&virtq->virtq_lock);
 597                         if (mlx5_vdpa_virtq_setup(priv, i)) {
 598                                 pthread_mutex_unlock(&virtq->virtq_lock);
 599                                 goto error;
 600                         }
 601                         pthread_mutex_unlock(&virtq->virtq_lock);
 602                 }
 603         }
 604         return 0;
 605 error:
 606         mlx5_vdpa_virtqs_release(priv);
 607         return -1;
 608 }
 609
 610 static int
 611 mlx5_vdpa_virtq_is_modified(struct mlx5_vdpa_priv *priv,
 612                             struct mlx5_vdpa_virtq *virtq)
 613 {
 614         struct rte_vhost_vring vq;
 615         int ret = rte_vhost_get_vhost_vring(priv->vid, virtq->index, &vq);
 616
 617         if (ret)
 618                 return -1;
 619         if (vq.size != virtq->vq_size || vq.kickfd !=
 620             rte_intr_fd_get(virtq->intr_handle))
 621                 return 1;
 622         if (virtq->eqp.cq.cq_obj.cq) {
 623                 if (vq.callfd != virtq->eqp.cq.callfd)
 624                         return 1;
 625         } else if (vq.callfd != -1) {
 626                 return 1;
 627         }
 628         return 0;
 629 }
 630
 631 int
 632 mlx5_vdpa_virtq_enable(struct mlx5_vdpa_priv *priv, int index, int enable)
 633 {
 634         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
 635         int ret;
 636
 637         DRV_LOG(INFO, "Update virtq %d status %sable -> %sable.", index,
 638                 virtq->enable ? "en" : "dis", enable ? "en" : "dis");
 639         if (priv->state == MLX5_VDPA_STATE_PROBED) {
 640                 virtq->enable = !!enable;
 641                 return 0;
 642         }
 643         if (virtq->enable == !!enable) {
 644                 if (!enable)
 645                         return 0;
 646                 ret = mlx5_vdpa_virtq_is_modified(priv, virtq);
 647                 if (ret < 0) {
 648                         DRV_LOG(ERR, "Virtq %d modify check failed.", index);
 649                         return -1;
 650                 }
 651                 if (ret == 0)
 652                         return 0;
 653                 DRV_LOG(INFO, "Virtq %d was modified, recreate it.", index);
 654         }
 655         if (virtq->configured) {
 656                 virtq->enable = 0;
 657                 if (is_virtq_recvq(virtq->index, priv->nr_virtqs)) {
 658                         ret = mlx5_vdpa_steer_update(priv);
 659                         if (ret)
 660                                 DRV_LOG(WARNING, "Failed to disable steering "
 661                                         "for virtq %d.", index);
 662                 }
 663                 mlx5_vdpa_virtq_unset(virtq);
 664         }
 665         if (enable) {
 666                 ret = mlx5_vdpa_virtq_setup(priv, index);
 667                 if (ret) {
 668                         DRV_LOG(ERR, "Failed to setup virtq %d.", index);
 669                         return ret;
 670                 }
 671                 virtq->enable = 1;
 672                 if (is_virtq_recvq(virtq->index, priv->nr_virtqs)) {
 673                         ret = mlx5_vdpa_steer_update(priv);
 674                         if (ret)
 675                                 DRV_LOG(WARNING, "Failed to enable steering "
 676                                         "for virtq %d.", index);
 677                 }
 678         }
 679         return 0;
 680 }
 681
 682 int
 683 mlx5_vdpa_virtq_stats_get(struct mlx5_vdpa_priv *priv, int qid,
 684                           struct rte_vdpa_stat *stats, unsigned int n)
 685 {
 686         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
 687         struct mlx5_devx_virtio_q_couners_attr *attr = &virtq->stats;
 688         int ret;
 689
 690         if (!virtq->counters) {
 691                 DRV_LOG(ERR, "Failed to read virtq %d statistics - virtq "
 692                         "is invalid.", qid);
 693                 return -EINVAL;
 694         }
 695         ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters, attr);
 696         if (ret) {
 697                 DRV_LOG(ERR, "Failed to read virtq %d stats from HW.", qid);
 698                 return ret;
 699         }
 700         ret = (int)RTE_MIN(n, (unsigned int)MLX5_VDPA_STATS_MAX);
 701         if (ret == MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS)
 702                 return ret;
 703         stats[MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS] = (struct rte_vdpa_stat) {
 704                 .id = MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS,
 705                 .value = attr->received_desc - virtq->reset.received_desc,
 706         };
 707         if (ret == MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS)
 708                 return ret;
 709         stats[MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS] = (struct rte_vdpa_stat) {
 710                 .id = MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS,
 711                 .value = attr->completed_desc - virtq->reset.completed_desc,
 712         };
 713         if (ret == MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS)
 714                 return ret;
 715         stats[MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS] = (struct rte_vdpa_stat) {
 716                 .id = MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS,
 717                 .value = attr->bad_desc_errors - virtq->reset.bad_desc_errors,
 718         };
 719         if (ret == MLX5_VDPA_STATS_EXCEED_MAX_CHAIN)
 720                 return ret;
 721         stats[MLX5_VDPA_STATS_EXCEED_MAX_CHAIN] = (struct rte_vdpa_stat) {
 722                 .id = MLX5_VDPA_STATS_EXCEED_MAX_CHAIN,
 723                 .value = attr->exceed_max_chain - virtq->reset.exceed_max_chain,
 724         };
 725         if (ret == MLX5_VDPA_STATS_INVALID_BUFFER)
 726                 return ret;
 727         stats[MLX5_VDPA_STATS_INVALID_BUFFER] = (struct rte_vdpa_stat) {
 728                 .id = MLX5_VDPA_STATS_INVALID_BUFFER,
 729                 .value = attr->invalid_buffer - virtq->reset.invalid_buffer,
 730         };
 731         if (ret == MLX5_VDPA_STATS_COMPLETION_ERRORS)
 732                 return ret;
 733         stats[MLX5_VDPA_STATS_COMPLETION_ERRORS] = (struct rte_vdpa_stat) {
 734                 .id = MLX5_VDPA_STATS_COMPLETION_ERRORS,
 735                 .value = attr->error_cqes - virtq->reset.error_cqes,
 736         };
 737         return ret;
 738 }
 739
 740 int
 741 mlx5_vdpa_virtq_stats_reset(struct mlx5_vdpa_priv *priv, int qid)
 742 {
 743         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
 744         int ret;
 745
 746         if (virtq->counters == NULL) /* VQ not enabled. */
 747                 return 0;
 748         ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters,
 749                                                     &virtq->reset);
 750         if (ret)
 751                 DRV_LOG(ERR, "Failed to read virtq %d reset stats from HW.",
 752                         qid);
 753         return ret;
 754 }