1 /*******************************************************************************
3 Copyright (c) 2001-2012, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ***************************************************************************/
34 #include "e1000_api.h"
37 STATIC s32 e1000_acquire_nvm_i210(struct e1000_hw *hw);
38 STATIC void e1000_release_nvm_i210(struct e1000_hw *hw);
39 STATIC s32 e1000_get_hw_semaphore_i210(struct e1000_hw *hw);
40 STATIC void e1000_put_hw_semaphore_i210(struct e1000_hw *hw);
41 STATIC s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
43 STATIC s32 e1000_pool_flash_update_done_i210(struct e1000_hw *hw);
44 STATIC s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data);
45 STATIC s32 e1000_read_nvm_i211(struct e1000_hw *hw, u16 offset, u16 words,
49 * e1000_acquire_nvm_i210 - Request for access to EEPROM
50 * @hw: pointer to the HW structure
52 * Acquire the necessary semaphores for exclusive access to the EEPROM.
53 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
54 * Return successful if access grant bit set, else clear the request for
55 * EEPROM access and return -E1000_ERR_NVM (-1).
57 STATIC s32 e1000_acquire_nvm_i210(struct e1000_hw *hw)
61 DEBUGFUNC("e1000_acquire_nvm_i210");
63 ret_val = e1000_acquire_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);
69 * e1000_release_nvm_i210 - Release exclusive access to EEPROM
70 * @hw: pointer to the HW structure
72 * Stop any current commands to the EEPROM and clear the EEPROM request bit,
73 * then release the semaphores acquired.
75 STATIC void e1000_release_nvm_i210(struct e1000_hw *hw)
77 DEBUGFUNC("e1000_release_nvm_i210");
79 e1000_release_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);
83 * e1000_acquire_swfw_sync_i210 - Acquire SW/FW semaphore
84 * @hw: pointer to the HW structure
85 * @mask: specifies which semaphore to acquire
87 * Acquire the SW/FW semaphore to access the PHY or NVM. The mask
88 * will also specify which port we're acquiring the lock for.
90 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
94 u32 fwmask = mask << 16;
95 s32 ret_val = E1000_SUCCESS;
96 s32 i = 0, timeout = 200; /* FIXME: find real value to use here */
98 DEBUGFUNC("e1000_acquire_swfw_sync_i210");
100 while (i < timeout) {
101 if (e1000_get_hw_semaphore_i210(hw)) {
102 ret_val = -E1000_ERR_SWFW_SYNC;
106 swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
107 if (!(swfw_sync & fwmask))
111 * Firmware currently using resource (fwmask)
113 e1000_put_hw_semaphore_i210(hw);
119 DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
120 ret_val = -E1000_ERR_SWFW_SYNC;
125 E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
127 e1000_put_hw_semaphore_i210(hw);
134 * e1000_release_swfw_sync_i210 - Release SW/FW semaphore
135 * @hw: pointer to the HW structure
136 * @mask: specifies which semaphore to acquire
138 * Release the SW/FW semaphore used to access the PHY or NVM. The mask
139 * will also specify which port we're releasing the lock for.
141 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
145 DEBUGFUNC("e1000_release_swfw_sync_i210");
147 while (e1000_get_hw_semaphore_i210(hw) != E1000_SUCCESS)
150 swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
152 E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
154 e1000_put_hw_semaphore_i210(hw);
158 * e1000_get_hw_semaphore_i210 - Acquire hardware semaphore
159 * @hw: pointer to the HW structure
161 * Acquire the HW semaphore to access the PHY or NVM
163 STATIC s32 e1000_get_hw_semaphore_i210(struct e1000_hw *hw)
166 s32 ret_val = E1000_SUCCESS;
167 s32 timeout = hw->nvm.word_size + 1;
170 DEBUGFUNC("e1000_get_hw_semaphore_i210");
172 /* Get the FW semaphore. */
173 for (i = 0; i < timeout; i++) {
174 swsm = E1000_READ_REG(hw, E1000_SWSM);
175 E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
177 /* Semaphore acquired if bit latched */
178 if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)
185 /* Release semaphores */
186 e1000_put_hw_semaphore_generic(hw);
187 DEBUGOUT("Driver can't access the NVM\n");
188 ret_val = -E1000_ERR_NVM;
197 * e1000_put_hw_semaphore_i210 - Release hardware semaphore
198 * @hw: pointer to the HW structure
200 * Release hardware semaphore used to access the PHY or NVM
202 STATIC void e1000_put_hw_semaphore_i210(struct e1000_hw *hw)
206 DEBUGFUNC("e1000_put_hw_semaphore_i210");
208 swsm = E1000_READ_REG(hw, E1000_SWSM);
210 swsm &= ~E1000_SWSM_SWESMBI;
212 E1000_WRITE_REG(hw, E1000_SWSM, swsm);
216 * e1000_read_nvm_srrd_i210 - Reads Shadow Ram using EERD register
217 * @hw: pointer to the HW structure
218 * @offset: offset of word in the Shadow Ram to read
219 * @words: number of words to read
220 * @data: word read from the Shadow Ram
222 * Reads a 16 bit word from the Shadow Ram using the EERD register.
223 * Uses necessary synchronization semaphores.
225 s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,
228 s32 status = E1000_SUCCESS;
231 DEBUGFUNC("e1000_read_nvm_srrd_i210");
233 /* We cannot hold synchronization semaphores for too long,
234 * because of forceful takeover procedure. However it is more efficient
235 * to read in bursts than synchronizing access for each word. */
236 for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
237 count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
238 E1000_EERD_EEWR_MAX_COUNT : (words - i);
239 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
240 status = e1000_read_nvm_eerd(hw, offset, count,
242 hw->nvm.ops.release(hw);
244 status = E1000_ERR_SWFW_SYNC;
247 if (status != E1000_SUCCESS)
255 * e1000_write_nvm_srwr_i210 - Write to Shadow RAM using EEWR
256 * @hw: pointer to the HW structure
257 * @offset: offset within the Shadow RAM to be written to
258 * @words: number of words to write
259 * @data: 16 bit word(s) to be written to the Shadow RAM
261 * Writes data to Shadow RAM at offset using EEWR register.
263 * If e1000_update_nvm_checksum is not called after this function , the
264 * data will not be committed to FLASH and also Shadow RAM will most likely
265 * contain an invalid checksum.
267 * If error code is returned, data and Shadow RAM may be inconsistent - buffer
270 s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,
273 s32 status = E1000_SUCCESS;
276 DEBUGFUNC("e1000_write_nvm_srwr_i210");
278 /* We cannot hold synchronization semaphores for too long,
279 * because of forceful takeover procedure. However it is more efficient
280 * to write in bursts than synchronizing access for each word. */
281 for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
282 count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
283 E1000_EERD_EEWR_MAX_COUNT : (words - i);
284 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
285 status = e1000_write_nvm_srwr(hw, offset, count,
287 hw->nvm.ops.release(hw);
289 status = E1000_ERR_SWFW_SYNC;
292 if (status != E1000_SUCCESS)
300 * e1000_write_nvm_srwr - Write to Shadow Ram using EEWR
301 * @hw: pointer to the HW structure
302 * @offset: offset within the Shadow Ram to be written to
303 * @words: number of words to write
304 * @data: 16 bit word(s) to be written to the Shadow Ram
306 * Writes data to Shadow Ram at offset using EEWR register.
308 * If e1000_update_nvm_checksum is not called after this function , the
309 * Shadow Ram will most likely contain an invalid checksum.
311 STATIC s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
314 struct e1000_nvm_info *nvm = &hw->nvm;
316 u32 attempts = 100000;
317 s32 ret_val = E1000_SUCCESS;
319 DEBUGFUNC("e1000_write_nvm_srwr");
322 * A check for invalid values: offset too large, too many words,
323 * too many words for the offset, and not enough words.
325 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
327 DEBUGOUT("nvm parameter(s) out of bounds\n");
328 ret_val = -E1000_ERR_NVM;
332 for (i = 0; i < words; i++) {
333 eewr = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
334 (data[i] << E1000_NVM_RW_REG_DATA) |
335 E1000_NVM_RW_REG_START;
337 E1000_WRITE_REG(hw, E1000_SRWR, eewr);
339 for (k = 0; k < attempts; k++) {
340 if (E1000_NVM_RW_REG_DONE &
341 E1000_READ_REG(hw, E1000_SRWR)) {
342 ret_val = E1000_SUCCESS;
348 if (ret_val != E1000_SUCCESS) {
349 DEBUGOUT("Shadow RAM write EEWR timed out\n");
359 * e1000_read_nvm_i211 - Read NVM wrapper function for I211
360 * @hw: pointer to the HW structure
361 * @address: the word address (aka eeprom offset) to read
362 * @data: pointer to the data read
364 * Wrapper function to return data formerly found in the NVM.
366 STATIC s32 e1000_read_nvm_i211(struct e1000_hw *hw, u16 offset, u16 words,
369 s32 ret_val = E1000_SUCCESS;
371 DEBUGFUNC("e1000_read_nvm_i211");
373 /* Only the MAC addr is required to be present in the iNVM */
376 ret_val = e1000_read_invm_i211(hw, (u8)offset, &data[0]);
377 ret_val |= e1000_read_invm_i211(hw, (u8)offset+1, &data[1]);
378 ret_val |= e1000_read_invm_i211(hw, (u8)offset+2, &data[2]);
379 if (ret_val != E1000_SUCCESS)
380 DEBUGOUT("MAC Addr not found in iNVM\n");
382 case NVM_INIT_CTRL_2:
383 ret_val = e1000_read_invm_i211(hw, (u8)offset, data);
384 if (ret_val != E1000_SUCCESS) {
385 *data = NVM_INIT_CTRL_2_DEFAULT_I211;
386 ret_val = E1000_SUCCESS;
389 case NVM_INIT_CTRL_4:
390 ret_val = e1000_read_invm_i211(hw, (u8)offset, data);
391 if (ret_val != E1000_SUCCESS) {
392 *data = NVM_INIT_CTRL_4_DEFAULT_I211;
393 ret_val = E1000_SUCCESS;
397 ret_val = e1000_read_invm_i211(hw, (u8)offset, data);
398 if (ret_val != E1000_SUCCESS) {
399 *data = NVM_LED_1_CFG_DEFAULT_I211;
400 ret_val = E1000_SUCCESS;
403 case NVM_LED_0_2_CFG:
404 ret_val = e1000_read_invm_i211(hw, (u8)offset, data);
405 if (ret_val != E1000_SUCCESS) {
406 *data = NVM_LED_0_2_CFG_DEFAULT_I211;
407 ret_val = E1000_SUCCESS;
410 case NVM_ID_LED_SETTINGS:
411 ret_val = e1000_read_invm_i211(hw, (u8)offset, data);
412 if (ret_val != E1000_SUCCESS) {
413 *data = ID_LED_RESERVED_FFFF;
414 ret_val = E1000_SUCCESS;
418 *data = hw->subsystem_device_id;
421 *data = hw->subsystem_vendor_id;
424 *data = hw->device_id;
427 *data = hw->vendor_id;
430 DEBUGOUT1("NVM word 0x%02x is not mapped.\n", offset);
431 *data = NVM_RESERVED_WORD;
438 * e1000_read_invm_i211 - Reads OTP
439 * @hw: pointer to the HW structure
440 * @address: the word address (aka eeprom offset) to read
441 * @data: pointer to the data read
443 * Reads 16-bit words from the OTP. Return error when the word is not
446 s32 e1000_read_invm_i211(struct e1000_hw *hw, u8 address, u16 *data)
448 s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
451 u8 record_type, word_address;
453 DEBUGFUNC("e1000_read_invm_i211");
455 for (i = 0; i < E1000_INVM_SIZE; i++) {
456 invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));
457 /* Get record type */
458 record_type = INVM_DWORD_TO_RECORD_TYPE(invm_dword);
459 if (record_type == E1000_INVM_UNINITIALIZED_STRUCTURE)
461 if (record_type == E1000_INVM_CSR_AUTOLOAD_STRUCTURE)
462 i += E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS;
463 if (record_type == E1000_INVM_RSA_KEY_SHA256_STRUCTURE)
464 i += E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS;
465 if (record_type == E1000_INVM_WORD_AUTOLOAD_STRUCTURE) {
466 word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);
467 if (word_address == address) {
468 *data = INVM_DWORD_TO_WORD_DATA(invm_dword);
469 DEBUGOUT2("Read INVM Word 0x%02x = %x",
471 status = E1000_SUCCESS;
476 if (status != E1000_SUCCESS)
477 DEBUGOUT1("Requested word 0x%02x not found in OTP\n", address);
482 * e1000_read_invm_version - Reads iNVM version and image type
483 * @hw: pointer to the HW structure
484 * @invm_ver: version structure for the version read
486 * Reads iNVM version and image type.
488 s32 e1000_read_invm_version(struct e1000_hw *hw,
489 struct e1000_fw_version *invm_ver)
492 u32 *next_record = NULL;
495 u32 invm_blocks = E1000_INVM_SIZE - (E1000_INVM_ULT_BYTES_SIZE /
496 E1000_INVM_RECORD_SIZE_IN_BYTES);
497 u32 buffer[E1000_INVM_SIZE];
498 s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
501 DEBUGFUNC("e1000_read_invm_version");
503 /* Read iNVM memory */
504 for (i = 0; i < E1000_INVM_SIZE; i++) {
505 invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));
506 buffer[i] = invm_dword;
509 /* Read version number */
510 for (i = 1; i < invm_blocks; i++) {
511 record = &buffer[invm_blocks - i];
512 next_record = &buffer[invm_blocks - i + 1];
514 /* Check if we have first version location used */
515 if ((i == 1) && ((*record & E1000_INVM_VER_FIELD_ONE) == 0)) {
517 status = E1000_SUCCESS;
520 /* Check if we have second version location used */
522 ((*record & E1000_INVM_VER_FIELD_TWO) == 0)) {
523 version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3;
524 status = E1000_SUCCESS;
528 * Check if we have odd version location
529 * used and it is the last one used
531 else if ((((*record & E1000_INVM_VER_FIELD_ONE) == 0) &&
532 ((*record & 0x3) == 0)) || (((*record & 0x3) != 0) &&
534 version = (*next_record & E1000_INVM_VER_FIELD_TWO)
536 status = E1000_SUCCESS;
540 * Check if we have even version location
541 * used and it is the last one used
543 else if (((*record & E1000_INVM_VER_FIELD_TWO) == 0) &&
544 ((*record & 0x3) == 0)) {
545 version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3;
546 status = E1000_SUCCESS;
551 if (status == E1000_SUCCESS) {
552 invm_ver->invm_major = (version & E1000_INVM_MAJOR_MASK)
553 >> E1000_INVM_MAJOR_SHIFT;
554 invm_ver->invm_minor = version & E1000_INVM_MINOR_MASK;
556 /* Read Image Type */
557 for (i = 1; i < invm_blocks; i++) {
558 record = &buffer[invm_blocks - i];
559 next_record = &buffer[invm_blocks - i + 1];
561 /* Check if we have image type in first location used */
562 if ((i == 1) && ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) {
563 invm_ver->invm_img_type = 0;
564 status = E1000_SUCCESS;
567 /* Check if we have image type in first location used */
568 else if ((((*record & 0x3) == 0) &&
569 ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) ||
570 ((((*record & 0x3) != 0) && (i != 1)))) {
571 invm_ver->invm_img_type =
572 (*next_record & E1000_INVM_IMGTYPE_FIELD) >> 23;
573 status = E1000_SUCCESS;
581 * e1000_validate_nvm_checksum_i210 - Validate EEPROM checksum
582 * @hw: pointer to the HW structure
584 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
585 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
587 s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw)
589 s32 status = E1000_SUCCESS;
590 s32 (*read_op_ptr)(struct e1000_hw *, u16, u16, u16 *);
592 DEBUGFUNC("e1000_validate_nvm_checksum_i210");
594 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
597 * Replace the read function with semaphore grabbing with
598 * the one that skips this for a while.
599 * We have semaphore taken already here.
601 read_op_ptr = hw->nvm.ops.read;
602 hw->nvm.ops.read = e1000_read_nvm_eerd;
604 status = e1000_validate_nvm_checksum_generic(hw);
606 /* Revert original read operation. */
607 hw->nvm.ops.read = read_op_ptr;
609 hw->nvm.ops.release(hw);
611 status = E1000_ERR_SWFW_SYNC;
619 * e1000_update_nvm_checksum_i210 - Update EEPROM checksum
620 * @hw: pointer to the HW structure
622 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
623 * up to the checksum. Then calculates the EEPROM checksum and writes the
624 * value to the EEPROM. Next commit EEPROM data onto the Flash.
626 s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw)
628 s32 ret_val = E1000_SUCCESS;
632 DEBUGFUNC("e1000_update_nvm_checksum_i210");
635 * Read the first word from the EEPROM. If this times out or fails, do
636 * not continue or we could be in for a very long wait while every
639 ret_val = e1000_read_nvm_eerd(hw, 0, 1, &nvm_data);
640 if (ret_val != E1000_SUCCESS) {
641 DEBUGOUT("EEPROM read failed\n");
645 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
647 * Do not use hw->nvm.ops.write, hw->nvm.ops.read
648 * because we do not want to take the synchronization
649 * semaphores twice here.
652 for (i = 0; i < NVM_CHECKSUM_REG; i++) {
653 ret_val = e1000_read_nvm_eerd(hw, i, 1, &nvm_data);
655 hw->nvm.ops.release(hw);
656 DEBUGOUT("NVM Read Error while updating checksum.\n");
659 checksum += nvm_data;
661 checksum = (u16) NVM_SUM - checksum;
662 ret_val = e1000_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,
664 if (ret_val != E1000_SUCCESS) {
665 hw->nvm.ops.release(hw);
666 DEBUGOUT("NVM Write Error while updating checksum.\n");
670 hw->nvm.ops.release(hw);
672 ret_val = e1000_update_flash_i210(hw);
674 ret_val = E1000_ERR_SWFW_SYNC;
681 * e1000_update_flash_i210 - Commit EEPROM to the flash
682 * @hw: pointer to the HW structure
685 s32 e1000_update_flash_i210(struct e1000_hw *hw)
687 s32 ret_val = E1000_SUCCESS;
690 DEBUGFUNC("e1000_update_flash_i210");
692 ret_val = e1000_pool_flash_update_done_i210(hw);
693 if (ret_val == -E1000_ERR_NVM) {
694 DEBUGOUT("Flash update time out\n");
698 flup = E1000_READ_REG(hw, E1000_EECD) | E1000_EECD_FLUPD_I210;
699 E1000_WRITE_REG(hw, E1000_EECD, flup);
701 ret_val = e1000_pool_flash_update_done_i210(hw);
702 if (ret_val == E1000_SUCCESS)
703 DEBUGOUT("Flash update complete\n");
705 DEBUGOUT("Flash update time out\n");
712 * e1000_pool_flash_update_done_i210 - Pool FLUDONE status.
713 * @hw: pointer to the HW structure
716 s32 e1000_pool_flash_update_done_i210(struct e1000_hw *hw)
718 s32 ret_val = -E1000_ERR_NVM;
721 DEBUGFUNC("e1000_pool_flash_update_done_i210");
723 for (i = 0; i < E1000_FLUDONE_ATTEMPTS; i++) {
724 reg = E1000_READ_REG(hw, E1000_EECD);
725 if (reg & E1000_EECD_FLUDONE_I210) {
726 ret_val = E1000_SUCCESS;
736 * e1000_init_nvm_params_i210 - Initialize i210 NVM function pointers
737 * @hw: pointer to the HW structure
739 * Initialize the i210 NVM parameters and function pointers.
741 STATIC s32 e1000_init_nvm_params_i210(struct e1000_hw *hw)
743 s32 ret_val = E1000_SUCCESS;
744 struct e1000_nvm_info *nvm = &hw->nvm;
746 DEBUGFUNC("e1000_init_nvm_params_i210");
748 ret_val = e1000_init_nvm_params_82575(hw);
750 nvm->ops.acquire = e1000_acquire_nvm_i210;
751 nvm->ops.release = e1000_release_nvm_i210;
752 nvm->ops.read = e1000_read_nvm_srrd_i210;
753 nvm->ops.write = e1000_write_nvm_srwr_i210;
754 nvm->ops.valid_led_default = e1000_valid_led_default_i210;
755 nvm->ops.validate = e1000_validate_nvm_checksum_i210;
756 nvm->ops.update = e1000_update_nvm_checksum_i210;
762 * e1000_init_nvm_params_i211 - Initialize i211 NVM function pointers
763 * @hw: pointer to the HW structure
765 * Initialize the NVM parameters and function pointers for i211.
767 STATIC s32 e1000_init_nvm_params_i211(struct e1000_hw *hw)
769 struct e1000_nvm_info *nvm = &hw->nvm;
771 DEBUGFUNC("e1000_init_nvm_params_i211");
773 nvm->ops.acquire = e1000_acquire_nvm_i210;
774 nvm->ops.release = e1000_release_nvm_i210;
775 nvm->ops.read = e1000_read_nvm_i211;
776 nvm->ops.valid_led_default = e1000_valid_led_default_i210;
777 nvm->ops.write = e1000_null_write_nvm;
778 nvm->ops.validate = e1000_null_ops_generic;
779 nvm->ops.update = e1000_null_ops_generic;
781 return E1000_SUCCESS;
785 * e1000_init_function_pointers_i210 - Init func ptrs.
786 * @hw: pointer to the HW structure
788 * Called to initialize all function pointers and parameters.
790 void e1000_init_function_pointers_i210(struct e1000_hw *hw)
792 e1000_init_function_pointers_82575(hw);
794 switch (hw->mac.type) {
796 hw->nvm.ops.init_params = e1000_init_nvm_params_i210;
799 hw->nvm.ops.init_params = e1000_init_nvm_params_i211;
808 * e1000_valid_led_default_i210 - Verify a valid default LED config
809 * @hw: pointer to the HW structure
810 * @data: pointer to the NVM (EEPROM)
812 * Read the EEPROM for the current default LED configuration. If the
813 * LED configuration is not valid, set to a valid LED configuration.
815 STATIC s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data)
819 DEBUGFUNC("e1000_valid_led_default_i210");
821 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
823 DEBUGOUT("NVM Read Error\n");
827 if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) {
828 switch (hw->phy.media_type) {
829 case e1000_media_type_internal_serdes:
830 *data = ID_LED_DEFAULT_I210_SERDES;
832 case e1000_media_type_copper:
834 *data = ID_LED_DEFAULT_I210;