1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*******************************************************************************
4 Intel(R) Gigabit Ethernet Linux driver
5 Copyright(c) 2007-2013 Intel Corporation.
8 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
11 *******************************************************************************/
13 #ifndef _E1000_MANAGE_H_
14 #define _E1000_MANAGE_H_
16 bool e1000_check_mng_mode_generic(struct e1000_hw *hw);
17 bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw);
18 s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw);
19 s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
20 u16 length, u16 offset, u8 *sum);
21 s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
22 struct e1000_host_mng_command_header *hdr);
23 s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw,
24 u8 *buffer, u16 length);
25 bool e1000_enable_mng_pass_thru(struct e1000_hw *hw);
26 u8 e1000_calculate_checksum(u8 *buffer, u32 length);
27 s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length);
28 s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length);
31 e1000_mng_mode_none = 0,
35 e1000_mng_mode_host_if_only
38 #define E1000_FACTPS_MNGCG 0x20000000
40 #define E1000_FWSM_MODE_MASK 0xE
41 #define E1000_FWSM_MODE_SHIFT 1
42 #define E1000_FWSM_FW_VALID 0x00008000
43 #define E1000_FWSM_HI_EN_ONLY_MODE 0x4
45 #define E1000_MNG_IAMT_MODE 0x3
46 #define E1000_MNG_DHCP_COOKIE_LENGTH 0x10
47 #define E1000_MNG_DHCP_COOKIE_OFFSET 0x6F0
48 #define E1000_MNG_DHCP_COMMAND_TIMEOUT 10
49 #define E1000_MNG_DHCP_TX_PAYLOAD_CMD 64
50 #define E1000_MNG_DHCP_COOKIE_STATUS_PARSING 0x1
51 #define E1000_MNG_DHCP_COOKIE_STATUS_VLAN 0x2
53 #define E1000_VFTA_ENTRY_SHIFT 5
54 #define E1000_VFTA_ENTRY_MASK 0x7F
55 #define E1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F
57 #define E1000_HI_MAX_BLOCK_BYTE_LENGTH 1792 /* Num of bytes in range */
58 #define E1000_HI_MAX_BLOCK_DWORD_LENGTH 448 /* Num of dwords in range */
59 #define E1000_HI_COMMAND_TIMEOUT 500 /* Process HI cmd limit */
60 #define E1000_HI_FW_BASE_ADDRESS 0x10000
61 #define E1000_HI_FW_MAX_LENGTH (64 * 1024) /* Num of bytes */
62 #define E1000_HI_FW_BLOCK_DWORD_LENGTH 256 /* Num of DWORDs per page */
63 #define E1000_HICR_MEMORY_BASE_EN 0x200 /* MB Enable bit - RO */
64 #define E1000_HICR_EN 0x01 /* Enable bit - RO */
65 /* Driver sets this bit when done to put command in RAM */
66 #define E1000_HICR_C 0x02
67 #define E1000_HICR_SV 0x04 /* Status Validity */
68 #define E1000_HICR_FW_RESET_ENABLE 0x40
69 #define E1000_HICR_FW_RESET 0x80
71 /* Intel(R) Active Management Technology signature */
72 #define E1000_IAMT_SIGNATURE 0x544D4149